From b04da78fb89a5a9461bac9e680ae812192f43a3a Mon Sep 17 00:00:00 2001 From: Ariadne Conill Date: Mon, 30 Mar 2020 04:07:41 +0000 Subject: [PATCH] mips: use REG_OFFSET --- arch/mips/getcontext.S | 24 +++++++++--------- arch/mips/makecontext.S | 10 ++++---- arch/mips/setcontext.S | 32 +++++++++++------------ arch/mips/swapcontext.S | 56 ++++++++++++++++++++--------------------- 4 files changed, 61 insertions(+), 61 deletions(-) diff --git a/arch/mips/getcontext.S b/arch/mips/getcontext.S index ddce8ae..4260850 100644 --- a/arch/mips/getcontext.S +++ b/arch/mips/getcontext.S @@ -25,19 +25,19 @@ FUNC(__getcontext) PUSH_FRAME(__getcontext) /* set registers */ - sw $s0, ((16 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $s1, ((17 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $s2, ((18 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $s3, ((19 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $s4, ((20 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $s5, ((21 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $s6, ((22 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $s7, ((23 * REG_SZ) + MCONTEXT_GREGS)($a0) + sw $s0, REG_OFFSET(16)($a0) + sw $s1, REG_OFFSET(17)($a0) + sw $s2, REG_OFFSET(18)($a0) + sw $s3, REG_OFFSET(19)($a0) + sw $s4, REG_OFFSET(20)($a0) + sw $s5, REG_OFFSET(21)($a0) + sw $s6, REG_OFFSET(22)($a0) + sw $s7, REG_OFFSET(23)($a0) - sw $a2, ((28 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $a3, ((29 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $a1, ((30 * REG_SZ) + MCONTEXT_GREGS)($a0) - sw $ra, ((31 * REG_SZ) + MCONTEXT_GREGS)($a0) + sw $a2, REG_OFFSET(28)($a0) + sw $a3, REG_OFFSET(29)($a0) + sw $a1, REG_OFFSET(30)($a0) + sw $ra, REG_OFFSET(31)($a0) sw $ra, (MCONTEXT_PC)($a0) POP_FRAME(__getcontext) diff --git a/arch/mips/makecontext.S b/arch/mips/makecontext.S index 7caf39a..e72c094 100644 --- a/arch/mips/makecontext.S +++ b/arch/mips/makecontext.S @@ -31,7 +31,7 @@ FUNC(__makecontext) /* set $zero in the mcontext to 1. */ li $v0, 1 - sw $v0, ((0 * REG_SZ) + MCONTEXT_GREGS)($a0) + sw $v0, REG_OFFSET(0)($a0) /* ensure the stack is aligned on a quad-word boundary. */ lw $t0, UCONTEXT_STACK_PTR($a0) @@ -80,16 +80,16 @@ no_more_arguments: /* copy link pointer as $s0... */ lw $v1, UCONTEXT_UC_LINK($a0) - sw $v1, ((16 * REG_SZ) + MCONTEXT_GREGS)($a0) + sw $v1, REG_OFFSET(16)($a0) /* set our $sp */ - sw $t0, ((29 * REG_SZ) + MCONTEXT_GREGS)($a0) + sw $t0, REG_OFFSET(29)($a0) /* $gp is copied as $s1 */ - sw $gp, ((17 * REG_SZ) + MCONTEXT_GREGS)($a0) + sw $gp, REG_OFFSET(17)($a0) /* set our $ra */ - sw $t9, ((31 * REG_SZ) + MCONTEXT_GREGS)($a0) + sw $t9, REG_OFFSET(31)($a0) /* set our $pc */ sw $a1, MCONTEXT_PC($a0) diff --git a/arch/mips/setcontext.S b/arch/mips/setcontext.S index 1840d88..bdc2a96 100644 --- a/arch/mips/setcontext.S +++ b/arch/mips/setcontext.S @@ -23,24 +23,24 @@ FUNC(__setcontext) move $v0, $a0 /* load the registers */ - lw $a0, ((4 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $a1, ((5 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $a2, ((6 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $a3, ((7 * REG_SZ) + MCONTEXT_GREGS)($v0) + lw $a0, REG_OFFSET(4)($v0) + lw $a1, REG_OFFSET(5)($v0) + lw $a2, REG_OFFSET(6)($v0) + lw $a3, REG_OFFSET(7)($v0) - lw $s0, ((16 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $s1, ((17 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $s2, ((18 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $s3, ((19 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $s4, ((20 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $s5, ((21 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $s6, ((22 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $s7, ((23 * REG_SZ) + MCONTEXT_GREGS)($v0) + lw $s0, REG_OFFSET(16)($v0) + lw $s1, REG_OFFSET(17)($v0) + lw $s2, REG_OFFSET(18)($v0) + lw $s3, REG_OFFSET(19)($v0) + lw $s4, REG_OFFSET(20)($v0) + lw $s5, REG_OFFSET(21)($v0) + lw $s6, REG_OFFSET(22)($v0) + lw $s7, REG_OFFSET(23)($v0) - lw $gp, ((28 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $sp, ((29 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $fp, ((30 * REG_SZ) + MCONTEXT_GREGS)($v0) - lw $ra, ((31 * REG_SZ) + MCONTEXT_GREGS)($v0) + lw $gp, REG_OFFSET(28)($v0) + lw $sp, REG_OFFSET(29)($v0) + lw $fp, REG_OFFSET(30)($v0) + lw $ra, REG_OFFSET(31)($v0) lw $t9, (MCONTEXT_PC)($v0) move $v0, $zero diff --git a/arch/mips/swapcontext.S b/arch/mips/swapcontext.S index bfb106b..e372551 100644 --- a/arch/mips/swapcontext.S +++ b/arch/mips/swapcontext.S @@ -26,19 +26,19 @@ FUNC(__swapcontext) PUSH_FRAME(__swapcontext) /* set registers */ - sd $s0, ((16 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s1, ((17 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s2, ((18 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s3, ((19 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s4, ((20 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s5, ((21 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s6, ((22 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s7, ((23 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $s0, REG_OFFSET(16)($a0) + sd $s1, REG_OFFSET(17)($a0) + sd $s2, REG_OFFSET(18)($a0) + sd $s3, REG_OFFSET(19)($a0) + sd $s4, REG_OFFSET(20)($a0) + sd $s5, REG_OFFSET(21)($a0) + sd $s6, REG_OFFSET(22)($a0) + sd $s7, REG_OFFSET(23)($a0) - sd $a2, ((28 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $a3, ((29 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $fp, ((30 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $ra, ((31 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $a2, REG_OFFSET(28)($a0) + sd $a3, REG_OFFSET(29)($a0) + sd $fp, REG_OFFSET(30)($a0) + sd $ra, REG_OFFSET(31)($a0) sd $ra, (MCONTEXT_PC)($a0) /* copy new context address in $a1 to stack */ @@ -48,24 +48,24 @@ FUNC(__swapcontext) ld $v0, A1_OFFSET($sp) /* load the registers */ - ld $a0, ((4 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a1, ((5 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a2, ((6 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a3, ((7 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $a0, REG_OFFSET(4)($v0) + ld $a1, REG_OFFSET(5)($v0) + ld $a2, REG_OFFSET(6)($v0) + ld $a3, REG_OFFSET(7)($v0) - ld $s0, ((16 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s1, ((17 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s2, ((18 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s3, ((19 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s4, ((20 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s5, ((21 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s6, ((22 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s7, ((23 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $s0, REG_OFFSET(16)($v0) + ld $s1, REG_OFFSET(17)($v0) + ld $s2, REG_OFFSET(18)($v0) + ld $s3, REG_OFFSET(19)($v0) + ld $s4, REG_OFFSET(20)($v0) + ld $s5, REG_OFFSET(21)($v0) + ld $s6, REG_OFFSET(22)($v0) + ld $s7, REG_OFFSET(23)($v0) - ld $gp, ((28 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $sp, ((29 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $fp, ((30 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $ra, ((31 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $gp, REG_OFFSET(28)($v0) + ld $sp, REG_OFFSET(29)($v0) + ld $fp, REG_OFFSET(30)($v0) + ld $ra, REG_OFFSET(31)($v0) ld $t9, (MCONTEXT_PC)($v0) move $v0, $zero