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ddb2d5f621
Author | SHA1 | Date |
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Richard Campbell | ddb2d5f621 |
12
Makefile
12
Makefile
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@ -35,18 +35,6 @@ ifeq ($(FREESTANDING),yes)
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EXPORT_UNPREFIXED = no
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EXPORT_UNPREFIXED = no
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endif
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endif
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FORCE_SOFT_FLOAT := no
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ifeq ($(FORCE_SOFT_FLOAT),yes)
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CPPFLAGS += -DFORCE_SOFT_FLOAT
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endif
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FORCE_HARD_FLOAT := no
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ifeq ($(FORCE_HARD_FLOAT),yes)
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CPPFLAGS += -DFORCE_HARD_FLOAT
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endif
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ifeq ($(EXPORT_UNPREFIXED),yes)
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ifeq ($(EXPORT_UNPREFIXED),yes)
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CPPFLAGS += -DEXPORT_UNPREFIXED
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CPPFLAGS += -DEXPORT_UNPREFIXED
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endif
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endif
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@ -101,5 +101,4 @@ ucontext functions:
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save/restore FPU registers or vector registers may be added in a later release as a build-time
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save/restore FPU registers or vector registers may be added in a later release as a build-time
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setting -- for now, we assume a soft-float ABI with no optional processor features. In practice, this
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setting -- for now, we assume a soft-float ABI with no optional processor features. In practice, this
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does not really matter, code using these functions are unlikely to be impacted by this design
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does not really matter, code using these functions are unlikely to be impacted by this design
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assumption. This is a work in progress, as newer compilers will spill even non-floating-point state
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assumption.
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through floating point registers when allowed to do so.
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@ -2,8 +2,6 @@
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#define REG_SZ (4)
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#define REG_SZ (4)
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#define MCONTEXT_GREGS (32)
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#define MCONTEXT_GREGS (32)
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#define VFP_MAGIC_OFFSET (232)
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#define VFP_D8_OFFSET (304)
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#define TYPE(__proc) .type __proc, %function;
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#define TYPE(__proc) .type __proc, %function;
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@ -22,27 +22,6 @@ FUNC(libucontext_getcontext)
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str r13, [r0, #REG_OFFSET(13)]
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str r13, [r0, #REG_OFFSET(13)]
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str r14, [r0, #REG_OFFSET(15)]
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str r14, [r0, #REG_OFFSET(15)]
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#ifndef FORCE_SOFT_FLOAT
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#ifndef FORCE_HARD_FLOAT
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/* test for vfp, set kernel-defined magic number in uc_regspace */
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push {r0-r1,fp,lr}
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mov r0, #16
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bl getauxval
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tst r0, #64
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pop {r0-r1,fp,lr}
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moveq r2, #0
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ldrne r2, =#0x56465001
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str r2, [r0, #VFP_MAGIC_OFFSET]
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beq 1f
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#endif
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/* if vfp detected, save d8-d15 */
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.fpu vfp
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add r1, r0, #VFP_D8_OFFSET
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vstmia r1, {d8-d15}
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.fpu softvfp
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1:
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#endif
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/* return 0 */
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/* return 0 */
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mov r0, #0
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mov r0, #0
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mov pc, lr
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mov pc, lr
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@ -23,8 +23,6 @@ typedef struct libucontext_ucontext {
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struct libucontext_ucontext *uc_link;
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struct libucontext_ucontext *uc_link;
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libucontext_stack_t uc_stack;
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libucontext_stack_t uc_stack;
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libucontext_mcontext_t uc_mcontext;
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libucontext_mcontext_t uc_mcontext;
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unsigned long uc_sigmask[128 / sizeof(long)];
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unsigned long long uc_regspace[64];
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} libucontext_ucontext_t;
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} libucontext_ucontext_t;
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#endif
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#endif
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@ -16,22 +16,6 @@ ALIAS(setcontext, libucontext_setcontext)
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ALIAS(__setcontext, libucontext_setcontext)
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ALIAS(__setcontext, libucontext_setcontext)
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FUNC(libucontext_setcontext)
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FUNC(libucontext_setcontext)
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#ifndef FORCE_SOFT_FLOAT
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#ifndef FORCE_HARD_FLOAT
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/* test for vfp magic number set by getcontext */
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ldr r2, [r0, #VFP_MAGIC_OFFSET]
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ldr r3, =#0x56465001
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cmp r2, r3
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bne 1f
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#endif
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/* if vfp in use, restore d8-d15 from uc_regspace */
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.fpu vfp
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add r14, r0, #VFP_D8_OFFSET
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vldmia r14, {d8-d15}
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.fpu softvfp
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1:
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#endif
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/* copy all of the current registers into the ucontext structure */
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/* copy all of the current registers into the ucontext structure */
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add r14, r0, #REG_OFFSET(0)
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add r14, r0, #REG_OFFSET(0)
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ldmia r14, {r0-r12}
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ldmia r14, {r0-r12}
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@ -22,26 +22,6 @@ FUNC(libucontext_swapcontext)
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str r13, [r0,#REG_OFFSET(13)]
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str r13, [r0,#REG_OFFSET(13)]
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str r14, [r0,#REG_OFFSET(15)]
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str r14, [r0,#REG_OFFSET(15)]
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#ifndef FORCE_SOFT_FLOAT
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#ifndef FORCE_HARD_FLOAT
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/* test for vfp magic number, copy to other ucontext */
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ldr r3, [r1, #VFP_MAGIC_OFFSET]
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ldr r4, =#0x56465001
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str r3, [r0, #VFP_MAGIC_OFFSET]
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cmp r3, r4
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bne 1f
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#endif
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/* if vfp in use, save and restore d8-d15 */
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.fpu vfp
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add r2, r0, #VFP_D8_OFFSET
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vstmia r2, {d8-d15}
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add r14, r1, #VFP_D8_OFFSET
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vldmia r14, {d8-d15}
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.fpu softvfp
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1:
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#endif
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/* load new registers from the second ucontext structure */
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/* load new registers from the second ucontext structure */
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add r14, r1, #REG_OFFSET(0)
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add r14, r1, #REG_OFFSET(0)
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ldmia r14, {r0-r12}
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ldmia r14, {r0-r12}
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