52 lines
2.0 KiB
Diff
52 lines
2.0 KiB
Diff
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From 8d00bf577d12c9d64595ca2cd1ceec6f49bd57a4 Mon Sep 17 00:00:00 2001
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From: Bill XIE <persmule@hardenedlinux.org>
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Date: Fri, 3 Nov 2023 12:34:01 +0800
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Subject: [PATCH 07/10] drivers/pc80/rtc/option.c: Reset only CMOS range
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covered by checksum
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Proposed in the comment of commit 29030d0f3dad
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("drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume"),
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during sanitize_cmos(), only reset CMOS range covered by checksum and
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the checksum itself from the file cmos.default in CBFS, in order to
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prevent other runtime data in CMOS (e.g. the DRAM training data on
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GM45 platforms for s3 resume) being erased.
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Tested: cherry-pick this commit before commit 44a48ce7a46c ("Kconfig:
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Bring HEAP_SIZE to a common, large value"), which is already
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before my commit 29030d0f3dad , Thinkpad X200 with
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CONFIG(STATIC_OPTION_TABLE) can resume from s3 again,
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indicating that DRAM training data are no longer erased.
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Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
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Co-authored-by: Jonathon Hall <jonathon.hall@puri.sm>
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Change-Id: I872bf5f41422bc3424cd8631e932aaae2ae82f7a
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Reviewed-on: https://review.coreboot.org/c/coreboot/+/78906
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Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Reviewed-by: Nico Huber <nico.h@gmx.de>
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Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
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---
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src/drivers/pc80/rtc/option.c | 6 +++++-
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1 file changed, 5 insertions(+), 1 deletion(-)
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diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
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index e6cfa175ad..cb18e14ae9 100644
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--- a/src/drivers/pc80/rtc/option.c
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+++ b/src/drivers/pc80/rtc/option.c
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@@ -213,8 +213,12 @@ void sanitize_cmos(void)
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return;
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u8 control_state = cmos_disable_rtc();
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- for (i = 14; i < MIN(128, length); i++)
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+ /* Copy checked range and the checksum from the default */
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+ for (i = LB_CKS_RANGE_START; i < MIN(LB_CKS_RANGE_END + 1, length); i++)
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cmos_write_inner(cmos_default[i], i);
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+ /* CMOS checksum takes 2 bytes */
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+ cmos_write_inner(cmos_default[LB_CKS_LOC], LB_CKS_LOC);
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+ cmos_write_inner(cmos_default[LB_CKS_LOC + 1], LB_CKS_LOC + 1);
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cmos_restore_rtc(control_state);
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}
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}
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--
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2.39.2
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