From a9997082d7910305cd44eccc08ff5152f42f41d4 Mon Sep 17 00:00:00 2001 From: Alper Nebi Yasak Date: Wed, 10 Jul 2024 18:04:13 +0300 Subject: [PATCH] u-boot: Fix display initialization on gru boards U-Boot has migrated to using upstream device-tree files for gru boards, but the clock driver doesn't yet support setting rates for a certain clock that upstream uses for the eDP display. It happens to work without it, so for now remove the clock setting until the driver is fixed. Signed-off-by: Alper Nebi Yasak --- ...Remove-assigned-clock-dt-properties-.patch | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch diff --git a/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch new file mode 100644 index 0000000..7378981 --- /dev/null +++ b/config/u-boot/default/patches/0005-HACK-rk3399-gru-Remove-assigned-clock-dt-properties-.patch @@ -0,0 +1,36 @@ +From 1107dc81b24743e77374f1b484a843d81fa0348a Mon Sep 17 00:00:00 2001 +From: Alper Nebi Yasak +Date: Wed, 10 Jul 2024 14:32:19 +0300 +Subject: [PATCH] HACK: rk3399: gru: Remove assigned clock dt properties for + EDP node + +Having the PCLK_EDP clock in the assigned-clocks property of the `edp` +node means that U-Boot tries to set its rate automatically. This clock +isn't implemented for the RK3399 clock driver, so it fails and prevents +display from being initialized. + +The display happens to work fine without it, remove the property until +the clock driver can handle the clock. + +Signed-off-by: Alper Nebi Yasak +--- + arch/arm/dts/rk3399-gru-u-boot.dtsi | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/arm/dts/rk3399-gru-u-boot.dtsi b/arch/arm/dts/rk3399-gru-u-boot.dtsi +index 487dde38d86a..30cfb58aca12 100644 +--- a/arch/arm/dts/rk3399-gru-u-boot.dtsi ++++ b/arch/arm/dts/rk3399-gru-u-boot.dtsi +@@ -28,6 +28,9 @@ &cros_ec { + + &edp { + rockchip,panel = <&edp_panel>; ++ ++ /delete-property/ assigned-clocks; ++ /delete-property/ assigned-clock-rates; + }; + + &pp1800_audio { +-- +2.45.2 +