diff --git a/config/u-boot/x86/patches/0004-Disable-loading-microcode-in-various-devicetrees.patch b/config/u-boot/x86/patches/0004-Disable-loading-microcode-in-various-devicetrees.patch
new file mode 100644
index 0000000..b0dd615
--- /dev/null
+++ b/config/u-boot/x86/patches/0004-Disable-loading-microcode-in-various-devicetrees.patch
@@ -0,0 +1,225 @@
+From a44b8f4e28bb1e0c6c19d529620548be3fb02331 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Thu, 28 Nov 2024 21:05:49 +0000
+Subject: [PATCH 1/1] Disable loading microcode in various devicetrees
+
+I got build errors because of these. They are not included
+in the code at all, because of Canoeboot's de-blobbing rules.
+
+Remove them.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ arch/x86/dts/bayleybay.dts                    | 12 ------------
+ arch/x86/dts/baytrail_som-db5800-som-6867.dts |  9 ---------
+ arch/x86/dts/cherryhill.dts                   | 13 -------------
+ arch/x86/dts/chromebook_link.dts              |  9 ---------
+ arch/x86/dts/chromebook_samus.dts             |  8 --------
+ arch/x86/dts/conga-qeval20-qa3-e3845.dts      |  8 --------
+ arch/x86/dts/cougarcanyon2.dts                | 18 ------------------
+ arch/x86/dts/crownbay.dts                     |  6 ------
+ arch/x86/dts/dfi-bt700.dtsi                   |  8 --------
+ arch/x86/dts/minnowmax.dts                    |  9 ---------
+ 10 files changed, 100 deletions(-)
+
+diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
+index 59403f40ce..0d55503271 100644
+--- a/arch/x86/dts/bayleybay.dts
++++ b/arch/x86/dts/bayleybay.dts
+@@ -273,16 +273,4 @@
+ 		fsp,enable-igd;
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0230671117.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@2 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+-
+ };
+diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
+index 4e12c4a40c..caf10e90df 100644
+--- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts
++++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
+@@ -291,13 +291,4 @@
+ 		fsp,enable-igd;
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+-
+ };
+diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts
+index 3d35e4643c..c78e587186 100644
+--- a/arch/x86/dts/cherryhill.dts
++++ b/arch/x86/dts/cherryhill.dts
+@@ -200,17 +200,4 @@
+ 			fsp,sd-detect-chk;
+ 		};
+ 	};
+-
+-	microcode {
+-		update@0 {
+-#include "microcode/m01406c2220.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m01406c3363.dtsi"
+-		};
+-		update@2 {
+-#include "microcode/m01406c440a.dtsi"
+-		};
+-	};
+-
+ };
+diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
+index c904b7d0b6..66e08e6226 100644
+--- a/arch/x86/dts/chromebook_link.dts
++++ b/arch/x86/dts/chromebook_link.dts
+@@ -514,15 +514,6 @@
+ 		reg = <0xfed40000 0x5000>;
+ 		compatible = "infineon,slb9635lpc";
+ 	};
+-
+-	microcode {
+-		bootph-all;
+-		update@0 {
+-			bootph-all;
+-#include "microcode/m12306a9_0000001b.dtsi"
+-		};
+-	};
+-
+ };
+ 
+ &creative_codec {
+diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
+index ddff277046..f2c980aaff 100644
+--- a/arch/x86/dts/chromebook_samus.dts
++++ b/arch/x86/dts/chromebook_samus.dts
+@@ -686,14 +686,6 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		bootph-all;
+-		update@0 {
+-			bootph-all;
+-#include "microcode/mc0306d4_00000018.dtsi"
+-		};
+-	};
+-
+ 	sound {
+ 		compatible = "google,samus-sound";
+ 		codec-enable-gpio = <&gpio_b 11 GPIO_ACTIVE_HIGH>;
+diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+index c6577b30c8..d08103b5d9 100644
+--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
++++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+@@ -301,12 +301,4 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+ };
+diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts
+index 4833aab21c..a11504c235 100644
+--- a/arch/x86/dts/cougarcanyon2.dts
++++ b/arch/x86/dts/cougarcanyon2.dts
+@@ -65,24 +65,6 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m12306a2_00000008.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m12306a4_00000007.dtsi"
+-		};
+-		update@2 {
+-#include "microcode/m12306a5_00000007.dtsi"
+-		};
+-		update@3 {
+-#include "microcode/m12306a8_00000010.dtsi"
+-		};
+-		update@4 {
+-#include "microcode/m12306a9_0000001b.dtsi"
+-		};
+-	};
+-
+ 	fsp {
+ 		compatible = "intel,ivybridge-fsp";
+ 		fsp,enable-ht;
+diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
+index 64282303fb..fd752758c5 100644
+--- a/arch/x86/dts/crownbay.dts
++++ b/arch/x86/dts/crownbay.dts
+@@ -61,12 +61,6 @@
+ 		stdout-path = "/serial";
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0220661105_cv.dtsi"
+-		};
+-	};
+-
+ 	pci {
+ 		#address-cells = <3>;
+ 		#size-cells = <2>;
+diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi
+index 868cea4d18..8a9f5cfb12 100644
+--- a/arch/x86/dts/dfi-bt700.dtsi
++++ b/arch/x86/dts/dfi-bt700.dtsi
+@@ -319,12 +319,4 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+ };
+diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
+index f44b9bbc53..e059c11421 100644
+--- a/arch/x86/dts/minnowmax.dts
++++ b/arch/x86/dts/minnowmax.dts
+@@ -318,13 +318,4 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+-
+ };
+-- 
+2.39.5
+
diff --git a/config/u-boot/x86_64/patches/0004-Disable-loading-microcode-in-various-devicetrees.patch b/config/u-boot/x86_64/patches/0004-Disable-loading-microcode-in-various-devicetrees.patch
new file mode 100644
index 0000000..b0dd615
--- /dev/null
+++ b/config/u-boot/x86_64/patches/0004-Disable-loading-microcode-in-various-devicetrees.patch
@@ -0,0 +1,225 @@
+From a44b8f4e28bb1e0c6c19d529620548be3fb02331 Mon Sep 17 00:00:00 2001
+From: Leah Rowe <info@minifree.org>
+Date: Thu, 28 Nov 2024 21:05:49 +0000
+Subject: [PATCH 1/1] Disable loading microcode in various devicetrees
+
+I got build errors because of these. They are not included
+in the code at all, because of Canoeboot's de-blobbing rules.
+
+Remove them.
+
+Signed-off-by: Leah Rowe <info@minifree.org>
+---
+ arch/x86/dts/bayleybay.dts                    | 12 ------------
+ arch/x86/dts/baytrail_som-db5800-som-6867.dts |  9 ---------
+ arch/x86/dts/cherryhill.dts                   | 13 -------------
+ arch/x86/dts/chromebook_link.dts              |  9 ---------
+ arch/x86/dts/chromebook_samus.dts             |  8 --------
+ arch/x86/dts/conga-qeval20-qa3-e3845.dts      |  8 --------
+ arch/x86/dts/cougarcanyon2.dts                | 18 ------------------
+ arch/x86/dts/crownbay.dts                     |  6 ------
+ arch/x86/dts/dfi-bt700.dtsi                   |  8 --------
+ arch/x86/dts/minnowmax.dts                    |  9 ---------
+ 10 files changed, 100 deletions(-)
+
+diff --git a/arch/x86/dts/bayleybay.dts b/arch/x86/dts/bayleybay.dts
+index 59403f40ce..0d55503271 100644
+--- a/arch/x86/dts/bayleybay.dts
++++ b/arch/x86/dts/bayleybay.dts
+@@ -273,16 +273,4 @@
+ 		fsp,enable-igd;
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0230671117.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@2 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+-
+ };
+diff --git a/arch/x86/dts/baytrail_som-db5800-som-6867.dts b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
+index 4e12c4a40c..caf10e90df 100644
+--- a/arch/x86/dts/baytrail_som-db5800-som-6867.dts
++++ b/arch/x86/dts/baytrail_som-db5800-som-6867.dts
+@@ -291,13 +291,4 @@
+ 		fsp,enable-igd;
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+-
+ };
+diff --git a/arch/x86/dts/cherryhill.dts b/arch/x86/dts/cherryhill.dts
+index 3d35e4643c..c78e587186 100644
+--- a/arch/x86/dts/cherryhill.dts
++++ b/arch/x86/dts/cherryhill.dts
+@@ -200,17 +200,4 @@
+ 			fsp,sd-detect-chk;
+ 		};
+ 	};
+-
+-	microcode {
+-		update@0 {
+-#include "microcode/m01406c2220.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m01406c3363.dtsi"
+-		};
+-		update@2 {
+-#include "microcode/m01406c440a.dtsi"
+-		};
+-	};
+-
+ };
+diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
+index c904b7d0b6..66e08e6226 100644
+--- a/arch/x86/dts/chromebook_link.dts
++++ b/arch/x86/dts/chromebook_link.dts
+@@ -514,15 +514,6 @@
+ 		reg = <0xfed40000 0x5000>;
+ 		compatible = "infineon,slb9635lpc";
+ 	};
+-
+-	microcode {
+-		bootph-all;
+-		update@0 {
+-			bootph-all;
+-#include "microcode/m12306a9_0000001b.dtsi"
+-		};
+-	};
+-
+ };
+ 
+ &creative_codec {
+diff --git a/arch/x86/dts/chromebook_samus.dts b/arch/x86/dts/chromebook_samus.dts
+index ddff277046..f2c980aaff 100644
+--- a/arch/x86/dts/chromebook_samus.dts
++++ b/arch/x86/dts/chromebook_samus.dts
+@@ -686,14 +686,6 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		bootph-all;
+-		update@0 {
+-			bootph-all;
+-#include "microcode/mc0306d4_00000018.dtsi"
+-		};
+-	};
+-
+ 	sound {
+ 		compatible = "google,samus-sound";
+ 		codec-enable-gpio = <&gpio_b 11 GPIO_ACTIVE_HIGH>;
+diff --git a/arch/x86/dts/conga-qeval20-qa3-e3845.dts b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+index c6577b30c8..d08103b5d9 100644
+--- a/arch/x86/dts/conga-qeval20-qa3-e3845.dts
++++ b/arch/x86/dts/conga-qeval20-qa3-e3845.dts
+@@ -301,12 +301,4 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+ };
+diff --git a/arch/x86/dts/cougarcanyon2.dts b/arch/x86/dts/cougarcanyon2.dts
+index 4833aab21c..a11504c235 100644
+--- a/arch/x86/dts/cougarcanyon2.dts
++++ b/arch/x86/dts/cougarcanyon2.dts
+@@ -65,24 +65,6 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m12306a2_00000008.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m12306a4_00000007.dtsi"
+-		};
+-		update@2 {
+-#include "microcode/m12306a5_00000007.dtsi"
+-		};
+-		update@3 {
+-#include "microcode/m12306a8_00000010.dtsi"
+-		};
+-		update@4 {
+-#include "microcode/m12306a9_0000001b.dtsi"
+-		};
+-	};
+-
+ 	fsp {
+ 		compatible = "intel,ivybridge-fsp";
+ 		fsp,enable-ht;
+diff --git a/arch/x86/dts/crownbay.dts b/arch/x86/dts/crownbay.dts
+index 64282303fb..fd752758c5 100644
+--- a/arch/x86/dts/crownbay.dts
++++ b/arch/x86/dts/crownbay.dts
+@@ -61,12 +61,6 @@
+ 		stdout-path = "/serial";
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0220661105_cv.dtsi"
+-		};
+-	};
+-
+ 	pci {
+ 		#address-cells = <3>;
+ 		#size-cells = <2>;
+diff --git a/arch/x86/dts/dfi-bt700.dtsi b/arch/x86/dts/dfi-bt700.dtsi
+index 868cea4d18..8a9f5cfb12 100644
+--- a/arch/x86/dts/dfi-bt700.dtsi
++++ b/arch/x86/dts/dfi-bt700.dtsi
+@@ -319,12 +319,4 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+ };
+diff --git a/arch/x86/dts/minnowmax.dts b/arch/x86/dts/minnowmax.dts
+index f44b9bbc53..e059c11421 100644
+--- a/arch/x86/dts/minnowmax.dts
++++ b/arch/x86/dts/minnowmax.dts
+@@ -318,13 +318,4 @@
+ 		};
+ 	};
+ 
+-	microcode {
+-		update@0 {
+-#include "microcode/m0130673325.dtsi"
+-		};
+-		update@1 {
+-#include "microcode/m0130679907.dtsi"
+-		};
+-	};
+-
+ };
+-- 
+2.39.5
+