2007-10-11 23:11:58 +00:00
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// NES 2A03 APU sound chip emulator
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2013-09-28 03:24:23 +00:00
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// Nes_Snd_Emu $vers
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2007-10-11 23:11:58 +00:00
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#ifndef NES_APU_H
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#define NES_APU_H
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#include "blargg_common.h"
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#include "Nes_Oscs.h"
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struct apu_state_t;
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class Nes_Buffer;
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class Nes_Apu {
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public:
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2013-09-28 03:24:23 +00:00
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// Basics
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typedef int nes_time_t; // NES CPU clock cycle count
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2007-10-11 23:11:58 +00:00
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2013-09-28 03:24:23 +00:00
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// Sets memory reader callback used by DMC oscillator to fetch samples.
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2007-10-11 23:11:58 +00:00
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// When callback is invoked, 'user_data' is passed unchanged as the
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// first parameter.
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2013-09-28 03:24:23 +00:00
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//void dmc_reader( int (*callback)( void* user_data, int addr ), void* user_data = NULL );
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// Sets buffer to generate sound into, or 0 to mute output (reduces
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// emulation accuracy).
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void set_output( Blip_Buffer* );
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2007-10-11 23:11:58 +00:00
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// All time values are the number of CPU clock cycles relative to the
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// beginning of the current time frame. Before resetting the CPU clock
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// count, call end_frame( last_cpu_time ).
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2013-09-28 03:24:23 +00:00
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// Writes to register (0x4000-0x4013, and 0x4015 and 0x4017)
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enum { io_addr = 0x4000 };
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enum { io_size = 0x18 };
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void write_register( nes_time_t, int addr, int data );
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// Reads from status register (0x4015)
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enum { status_addr = 0x4015 };
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int read_status( nes_time_t );
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// Runs all oscillators up to specified time, ends current time frame, then
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// starts a new time frame at time 0. Time frames have no effect on emulation
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2007-10-11 23:11:58 +00:00
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// and each can be whatever length is convenient.
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void end_frame( nes_time_t );
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2013-09-28 03:24:23 +00:00
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// Optional
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// Resets internal frame counter, registers, and all oscillators.
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// Uses PAL timing if pal_timing is true, otherwise use NTSC timing.
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// Sets the DMC oscillator's initial DAC value to initial_dmc_dac without
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2007-10-11 23:11:58 +00:00
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// any audible click.
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void reset( bool pal_mode = false, int initial_dmc_dac = 0 );
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2013-09-28 03:24:23 +00:00
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// Same as set_output(), but for a particular channel
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// 0: Square 1, 1: Square 2, 2: Triangle, 3: Noise, 4: DMC
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enum { osc_count = 5 };
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void set_output( int chan, Blip_Buffer* buf );
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// Adjusts frame period
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void set_tempo( double );
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// Saves/loads exact emulation state
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void save_state( apu_state_t* out ) const;
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void load_state( apu_state_t const& );
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// Sets overall volume (default is 1.0)
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void volume( double );
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// Sets treble equalization (see notes.txt)
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void treble_eq( const blip_eq_t& );
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// Sets IRQ time callback that is invoked when the time of earliest IRQ
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// may have changed, or NULL to disable. When callback is invoked,
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// 'user_data' is passed unchanged as the first parameter.
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//void irq_notifier( void (*callback)( void* user_data ), void* user_data = NULL );
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// Gets time that APU-generated IRQ will occur if no further register reads
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// or writes occur. If IRQ is already pending, returns irq_waiting. If no
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// IRQ will occur, returns no_irq.
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enum { no_irq = INT_MAX/2 + 1 };
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enum { irq_waiting = 0 };
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nes_time_t earliest_irq( nes_time_t ) const;
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// Counts number of DMC reads that would occur if 'run_until( t )' were executed.
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// If last_read is not NULL, set *last_read to the earliest time that
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// 'count_dmc_reads( time )' would result in the same result.
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int count_dmc_reads( nes_time_t t, nes_time_t* last_read = NULL ) const;
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// Time when next DMC memory read will occur
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nes_time_t next_dmc_read_time() const;
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// Runs DMC until specified time, so that any DMC memory reads can be
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// accounted for (i.e. inserting CPU wait states).
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void run_until( nes_time_t );
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2013-09-28 03:24:23 +00:00
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// Implementation
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2007-10-11 23:11:58 +00:00
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public:
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Nes_Apu();
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BLARGG_DISABLE_NOTHROW
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// Use set_output() in place of these
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BLARGG_DEPRECATED( void output ( Blip_Buffer* c ); )
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BLARGG_DEPRECATED( void osc_output( int i, Blip_Buffer* c ); )
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BLARGG_DEPRECATED_TEXT( enum { start_addr = 0x4000 }; )
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BLARGG_DEPRECATED_TEXT( enum { end_addr = 0x4017 }; )
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blargg_callback<int (*)( void* user_data, int addr )> dmc_reader;
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blargg_callback<void (*)( void* user_data )> irq_notifier;
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void enable_nonlinear_( double sq, double tnd );
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static float tnd_total_() { return 196.015f; }
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void enable_w4011_( bool enable = true ) { enable_w4011 = enable; }
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2007-10-11 23:11:58 +00:00
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private:
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friend struct Nes_Dmc;
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// noncopyable
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Nes_Apu( const Nes_Apu& );
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Nes_Apu& operator = ( const Nes_Apu& );
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Nes_Osc* oscs [osc_count];
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Nes_Square square1;
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Nes_Square square2;
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Nes_Noise noise;
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Nes_Triangle triangle;
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Nes_Dmc dmc;
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double tempo_;
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nes_time_t last_time; // has been run until this time in current frame
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nes_time_t last_dmc_time;
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nes_time_t earliest_irq_;
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nes_time_t next_irq;
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int frame_period;
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int frame_delay; // cycles until frame counter runs next
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int frame; // current frame (0-3)
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int osc_enables;
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int frame_mode;
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bool irq_flag;
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bool enable_w4011;
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Nes_Square::Synth square_synth; // shared by squares
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void irq_changed();
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void state_restored();
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void run_until_( nes_time_t );
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// TODO: remove
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friend class Nes_Core;
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};
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inline void Nes_Apu::set_output( int osc, Blip_Buffer* buf )
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{
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assert( (unsigned) osc < osc_count );
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oscs [osc]->output = buf;
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}
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inline Nes_Apu::nes_time_t Nes_Apu::earliest_irq( nes_time_t ) const
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{
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return earliest_irq_;
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}
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inline int Nes_Apu::count_dmc_reads( nes_time_t time, nes_time_t* last_read ) const
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{
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return dmc.count_reads( time, last_read );
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}
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inline Nes_Apu::nes_time_t Nes_Dmc::next_read_time() const
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{
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if ( length_counter == 0 )
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return Nes_Apu::no_irq; // not reading
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return apu->last_dmc_time + delay + (bits_remain - 1) * period;
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}
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inline Nes_Apu::nes_time_t Nes_Apu::next_dmc_read_time() const { return dmc.next_read_time(); }
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BLARGG_DEPRECATED( typedef int nes_time_t; ) // use your own typedef
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BLARGG_DEPRECATED( typedef unsigned nes_addr_t; ) // use your own typedef
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BLARGG_DEPRECATED_TEXT( inline void Nes_Apu::output ( Blip_Buffer* c ) { set_output( c ); } )
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BLARGG_DEPRECATED_TEXT( inline void Nes_Apu::osc_output( int i, Blip_Buffer* c ) { set_output( i, c ); } )
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2007-10-11 23:11:58 +00:00
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#endif
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