2015-11-27 10:02:41 +00:00
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// ChipMapper.c - Handles Chip Write (including OPL Hardware Support)
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#include <stdio.h>
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2016-07-02 09:57:36 +00:00
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#include <string.h>
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2015-11-27 10:02:41 +00:00
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#include <math.h>
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#include <wchar.h>
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#include "stdbool.h"
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#include "chips/mamedef.h"
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#include "chips/ChipIncl.h"
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#include "VGMPlay.h"
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#include "ChipMapper.h"
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2016-07-02 09:57:36 +00:00
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// To finish filling out later
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UINT8 chip_reg_read(void *param, UINT8 ChipType, UINT8 ChipID, UINT8 Port, UINT8 Offset)
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{
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VGM_PLAYER* p = (VGM_PLAYER *) param;
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switch(ChipType)
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{
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case 0x1B: // HuC6280
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return c6280_r(p->huc6280[ChipID], Offset);
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}
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return 0;
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}
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2015-11-27 10:02:41 +00:00
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void chip_reg_write(void *param, UINT8 ChipType, UINT8 ChipID,
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UINT8 Port, UINT8 Offset, UINT8 Data)
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{
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VGM_PLAYER* p = (VGM_PLAYER *) param;
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switch(ChipType)
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{
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case 0x00: // SN76496
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sn764xx_w(p->sn764xx[ChipID], Port, Data);
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break;
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case 0x01: // YM2413
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ym2413_w(p->ym2413[ChipID], 0x00, Offset);
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ym2413_w(p->ym2413[ChipID], 0x01, Data);
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break;
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case 0x02: // YM2612
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ym2612_w(p->ym2612[ChipID], (Port << 1) | 0x00, Offset);
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ym2612_w(p->ym2612[ChipID], (Port << 1) | 0x01, Data);
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break;
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case 0x03: // YM2151
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ym2151_w(p->ym2151[ChipID], 0x00, Offset);
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ym2151_w(p->ym2151[ChipID], 0x01, Data);
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break;
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case 0x04: // SegaPCM
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break;
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case 0x05: // RF5C68
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rf5c68_w(p->rf5c68, Offset, Data);
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break;
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case 0x06: // YM2203
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ym2203_w(p->ym2203[ChipID], 0x00, Offset);
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ym2203_w(p->ym2203[ChipID], 0x01, Data);
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break;
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case 0x07: // YM2608
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ym2608_w(p->ym2608[ChipID], (Port << 1) | 0x00, Offset);
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ym2608_w(p->ym2608[ChipID], (Port << 1) | 0x01, Data);
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break;
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case 0x08: // YM2610/YM2610B
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ym2610_w(p->ym2610[ChipID], (Port << 1) | 0x00, Offset);
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ym2610_w(p->ym2610[ChipID], (Port << 1) | 0x01, Data);
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break;
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case 0x09: // YM3812
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ym3812_w(p->ym3812[ChipID], 0x00, Offset);
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ym3812_w(p->ym3812[ChipID], 0x01, Data);
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break;
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case 0x0A: // YM3526
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ym3526_w(p->ym3526[ChipID], 0x00, Offset);
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ym3526_w(p->ym3526[ChipID], 0x01, Data);
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break;
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case 0x0B: // Y8950
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y8950_w(p->y8950[ChipID], 0x00, Offset);
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y8950_w(p->y8950[ChipID], 0x01, Data);
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break;
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case 0x0C: // YMF262
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ymf262_w(p->ymf262[ChipID], (Port << 1) | 0x00, Offset);
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ymf262_w(p->ymf262[ChipID], (Port << 1) | 0x01, Data);
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break;
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case 0x0D: // YMF278B
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ymf278b_w(p->ymf278b[ChipID], (Port << 1) | 0x00, Offset);
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ymf278b_w(p->ymf278b[ChipID], (Port << 1) | 0x01, Data);
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break;
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case 0x0E: // YMF271
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ymf271_w(p->ymf271[ChipID], (Port << 1) | 0x00, Offset);
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ymf271_w(p->ymf271[ChipID], (Port << 1) | 0x01, Data);
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break;
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case 0x0F: // YMZ280B
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ymz280b_w(p->ymz280b[ChipID], 0x00, Offset);
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ymz280b_w(p->ymz280b[ChipID], 0x01, Data);
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break;
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case 0x10: // RF5C164
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rf5c164_w(p->rf5c164, Offset, Data);
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break;
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case 0x11: // PWM
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pwm_chn_w(p->pwm, Port, (Offset << 8) | (Data << 0));
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break;
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case 0x12: // AY8910
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ayxx_w(p->ay8910[ChipID], 0x00, Offset);
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ayxx_w(p->ay8910[ChipID], 0x01, Data);
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break;
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case 0x13: // GameBoy
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gb_sound_w(p->gbdmg[ChipID], Offset, Data);
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break;
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case 0x14: // NES APU
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nes_w(p->nesapu[ChipID], Offset, Data);
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break;
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case 0x15: // MultiPCM
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multipcm_w(p->multipcm[ChipID], Offset, Data);
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break;
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case 0x16: // UPD7759
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upd7759_write(p->upd7759[ChipID], Offset, Data);
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break;
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case 0x17: // OKIM6258
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okim6258_write(p->okim6258[ChipID], Offset, Data);
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break;
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case 0x18: // OKIM6295
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okim6295_w(p->okim6295[ChipID], Offset, Data);
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break;
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case 0x19: // K051649 / SCC1
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k051649_w(p->k051649[ChipID], (Port << 1) | 0x00, Offset);
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k051649_w(p->k051649[ChipID], (Port << 1) | 0x01, Data);
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break;
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case 0x1A: // K054539
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k054539_w(p->k054539[ChipID], (Port << 8) | (Offset << 0), Data);
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break;
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case 0x1B: // HuC6280
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c6280_w(p->huc6280[ChipID], Offset, Data);
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break;
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case 0x1C: // C140
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c140_w(p->c140[ChipID], (Port << 8) | (Offset << 0), Data);
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break;
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case 0x1D: // K053260
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k053260_w(p->k053260[ChipID], Offset, Data);
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break;
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case 0x1E: // Pokey
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pokey_w(p->pokey[ChipID], Offset, Data);
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break;
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case 0x1F: // QSound
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qsound_w(p->qsound[ChipID], 0x00, Port); // Data MSB
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qsound_w(p->qsound[ChipID], 0x01, Offset); // Data LSB
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qsound_w(p->qsound[ChipID], 0x02, Data); // Register
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break;
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case 0x20: // YMF292/SCSP
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scsp_w(p->scsp[ChipID], (Port << 8) | (Offset << 0), Data);
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break;
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case 0x21: // WonderSwan
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ws_audio_port_write(p->wswan[ChipID], 0x80 | Offset, Data);
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break;
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case 0x22: // VSU
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VSU_Write(p->vsu[ChipID], (Port << 8) | (Offset << 0), Data);
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break;
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case 0x23: // SAA1099
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saa1099_control_w(p->saa1099[ChipID], 0, Offset);
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saa1099_data_w(p->saa1099[ChipID], 0, Data);
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break;
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case 0x24: // ES5503
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es5503_w(p->es5503[ChipID], Offset, Data);
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break;
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case 0x25: // ES5506
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if (Port & 0x80)
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es550x_w16(p->es550x[ChipID], Port & 0x7F, (Offset << 8) | (Data << 0));
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else
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es550x_w(p->es550x[ChipID], Port, Data);
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break;
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case 0x26: // X1-010
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seta_sound_w(p->x1_010[ChipID], (Port << 8) | (Offset << 0), Data);
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break;
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case 0x27: // C352
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c352_w(p->c352[ChipID], Port, (Offset << 8) | (Data << 0));
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break;
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case 0x28: // GA20
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irem_ga20_w(p->ga20[ChipID], Offset, Data);
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break;
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// case 0x##: // OKIM6376
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// break;
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}
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return;
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}
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