Updated lazyusf2
parent
dfed1a3814
commit
1181393709
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@ -137,7 +137,7 @@ m64p_error main_start(usf_state_t * state)
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#ifdef DEBUG_INFO
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state->r4300emu = 0;
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#else
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state->r4300emu = state->enable_trimming_mode ? 1 : 2;
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state->r4300emu = state->enable_trimming_mode ? 0 : 2;
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#endif
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/* set some other core parameters based on the config file values */
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@ -23,6 +23,8 @@
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#include "usf/usf_internal.h"
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#include "usf/barray.h"
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#include "memory.h"
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#include "api/m64p_types.h"
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@ -1166,7 +1168,7 @@ int init_memory(usf_state_t * state, uint32_t rdram_size)
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map_region(state, 0xb000+i, M64P_MEM_NOTHING, RW(nothing));
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}
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state->fast_memory = 1;
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state->fast_memory = state->enable_trimming_mode ? 0 : 1;
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if (state->g_rom && state->g_rom_size >= 0xfc0)
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init_cic_using_ipl3(state, &state->g_si.pif.cic, state->g_rom + 0x40);
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@ -1241,6 +1243,24 @@ unsigned int * osal_fastcall fast_mem_access(usf_state_t * state, unsigned int a
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address &= 0x1ffffffc;
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/* XXX this method is only valid for single 32 bit word fetches,
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* as used by the pure interpreter CPU. The cached interpreter
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* and the recompiler, on the other hand, fetch the start of a
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* block and use the pointer for the entire block. */
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if (state->enable_trimming_mode)
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{
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if (address < RDRAM_MAX_SIZE)
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{
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if (!bit_array_test(state->barray_ram_written_first, address / 4))
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bit_array_set(state->barray_ram_read, address / 4);
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}
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else if ((address - 0x10000000) < state->g_rom_size)
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{
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bit_array_set(state->barray_rom, address / 4);
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}
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}
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if (address < RDRAM_MAX_SIZE)
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return (unsigned int*)((unsigned char*)state->g_rdram + address);
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else if (address >= 0x10000000)
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