Made it possible to enable RSP disassembly via a compile time option
Chris Moeller
parent
fcede20802
commit
256040357e
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@ -0,0 +1,231 @@
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/******************************************************************************\
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* Project: RSP Disassembler *
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* Authors: Iconoclast *
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* Release: 2013.09.12 *
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* License: CC0 Public Domain Dedication *
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* *
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* To the extent possible under law, the author(s) have dedicated all copyright *
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* and related and neighboring rights to this software to the public domain *
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* worldwide. This software is distributed without any warranty. *
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* *
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* You should have received a copy of the CC0 Public Domain Dedication along *
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* with this software. *
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* If not, see <http://creativecommons.org/publicdomain/zero/1.0/>. *
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\******************************************************************************/
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#ifndef MATRIX_H
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#define MATRIX_H
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#define reserved_ "illegal"
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/* Or, "invalid". Change it to whatever, but it must NOT exceed 7 letters. */
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static const char mnemonics_PRIMARY[64][8] = {
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"SPECIAL","REGIMM ","J ","JAL ","BEQ ","BNE ","BLEZ ","BGTZ ",
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"ADDI ","ADDIU ","SLTI ","SLTIU ","ANDI ","ORI ","XORI ","LUI ",
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"COP0 ",reserved_,"COP2 ",reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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"LB ","LH ",reserved_,"LW ","LBU ","LHU ",reserved_,reserved_,
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"SB ","SH ",reserved_,"SW ",reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,"LWC2 ",reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,"SWC2 ",reserved_,reserved_,reserved_,reserved_,reserved_
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};
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static const char mnemonics_SPECIAL[64][8] = {
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"SLL ",reserved_,"SRL ","SRA ","SLLV ",reserved_,"SRLV ","SRAV ",
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"JR ","JALR ",reserved_,reserved_,reserved_,"BREAK ",reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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"ADD ","ADDU ","SUB ","SUBU ","AND ","OR ","XOR ","NOR ",
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reserved_,reserved_,"SLT ","SLTU ",reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_
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};
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static const char mnemonics_REGIMM[32][8] = {
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"BLTZ ","BGEZ ",reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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"BLTZAL ","BGEZAL ",reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_
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};
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static const char mnemonics_COP0[32][8] = {
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"MFC0 ",reserved_,reserved_,reserved_,"MTC0 ",reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_
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};
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static const char mnemonics_COP2[32][8] = {
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"MFC2 ",reserved_,"CFC2 ",reserved_,"MTC2 ",reserved_,"CTC2 ",reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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"C2 ","C2 ","C2 ","C2 ","C2 ","C2 ","C2 ","C2 ",
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"C2 ","C2 ","C2 ","C2 ","C2 ","C2 ","C2 ","C2 "
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};
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static const char mnemonics_LWC2[32][8] = {
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"LBV ","LSV ","LLV ","LDV ","LQV ","LRV ","LPV ","LUV ",
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"LHV ","LFV ",reserved_,"LTV ",reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_
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};
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static const char mnemonics_SWC2[32][8] = {
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"SBV ","SSV ","SLV ","SDV ","SQV ","SRV ","SPV ","SUV ",
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"SHV ","SFV ","SWV ","STV ",reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_
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};
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static const char mnemonics_C2[64][8] = {
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"VMULF ","VMULU ",reserved_,reserved_,"VMUDL ","VMUDM ","VMUDN ","VMUDH ",
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"VMACF ","VMACU ",reserved_,"VMACQ ","VMADL ","VMADM ","VMADN ","VMADH ",
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"VADD ","VSUB ",reserved_,"VABS ","VADDC ","VSUBC ",reserved_,reserved_,
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reserved_,reserved_,reserved_,reserved_,reserved_,"VSAW ",reserved_,reserved_,
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"VLT ","VEQ ","VNE ","VGE ","VCL ","VCH ","VCR ","VMRG ",
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"VAND ","VNAND ","VOR ","VNOR ","VXOR ","VNXOR ",reserved_,reserved_,
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"VRCP ","VRCPL ","VRCPH ","VMOV ","VRSQ ","VRSQL ","VRSQH ","VNOP ",
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reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_
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};
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/*
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* This is a dynamic-style disassembler. If it was really coded entirely for
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* speed then the instruction decoding fetching would be more static,
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* but this was mostly written to be accurate and small on size, not fastest.
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*/
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static const char tokens_CR_V[4][4] = {
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"vco",
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"vcc",
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"vce", "vce" /* exception override: only three control registers */
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};
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static const char* computational_elements[16] = {
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"", /* vector operand */
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"[]",
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"[0q]", "[1q]", /* scalar quarter */
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"[0h]", "[1h]", "[2h]", "[3h]", /* scalar half */
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"[0]", "[1]", "[2]", "[3]", "[4]", "[5]", "[6]", "[7]" /* scalar whole */
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};
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/*
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* Syntax above is strict RSP assembler:
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* 1. The letters must be lower-case, not upper-case.
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* 2. It is not legal to append a 'w' for the scalar whole elements.
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* 3. e==0x1 is impossible to set in the assembler; "[]" is just for debug.
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*/
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void disassemble(char disasm[32], int IW)
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{
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register int ID;
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unsigned short imm = (IW & 0x0000FFFF);
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const signed int offset = -(IW & 0x00008000) | imm;
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const unsigned int target = IW%0x04000000 << 2;
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const int func = IW % 64;
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const int sa = (IW >> 6) & 31;
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const int rd = (IW & 0x0000FFFF) >> 11;
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const int rt = (IW >> 16) & 31;
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const int rs = (IW >> 21) & 31;
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const int op = (IW >> 26) & 63;
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if ((op & ~001) == 000) /* SPECIAL/REGIMM */
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ID = op + 1;
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else if ((op & 075) == 020) /* COPz */
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ID = (op & 002) ? 04 + ((IW & 0x02000000) ? 3 : 0) : 03;
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else if ((op & 067) == 062) /* ?WC2 */
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ID = 05 + ((op & 010) ? 1 : 0);
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else
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ID = 00;
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ID = (ID % 8) & 07; /* Help compiler see this as an aligned jump: */
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switch (ID)
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{
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char opcode[8];
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case 00:
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strcpy(opcode, mnemonics_PRIMARY[op]);
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if (op & 32) /* op > 31: scalar loads and stores */
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sprintf(disasm, "%s $%u, %i($%u)", opcode, rt, offset, rs);
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else if (op & 8) /* 16 > op > 8: arithmetic/logical immediate op */
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if (op == 0xF) /* LUI does not encode rs. */
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sprintf(disasm, "%s $%u, 0x%04X", opcode, rt, imm);
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else
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sprintf(disasm, "%s $%u, $%u, 0x%04X", opcode, rt, rs, imm);
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else if (op & 4) /* 8 > op > 4: primary branches */
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if (op & 2) /* BLEZ, BGTZ */
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sprintf(disasm, "%s $%u, %i", opcode, rs, offset);
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else /* BEQ, BNE */
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sprintf(disasm, "%s $%u, $%u, %i", opcode, rs, rt, offset);
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else if (op & 2) /* J and JAL */
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sprintf(disasm, "%s 0x%07X", opcode, target);
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else /* RESERVED */
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sprintf(disasm, "%s:%08X", opcode, IW);
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return;
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case 01:
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strcpy(opcode, mnemonics_SPECIAL[func]);
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if (func & 040) /* func > 31: arithmetic/logic R-op (omit traps) */
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sprintf(disasm, "%s $%u, $%u, $%u", opcode, rd, rs, rt);
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else if (func < 8) /* scalar shifts */
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if (func & 4) /* variable */
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sprintf(disasm, "%s $%u, $%u, $%u", opcode, rd, rt, rs);
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else
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sprintf(disasm, "%s $%u, $%u, %u", opcode, rd, rt, sa);
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else if (func == 010) /* JR */
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sprintf(disasm, "%s $%u", opcode, rs);
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else if (func == 011) /* JALR */
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sprintf(disasm, "%s $%u, $%u", opcode, rd, rs);
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else if (func == 015) /* BREAK */
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strcpy(disasm, opcode); /* sprintf "BREAK" + secret code mask */
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else /* RESERVED */
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sprintf(disasm, "%s:%08X", opcode, IW);
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return;
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case 02:
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strcpy(opcode, mnemonics_REGIMM[rt]);
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if ((rt & 016) == 000) /* BLTZ[AL] and BGEZ[AL] */
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sprintf(disasm, "%s $%u, %i", opcode, rs, offset);
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else /* RESERVED */
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sprintf(disasm, "%s:%08X", opcode, IW);
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return;
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case 03:
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strcpy(opcode, mnemonics_COP0[rs]);
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if ((rs & 033) != 000)
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sprintf(disasm, "%s:%08X", opcode, IW); /* RESERVED */
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else /* M?C0 */
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sprintf(disasm, "%s $%u, $c%u", opcode, rt, rd & 0xF);
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return;
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case 04:
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strcpy(opcode, mnemonics_COP2[rs]);
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if (opcode[0] == 'M') /* M?C2 */
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sprintf(disasm, "%s $%u, $v%u[0x%X]", opcode, rt, rd, sa >> 1);
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else if (opcode[0] == 'C') /* C?C2 */
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sprintf(disasm, "%s $%u, $%s", opcode, rt, tokens_CR_V[rd % 4]);
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else /* RESERVED */
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sprintf(disasm, "%s:%08X", opcode, IW);
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return;
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case 05:
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strcpy(opcode, mnemonics_LWC2[rd]);
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if (opcode[0] != 'L')
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sprintf(disasm, "%s:%08X", opcode, IW); /* RESERVED */
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else
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sprintf(disasm, "%s $v%u[0x%X], %i($%u)", opcode, rt, sa >> 1,
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-(IW & 0x00000040) | func, rs);
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return;
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case 06:
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strcpy(opcode, mnemonics_SWC2[rd]);
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if (opcode[0] != 'S')
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sprintf(disasm, "%s:%08X", opcode, IW); /* RESERVED */
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else
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sprintf(disasm, "%s $v%u[0x%X], %i($%u)", opcode, rt, sa >> 1,
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-(IW & 0x00000040) | func, rs);
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return;
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case 07:
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strcpy(opcode, mnemonics_C2[func]);
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if (opcode[0] != 'V')
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sprintf(disasm, "%s:%08X", opcode, IW); /* RESERVED */
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else if (func == 067) /* VNOP */
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strcpy(disasm, opcode);
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else if (func >= 060) /* VRCP?, VRSQ?, and VMOV */
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sprintf(disasm, "%s $v%u[%u], $v%u[0x%X]", opcode, sa, rd & 07,
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rt, rs & 0xF);
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else /* the most common vectors */
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if (func == 035) /* VSAR "VSAW", unconditional element syntax */
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sprintf(disasm, "%s $v%u, $v%u, $v%u[%u]", opcode, sa, rd,
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rt, rs & 07); /* rs&7: 00"High", 01"Middle", 02"Low" */
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else /* conditional element syntax: e != 0x0 */
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sprintf(disasm, "%s $v%u, $v%u, $v%u%s", opcode, sa, rd, rt,
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computational_elements[rs & 0xF]);
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return;
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}
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}
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#endif
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@ -14,13 +14,13 @@
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#include "vu.h"
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#include "vu.h"
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#ifdef VU_EMULATE_SCALAR_ACCUMULATOR_READ
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#ifdef VU_EMULATE_SCALAR_ACCUMULATOR_READ
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static void VSAR(int vd, int vs, int vt, int e)
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static void VSAR(usf_state_t * state, int vd, int vs, int vt, int e)
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{
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{
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ALIGNED short oldval[N];
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ALIGNED short oldval[N];
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register int i;
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register int i;
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for (i = 0; i < N; i++)
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for (i = 0; i < N; i++)
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oldval[i] = VR[vs][i];
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oldval[i] = state->VR[vs][i];
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vt = 0;
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vt = 0;
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/* Even though VT is ignored in VSAR, according to official sources as well
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/* Even though VT is ignored in VSAR, according to official sources as well
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* as reversing, lots of games seem to specify it as non-zero, possibly to
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* as reversing, lots of games seem to specify it as non-zero, possibly to
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@ -39,7 +39,7 @@ static void VSAR(int vd, int vs, int vt, int e)
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vst1q_s16(VR[vd], zero);
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vst1q_s16(VR[vd], zero);
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#else
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#else
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for (i = 0; i < N; i++)
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for (i = 0; i < N; i++)
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VR[vd][i] = 0x0000; /* override behavior (zilmar) */
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state->VR[vd][i] = 0x0000; /* override behavior (zilmar) */
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#endif
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#endif
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}
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}
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else
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else
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@ -48,12 +48,12 @@ static void VSAR(int vd, int vs, int vt, int e)
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vector_copy(VR[vd], VACC[e]);
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vector_copy(VR[vd], VACC[e]);
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#else
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#else
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for (i = 0; i < N; i++)
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for (i = 0; i < N; i++)
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VR[vd][i] = VACC[e][i];
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state->VR[vd][i] = state->VACC[e][i];
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#endif
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#endif
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}
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}
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for (i = 0; i < N; i++)
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for (i = 0; i < N; i++)
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VACC[e][i] = oldval[i]; /* ... = VS */
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state->VACC[e][i] = oldval[i]; /* ... = VS */
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return;
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return;
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}
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}
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#endif
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#endif
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