Removed unnecessary files
parent
b8b93103bf
commit
2aa6ee4378
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@ -1,113 +0,0 @@
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#define CYCLE_ACCURATE
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#include "smp.hpp"
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#define SMP_CPP
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namespace SuperFamicom {
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#include "algorithms.cpp"
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#include "core.cpp"
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#include "memory.cpp"
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#include "timing.cpp"
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void SMP::synchronize_dsp() {
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while(dsp.clock < 0) dsp.enter();
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}
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void SMP::enter() {
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while(clock < 0 && sample_buffer < sample_buffer_end) op_step();
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}
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void SMP::render(int16_t * buffer, unsigned count)
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{
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while (count > 4096) {
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sample_buffer = buffer;
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sample_buffer_end = buffer + 4096;
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buffer += 4096;
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count -= 4096;
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clock -= 32 * 24 * 4096;
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enter();
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}
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sample_buffer = buffer;
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sample_buffer_end = buffer + count;
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clock -= 32 * 24 * count;
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enter();
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}
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void SMP::skip(unsigned count)
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{
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while (count > 4096) {
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sample_buffer = 0;
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sample_buffer_end = (const int16_t *) 4096;
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count -= 4096;
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clock -= 32 * 24 * 4096;
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enter();
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}
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sample_buffer = 0;
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sample_buffer_end = (const int16_t *) (intptr_t) count;
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clock -= 32 * 24 * count;
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enter();
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}
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void SMP::sample(int16_t left, int16_t right)
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{
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if ( sample_buffer >= (const int16_t *) (intptr_t) 4096 ) {
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if ( sample_buffer < sample_buffer_end ) *sample_buffer++ = left;
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if ( sample_buffer < sample_buffer_end ) *sample_buffer++ = right;
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}
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else if ( sample_buffer < sample_buffer_end ){
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sample_buffer += 2;
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}
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}
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void SMP::power() {
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timer0.target = 0;
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timer1.target = 0;
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timer2.target = 0;
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reset();
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dsp.power();
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}
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void SMP::reset() {
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for(unsigned n = 0x0000; n <= 0xffff; n++) apuram[n] = 0x00;
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opcode_number = 0;
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opcode_cycle = 0;
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regs.pc = 0xffc0;
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regs.sp = 0xef;
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regs.a = 0x00;
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regs.x = 0x00;
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regs.y = 0x00;
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regs.p = 0x02;
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//$00f1
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status.iplrom_enable = true;
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//$00f2
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status.dsp_addr = 0x00;
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//$00f8,$00f9
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status.ram00f8 = 0x00;
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status.ram00f9 = 0x00;
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//timers
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timer0.enable = timer1.enable = timer2.enable = false;
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timer0.stage1_ticks = timer1.stage1_ticks = timer2.stage1_ticks = 0;
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timer0.stage2_ticks = timer1.stage2_ticks = timer2.stage2_ticks = 0;
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timer0.stage3_ticks = timer1.stage3_ticks = timer2.stage3_ticks = 0;
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}
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SMP::SMP() : dsp( *this ), clock( 0 ) {
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apuram = new uint8_t[64 * 1024];
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for(auto& byte : iplrom) byte = 0;
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set_sfm_queue(0, 0);
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}
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SMP::~SMP() {
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delete [] apuram;
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}
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}
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@ -1,144 +0,0 @@
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#ifndef _higan_smp_h_
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#define _higan_smp_h_
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#include "blargg_common.h"
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#include "../dsp/dsp.hpp"
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namespace SuperFamicom {
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struct SMP {
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long clock;
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uint8_t iplrom[64];
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uint8_t* apuram;
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SuperFamicom::DSP dsp;
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inline void synchronize_dsp();
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unsigned port_read(unsigned port);
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void port_write(unsigned port, unsigned data);
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unsigned mmio_read(unsigned addr);
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void mmio_write(unsigned addr, unsigned data);
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void enter();
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void power();
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void reset();
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void render(int16_t * buffer, unsigned count);
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void skip(unsigned count);
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uint8_t sfm_last[4];
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private:
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uint8_t const* sfm_queue;
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uint8_t const* sfm_queue_end;
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public:
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void set_sfm_queue(const uint8_t* queue, const uint8_t* queue_end);
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private:
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int16_t * sample_buffer;
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int16_t const* sample_buffer_end;
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public:
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void sample( int16_t, int16_t );
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SMP();
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~SMP();
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//private:
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struct Flags {
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bool n, v, p, b, h, i, z, c;
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inline operator unsigned() const {
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return (n << 7) | (v << 6) | (p << 5) | (b << 4)
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| (h << 3) | (i << 2) | (z << 1) | (c << 0);
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};
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inline unsigned operator=(unsigned data) {
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n = data & 0x80; v = data & 0x40; p = data & 0x20; b = data & 0x10;
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h = data & 0x08; i = data & 0x04; z = data & 0x02; c = data & 0x01;
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return data;
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}
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inline unsigned operator|=(unsigned data) { return operator=(operator unsigned() | data); }
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inline unsigned operator^=(unsigned data) { return operator=(operator unsigned() ^ data); }
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inline unsigned operator&=(unsigned data) { return operator=(operator unsigned() & data); }
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};
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unsigned opcode_number;
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unsigned opcode_cycle;
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struct Regs {
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uint16_t pc;
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uint8_t sp;
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union {
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uint16_t ya;
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#ifdef BLARGG_BIG_ENDIAN
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struct { uint8_t y, a; };
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#else
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struct { uint8_t a, y; };
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#endif
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};
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uint8_t x;
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Flags p;
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} regs;
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uint16_t rd, wr, dp, sp, ya, bit;
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struct Status {
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//$00f1
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bool iplrom_enable;
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//$00f2
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unsigned dsp_addr;
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//$00f8,$00f9
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unsigned ram00f8;
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unsigned ram00f9;
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} status;
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template<unsigned frequency>
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struct Timer {
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bool enable;
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uint8_t target;
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uint8_t stage1_ticks;
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uint8_t stage2_ticks;
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uint8_t stage3_ticks;
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void tick();
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void tick(unsigned clocks);
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};
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Timer<128> timer0;
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Timer<128> timer1;
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Timer< 16> timer2;
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void tick();
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inline void op_io();
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inline uint8_t op_read(uint16_t addr);
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inline void op_write(uint16_t addr, uint8_t data);
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inline void op_step();
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static const unsigned cycle_count_table[256];
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uint8_t op_adc (uint8_t x, uint8_t y);
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uint16_t op_addw(uint16_t x, uint16_t y);
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uint8_t op_and (uint8_t x, uint8_t y);
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uint8_t op_cmp (uint8_t x, uint8_t y);
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uint16_t op_cmpw(uint16_t x, uint16_t y);
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uint8_t op_eor (uint8_t x, uint8_t y);
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uint8_t op_inc (uint8_t x);
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uint8_t op_dec (uint8_t x);
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uint8_t op_or (uint8_t x, uint8_t y);
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uint8_t op_sbc (uint8_t x, uint8_t y);
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uint16_t op_subw(uint16_t x, uint16_t y);
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uint8_t op_asl (uint8_t x);
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uint8_t op_lsr (uint8_t x);
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uint8_t op_rol (uint8_t x);
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uint8_t op_ror (uint8_t x);
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};
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inline void SMP::set_sfm_queue(const uint8_t *queue, const uint8_t *queue_end) { sfm_queue = queue; sfm_queue_end = queue_end; sfm_last[0] = 0; sfm_last[1] = 0; sfm_last[2] = 0; sfm_last[3] = 0; }
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};
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#endif
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