From 640e8b7304479804589e3ee260316a70366c98a4 Mon Sep 17 00:00:00 2001 From: Christopher Snowhill Date: Fri, 11 Sep 2020 17:08:37 -0700 Subject: [PATCH] Various architectural changes to make Intel plus Apple Silicon build successfully --- Frameworks/GME/vgmplay/chips/yam.c | 4 + .../HighlyTheoretical/Core/yam.c | 4 + .../HivelyPlayer/HivelyPlayer/hvl_replay.h | 5 + .../Opus/Opus.xcodeproj/project.pbxproj | 80 +++ Frameworks/Opus/Opus/opus/celt/arm/armcpu.c | 2 +- .../Opus/Opus/opus/celt/arm/celt_neon_intr.c | 3 +- .../opus/celt/arm/celt_pitch_xcorr_arm-gnu.S | 1 + .../Opus/Opus/opus/celt/x86/celt_lpc_sse.c | 2 +- .../Opus/Opus/opus/celt/x86/pitch_sse.c | 4 + .../Opus/Opus/opus/celt/x86/pitch_sse2.c | 4 + .../Opus/Opus/opus/celt/x86/pitch_sse4_1.c | 3 +- .../Opus/Opus/opus/celt/x86/x86_celt_map.c | 8 + Frameworks/Opus/Opus/opus/celt/x86/x86cpu.c | 9 +- Frameworks/Opus/Opus/opus/config.h | 10 + .../Opus/Opus/opus/silk/x86/NSQ_del_dec_sse.c | 4 + Frameworks/Opus/Opus/opus/silk/x86/NSQ_sse.c | 4 + Frameworks/Opus/Opus/opus/silk/x86/VAD_sse.c | 4 + .../Opus/Opus/opus/silk/x86/VQ_WMat_EC_sse.c | 4 + .../Opus/Opus/opus/silk/x86/x86_silk_map.c | 2 +- .../lazyusf2.xcodeproj/project.pbxproj | 8 +- .../lazyusf2/lazyusf2/r4300/cached_interp.c | 8 + .../lazyusf2/lazyusf2/r4300/exception.c | 4 + Frameworks/lazyusf2/lazyusf2/r4300/interupt.c | 2 + Frameworks/lazyusf2/lazyusf2/r4300/r4300.c | 2 + Frameworks/lazyusf2/lazyusf2/r4300/recomp.c | 556 +++++++++++++++++- Frameworks/lazyusf2/lazyusf2/r4300/recomp.h | 2 + .../lazyusf2/lazyusf2/r4300/x86_64/assemble.c | 4 + .../lazyusf2/lazyusf2/r4300/x86_64/assemble.h | 2 + .../lazyusf2/r4300/x86_64/assemble_struct.h | 2 + .../lazyusf2/lazyusf2/r4300/x86_64/gbc.c | 2 + .../lazyusf2/lazyusf2/r4300/x86_64/gcop0.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gcop1.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gcop1_d.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gcop1_l.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gcop1_s.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gcop1_w.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gr4300.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gregimm.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gspecial.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/gtlb.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/regcache.c | 3 +- .../lazyusf2/lazyusf2/r4300/x86_64/regcache.h | 2 + .../lazyusf2/lazyusf2/r4300/x86_64/rjump.c | 4 +- Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.h | 6 + .../lazyusf2/lazyusf2/rsp_lle/vu/vsaw.h | 18 +- .../lazyusf2/lazyusf2/usf/usf_internal.h | 2 + Frameworks/libsidplay/libsidplay/config.h | 2 + .../vio2sf/vio2sf/src/vio2sf/desmume/SPU.h | 17 +- .../vio2sf/vio2sf/src/vio2sf/desmume/types.h | 5 + 49 files changed, 799 insertions(+), 39 deletions(-) diff --git a/Frameworks/GME/vgmplay/chips/yam.c b/Frameworks/GME/vgmplay/chips/yam.c index 9ee132ac9..700c52c26 100644 --- a/Frameworks/GME/vgmplay/chips/yam.c +++ b/Frameworks/GME/vgmplay/chips/yam.c @@ -32,8 +32,12 @@ #ifndef _WIN32 #define __cdecl +#ifdef __aarch64__ +#define __fastcall +#else #define __fastcall __attribute__((regparm(3))) #endif +#endif /* No dynarec for x86_64 yet */ #if defined(_WIN32) || defined(__i386__) diff --git a/Frameworks/HighlyTheoretical/HighlyTheoretical/Core/yam.c b/Frameworks/HighlyTheoretical/HighlyTheoretical/Core/yam.c index e09c04933..031b7ee30 100644 --- a/Frameworks/HighlyTheoretical/HighlyTheoretical/Core/yam.c +++ b/Frameworks/HighlyTheoretical/HighlyTheoretical/Core/yam.c @@ -24,8 +24,12 @@ #ifndef _WIN32 #define __cdecl +#ifdef __aarch64__ +#define __fastcall +#else #define __fastcall __attribute__((regparm(3))) #endif +#endif /* No dynarec for x86_64 yet */ #if defined(_WIN32) || defined(__i386__) diff --git a/Frameworks/HivelyPlayer/HivelyPlayer/hvl_replay.h b/Frameworks/HivelyPlayer/HivelyPlayer/hvl_replay.h index c3716085e..5599cae34 100644 --- a/Frameworks/HivelyPlayer/HivelyPlayer/hvl_replay.h +++ b/Frameworks/HivelyPlayer/HivelyPlayer/hvl_replay.h @@ -18,8 +18,13 @@ typedef char TEXT; #ifdef _WIN32 typedef int BOOL; #else +#ifdef __aarch64__ +#include +typedef bool BOOL; +#else typedef signed char BOOL; #endif +#endif #define TRUE 1 #define FALSE 0 diff --git a/Frameworks/Opus/Opus.xcodeproj/project.pbxproj b/Frameworks/Opus/Opus.xcodeproj/project.pbxproj index 883d1b102..16efc9460 100644 --- a/Frameworks/Opus/Opus.xcodeproj/project.pbxproj +++ b/Frameworks/Opus/Opus.xcodeproj/project.pbxproj @@ -9,6 +9,22 @@ /* Begin PBXBuildFile section */ 830F884C19C9107E00420FB0 /* Ogg.framework in CopyFiles */ = {isa = PBXBuildFile; fileRef = 830F884719C9105E00420FB0 /* Ogg.framework */; settings = {ATTRIBUTES = (CodeSignOnCopy, RemoveHeadersOnCopy, ); }; }; 830F885F19C9145E00420FB0 /* Ogg.framework in Frameworks */ = {isa = PBXBuildFile; fileRef = 830F884719C9105E00420FB0 /* Ogg.framework */; }; + 8374715B2509BC1A00A6D7CA /* fft_arm.h in Headers */ = {isa = PBXBuildFile; fileRef = 8374714A2509BC1A00A6D7CA /* fft_arm.h */; }; + 8374715C2509BC1A00A6D7CA /* kiss_fft_armv4.h in Headers */ = {isa = PBXBuildFile; fileRef = 8374714B2509BC1A00A6D7CA /* kiss_fft_armv4.h */; }; + 8374715F2509BC1A00A6D7CA /* fixed_armv4.h in Headers */ = {isa = PBXBuildFile; fileRef = 8374714E2509BC1A00A6D7CA /* fixed_armv4.h */; }; + 837471612509BC1A00A6D7CA /* kiss_fft_armv5e.h in Headers */ = {isa = PBXBuildFile; fileRef = 837471502509BC1A00A6D7CA /* kiss_fft_armv5e.h */; }; + 837471622509BC1A00A6D7CA /* pitch_arm.h in Headers */ = {isa = PBXBuildFile; fileRef = 837471512509BC1A00A6D7CA /* pitch_arm.h */; }; + 837471632509BC1A00A6D7CA /* mdct_arm.h in Headers */ = {isa = PBXBuildFile; fileRef = 837471522509BC1A00A6D7CA /* mdct_arm.h */; }; + 837471642509BC1A00A6D7CA /* armcpu.c in Sources */ = {isa = PBXBuildFile; fileRef = 837471532509BC1A00A6D7CA /* armcpu.c */; }; + 837471652509BC1A00A6D7CA /* fixed_armv5e.h in Headers */ = {isa = PBXBuildFile; fileRef = 837471542509BC1A00A6D7CA /* fixed_armv5e.h */; }; + 837471662509BC1A00A6D7CA /* arm_celt_map.c in Sources */ = {isa = PBXBuildFile; fileRef = 837471552509BC1A00A6D7CA /* arm_celt_map.c */; }; + 837471692509BC1A00A6D7CA /* celt_neon_intr.c in Sources */ = {isa = PBXBuildFile; fileRef = 837471582509BC1A00A6D7CA /* celt_neon_intr.c */; }; + 8374716A2509BC1A00A6D7CA /* armopts.s.in in Resources */ = {isa = PBXBuildFile; fileRef = 837471592509BC1A00A6D7CA /* armopts.s.in */; }; + 8374716B2509BC1A00A6D7CA /* armcpu.h in Headers */ = {isa = PBXBuildFile; fileRef = 8374715A2509BC1A00A6D7CA /* armcpu.h */; }; + 837471712509C5D100A6D7CA /* macros_armv4.h in Headers */ = {isa = PBXBuildFile; fileRef = 8374716D2509C5D100A6D7CA /* macros_armv4.h */; }; + 837471722509C5D100A6D7CA /* SigProc_FIX_armv4.h in Headers */ = {isa = PBXBuildFile; fileRef = 8374716E2509C5D100A6D7CA /* SigProc_FIX_armv4.h */; }; + 837471732509C5D100A6D7CA /* macros_armv5e.h in Headers */ = {isa = PBXBuildFile; fileRef = 8374716F2509C5D100A6D7CA /* macros_armv5e.h */; }; + 837471742509C5D100A6D7CA /* SigProc_FIX_armv5e.h in Headers */ = {isa = PBXBuildFile; fileRef = 837471702509C5D100A6D7CA /* SigProc_FIX_armv5e.h */; }; 8375B07017FFEABB0092A79F /* InfoPlist.strings in Resources */ = {isa = PBXBuildFile; fileRef = 8375B06E17FFEABB0092A79F /* InfoPlist.strings */; }; 8375B20B17FFEB2C0092A79F /* _kiss_fft_guts.h in Headers */ = {isa = PBXBuildFile; fileRef = 8375B0A317FFEB2C0092A79F /* _kiss_fft_guts.h */; }; 8375B20C17FFEB2C0092A79F /* arch.h in Headers */ = {isa = PBXBuildFile; fileRef = 8375B0A417FFEB2C0092A79F /* arch.h */; }; @@ -273,6 +289,22 @@ /* Begin PBXFileReference section */ 830F884119C9105E00420FB0 /* Ogg.xcodeproj */ = {isa = PBXFileReference; lastKnownFileType = "wrapper.pb-project"; name = Ogg.xcodeproj; path = ../Ogg/macosx/Ogg.xcodeproj; sourceTree = ""; }; 833F68421CDBCABC00AFB9F0 /* es */ = {isa = PBXFileReference; lastKnownFileType = text.plist.strings; name = es; path = es.lproj/InfoPlist.strings; sourceTree = ""; }; + 8374714A2509BC1A00A6D7CA /* fft_arm.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = fft_arm.h; sourceTree = ""; }; + 8374714B2509BC1A00A6D7CA /* kiss_fft_armv4.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = kiss_fft_armv4.h; sourceTree = ""; }; + 8374714E2509BC1A00A6D7CA /* fixed_armv4.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = fixed_armv4.h; sourceTree = ""; }; + 837471502509BC1A00A6D7CA /* kiss_fft_armv5e.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = kiss_fft_armv5e.h; sourceTree = ""; }; + 837471512509BC1A00A6D7CA /* pitch_arm.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = pitch_arm.h; sourceTree = ""; }; + 837471522509BC1A00A6D7CA /* mdct_arm.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = mdct_arm.h; sourceTree = ""; }; + 837471532509BC1A00A6D7CA /* armcpu.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = armcpu.c; sourceTree = ""; }; + 837471542509BC1A00A6D7CA /* fixed_armv5e.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = fixed_armv5e.h; sourceTree = ""; }; + 837471552509BC1A00A6D7CA /* arm_celt_map.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = arm_celt_map.c; sourceTree = ""; }; + 837471582509BC1A00A6D7CA /* celt_neon_intr.c */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.c; path = celt_neon_intr.c; sourceTree = ""; }; + 837471592509BC1A00A6D7CA /* armopts.s.in */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = text; path = armopts.s.in; sourceTree = ""; }; + 8374715A2509BC1A00A6D7CA /* armcpu.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = armcpu.h; sourceTree = ""; }; + 8374716D2509C5D100A6D7CA /* macros_armv4.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = macros_armv4.h; sourceTree = ""; }; + 8374716E2509C5D100A6D7CA /* SigProc_FIX_armv4.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = SigProc_FIX_armv4.h; sourceTree = ""; }; + 8374716F2509C5D100A6D7CA /* macros_armv5e.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = macros_armv5e.h; sourceTree = ""; }; + 837471702509C5D100A6D7CA /* SigProc_FIX_armv5e.h */ = {isa = PBXFileReference; fileEncoding = 4; lastKnownFileType = sourcecode.c.h; path = SigProc_FIX_armv5e.h; sourceTree = ""; }; 8375B06217FFEABB0092A79F /* Opus.framework */ = {isa = PBXFileReference; explicitFileType = wrapper.framework; includeInIndex = 0; path = Opus.framework; sourceTree = BUILT_PRODUCTS_DIR; }; 8375B06D17FFEABB0092A79F /* Opus-Info.plist */ = {isa = PBXFileReference; lastKnownFileType = text.plist.xml; path = "Opus-Info.plist"; sourceTree = ""; }; 8375B06F17FFEABB0092A79F /* en */ = {isa = PBXFileReference; lastKnownFileType = text.plist.strings; name = en; path = en.lproj/InfoPlist.strings; sourceTree = ""; }; @@ -520,6 +552,36 @@ name = Products; sourceTree = ""; }; + 837471492509BC1A00A6D7CA /* arm */ = { + isa = PBXGroup; + children = ( + 837471552509BC1A00A6D7CA /* arm_celt_map.c */, + 837471532509BC1A00A6D7CA /* armcpu.c */, + 8374715A2509BC1A00A6D7CA /* armcpu.h */, + 837471592509BC1A00A6D7CA /* armopts.s.in */, + 837471582509BC1A00A6D7CA /* celt_neon_intr.c */, + 8374714A2509BC1A00A6D7CA /* fft_arm.h */, + 8374714E2509BC1A00A6D7CA /* fixed_armv4.h */, + 837471542509BC1A00A6D7CA /* fixed_armv5e.h */, + 8374714B2509BC1A00A6D7CA /* kiss_fft_armv4.h */, + 837471502509BC1A00A6D7CA /* kiss_fft_armv5e.h */, + 837471522509BC1A00A6D7CA /* mdct_arm.h */, + 837471512509BC1A00A6D7CA /* pitch_arm.h */, + ); + path = arm; + sourceTree = ""; + }; + 8374716C2509C5D100A6D7CA /* arm */ = { + isa = PBXGroup; + children = ( + 8374716D2509C5D100A6D7CA /* macros_armv4.h */, + 8374716E2509C5D100A6D7CA /* SigProc_FIX_armv4.h */, + 8374716F2509C5D100A6D7CA /* macros_armv5e.h */, + 837471702509C5D100A6D7CA /* SigProc_FIX_armv5e.h */, + ); + path = arm; + sourceTree = ""; + }; 8375B05817FFEABB0092A79F = { isa = PBXGroup; children = ( @@ -588,6 +650,7 @@ 8375B0A217FFEB2C0092A79F /* celt */ = { isa = PBXGroup; children = ( + 837471492509BC1A00A6D7CA /* arm */, 837928B81C293C78005DBCEA /* x86 */, 837928AF1C293C6F005DBCEA /* cpu_support.h */, 837928DA1C29406E005DBCEA /* celt_encoder.c */, @@ -656,6 +719,7 @@ 8375B10917FFEB2C0092A79F /* silk */ = { isa = PBXGroup; children = ( + 8374716C2509C5D100A6D7CA /* arm */, 837928CB1C293CA1005DBCEA /* x86 */, 8375B10A17FFEB2C0092A79F /* A2NLSF.c */, 8375B10B17FFEB2C0092A79F /* ana_filt_bank_1.c */, @@ -900,11 +964,14 @@ 8375B30417FFEB2C0092A79F /* tables.h in Headers */, 8375B2B817FFEB2C0092A79F /* main_FLP.h in Headers */, 8375B2D817FFEB2C0092A79F /* macros.h in Headers */, + 837471712509C5D100A6D7CA /* macros_armv4.h in Headers */, 837928D61C293CA1005DBCEA /* SigProc_FIX_sse.h in Headers */, 837928C51C293C78005DBCEA /* pitch_sse.h in Headers */, 8375B27617FFEB2C0092A79F /* control.h in Headers */, 8375B2E417FFEB2C0092A79F /* pitch_est_defines.h in Headers */, + 837471732509C5D100A6D7CA /* macros_armv5e.h in Headers */, 8375B2D917FFEB2C0092A79F /* main.h in Headers */, + 837471612509BC1A00A6D7CA /* kiss_fft_armv5e.h in Headers */, 8375B22417FFEB2C0092A79F /* laplace.h in Headers */, 8375B23117FFEB2C0092A79F /* quant_bands.h in Headers */, 8375B22F17FFEB2C0092A79F /* pitch.h in Headers */, @@ -917,12 +984,15 @@ 8375B30117FFEB2C0092A79F /* structs.h in Headers */, 8375B31C17FFEB2C0092A79F /* opus_private.h in Headers */, 8375B25417FFEB2C0092A79F /* opus_custom.h in Headers */, + 837471652509BC1A00A6D7CA /* fixed_armv5e.h in Headers */, 8375B20C17FFEB2C0092A79F /* arch.h in Headers */, 8375B22817FFEB2C0092A79F /* mdct.h in Headers */, 8375B30C17FFEB2C0092A79F /* tuning_parameters.h in Headers */, 8375B2E717FFEB2C0092A79F /* PLC.h in Headers */, 8375B2ED17FFEB2C0092A79F /* resampler_private.h in Headers */, + 837471622509BC1A00A6D7CA /* pitch_arm.h in Headers */, 8375B27B17FFEB2C0092A79F /* debug.h in Headers */, + 837471742509C5D100A6D7CA /* SigProc_FIX_armv5e.h in Headers */, 8375B21417FFEB2C0092A79F /* celt_lpc.h in Headers */, 8375B36917FFEFFF0092A79F /* version.h in Headers */, 8375B2F717FFEB2C0092A79F /* SigProc_FIX.h in Headers */, @@ -934,6 +1004,7 @@ 8375B23317FFEB2C0092A79F /* rate.h in Headers */, 8375B22017FFEB2C0092A79F /* float_cast.h in Headers */, 8375B20B17FFEB2C0092A79F /* _kiss_fft_guts.h in Headers */, + 8374715C2509BC1A00A6D7CA /* kiss_fft_armv4.h in Headers */, 8375B21717FFEB2C0092A79F /* ecintrin.h in Headers */, 837928B41C293C6F005DBCEA /* static_modes_fixed_arm_ne10.h in Headers */, 8375B30D17FFEB2C0092A79F /* typedef.h in Headers */, @@ -941,14 +1012,18 @@ 8375B22217FFEB2C0092A79F /* kiss_fft.h in Headers */, 8375B23517FFEB2C0092A79F /* static_modes_fixed.h in Headers */, 8375B22917FFEB2C0092A79F /* mfrngcod.h in Headers */, + 8374715F2509BC1A00A6D7CA /* fixed_armv4.h in Headers */, + 837471632509BC1A00A6D7CA /* mdct_arm.h in Headers */, 8375B22617FFEB2C0092A79F /* mathops.h in Headers */, 837928B51C293C6F005DBCEA /* static_modes_float_arm_ne10.h in Headers */, 8375B21D17FFEB2C0092A79F /* entenc.h in Headers */, 8375B36817FFEFFF0092A79F /* config.h in Headers */, 8375B21F17FFEB2C0092A79F /* fixed_generic.h in Headers */, 8375B2D617FFEB2C0092A79F /* MacroCount.h in Headers */, + 8374715B2509BC1A00A6D7CA /* fft_arm.h in Headers */, 8375B21617FFEB2C0092A79F /* cwrs.h in Headers */, 837928D31C293CA1005DBCEA /* main_sse.h in Headers */, + 8374716B2509BC1A00A6D7CA /* armcpu.h in Headers */, 8375B2D717FFEB2C0092A79F /* MacroDebug.h in Headers */, 837928E01C2940A9005DBCEA /* analysis.h in Headers */, 8375B35217FFEB2C0092A79F /* internal.h in Headers */, @@ -956,6 +1031,7 @@ 8375B2C717FFEB2C0092A79F /* structs_FLP.h in Headers */, 8375B28417FFEB2C0092A79F /* define.h in Headers */, 8375B21B17FFEB2C0092A79F /* entdec.h in Headers */, + 837471722509C5D100A6D7CA /* SigProc_FIX_armv4.h in Headers */, ); runOnlyForDeploymentPostprocessing = 0; }; @@ -1045,6 +1121,7 @@ buildActionMask = 2147483647; files = ( 8375B07017FFEABB0092A79F /* InfoPlist.strings in Resources */, + 8374716A2509BC1A00A6D7CA /* armopts.s.in in Resources */, ); runOnlyForDeploymentPostprocessing = 0; }; @@ -1096,6 +1173,7 @@ 8375B27C17FFEB2C0092A79F /* dec_API.c in Sources */, 8375B2EA17FFEB2C0092A79F /* resampler.c in Sources */, 837928D81C293CA1005DBCEA /* VQ_WMat_EC_sse.c in Sources */, + 837471662509BC1A00A6D7CA /* arm_celt_map.c in Sources */, 837928C41C293C78005DBCEA /* pitch_sse.c in Sources */, 8375B2F517FFEB2C0092A79F /* shell_coder.c in Sources */, 8375B2CC17FFEB2C0092A79F /* init_decoder.c in Sources */, @@ -1107,6 +1185,7 @@ 8375B28317FFEB2C0092A79F /* decoder_set_fs.c in Sources */, 8375B2E817FFEB2C0092A79F /* process_NLSFs.c in Sources */, 8375B26D17FFEB2C0092A79F /* A2NLSF.c in Sources */, + 837471692509BC1A00A6D7CA /* celt_neon_intr.c in Sources */, 8375B2E217FFEB2C0092A79F /* NSQ.c in Sources */, 8375B2AE17FFEB2C0092A79F /* find_LTP_FLP.c in Sources */, 8375B2B917FFEB2C0092A79F /* noise_shape_analysis_FLP.c in Sources */, @@ -1184,6 +1263,7 @@ 8375B2E017FFEB2C0092A79F /* NLSF_VQ.c in Sources */, 8375B30E17FFEB2C0092A79F /* VAD.c in Sources */, 8375B23017FFEB2C0092A79F /* quant_bands.c in Sources */, + 837471642509BC1A00A6D7CA /* armcpu.c in Sources */, 8375B21A17FFEB2C0092A79F /* entdec.c in Sources */, 8375B27E17FFEB2C0092A79F /* decode_frame.c in Sources */, 8375B2A817FFEB2C0092A79F /* burg_modified_FLP.c in Sources */, diff --git a/Frameworks/Opus/Opus/opus/celt/arm/armcpu.c b/Frameworks/Opus/Opus/opus/celt/arm/armcpu.c index 5e5d10c34..4aad638d9 100644 --- a/Frameworks/Opus/Opus/opus/celt/arm/armcpu.c +++ b/Frameworks/Opus/Opus/opus/celt/arm/armcpu.c @@ -31,7 +31,7 @@ #include "config.h" #endif -#ifdef OPUS_HAVE_RTCD +#if defined(OPUS_HAVE_RTCD) && defined(__aarch64__) #include "armcpu.h" #include "cpu_support.h" diff --git a/Frameworks/Opus/Opus/opus/celt/arm/celt_neon_intr.c b/Frameworks/Opus/Opus/opus/celt/arm/celt_neon_intr.c index 47dce15ba..692190142 100644 --- a/Frameworks/Opus/Opus/opus/celt/arm/celt_neon_intr.c +++ b/Frameworks/Opus/Opus/opus/celt/arm/celt_neon_intr.c @@ -34,10 +34,11 @@ #include "config.h" #endif +#if !defined(FIXED_POINT) && defined(OPUS_ARM_MAY_HAVE_NEON_INTR) + #include #include "../pitch.h" -#if !defined(FIXED_POINT) /* * Function: xcorr_kernel_neon_float * --------------------------------- diff --git a/Frameworks/Opus/Opus/opus/celt/arm/celt_pitch_xcorr_arm-gnu.S b/Frameworks/Opus/Opus/opus/celt/arm/celt_pitch_xcorr_arm-gnu.S index 5b2ee55a1..81321091f 100644 --- a/Frameworks/Opus/Opus/opus/celt/arm/celt_pitch_xcorr_arm-gnu.S +++ b/Frameworks/Opus/Opus/opus/celt/arm/celt_pitch_xcorr_arm-gnu.S @@ -549,3 +549,4 @@ celt_pitch_xcorr_edsp_done: @ END: .section .note.GNU-stack,"",%progbits + diff --git a/Frameworks/Opus/Opus/opus/celt/x86/celt_lpc_sse.c b/Frameworks/Opus/Opus/opus/celt/x86/celt_lpc_sse.c index 9c5258169..bfa4ed80d 100644 --- a/Frameworks/Opus/Opus/opus/celt/x86/celt_lpc_sse.c +++ b/Frameworks/Opus/Opus/opus/celt/x86/celt_lpc_sse.c @@ -29,7 +29,7 @@ #include "config.h" #endif -#if defined(FIXED_POINT) +#if defined(FIXED_POINT) && defined(OPUS_X86_MAY_HAVE_SSE4_1) #include #include diff --git a/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse.c b/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse.c index 20e73126b..defa8b7aa 100644 --- a/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse.c +++ b/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse.c @@ -29,6 +29,8 @@ #include "config.h" #endif +#ifdef __x86_64__ + #include "macros.h" #include "celt_lpc.h" #include "stack_alloc.h" @@ -182,4 +184,6 @@ void comb_filter_const_sse(opus_val32 *y, opus_val32 *x, int T, int N, } +#endif + #endif diff --git a/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse2.c b/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse2.c index a0e7d1bea..16629b5d6 100644 --- a/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse2.c +++ b/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse2.c @@ -29,6 +29,8 @@ #include "config.h" #endif +#ifdef __x86_64__ + #include #include @@ -93,3 +95,5 @@ opus_val32 celt_inner_prod_sse2(const opus_val16 *x, const opus_val16 *y, return sum; } #endif + +#endif diff --git a/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse4_1.c b/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse4_1.c index a092c68b2..9fd5792ea 100644 --- a/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse4_1.c +++ b/Frameworks/Opus/Opus/opus/celt/x86/pitch_sse4_1.c @@ -29,6 +29,8 @@ #include "config.h" #endif +#if defined(OPUS_X86_MAY_HAVE_SSE4_1) && defined(FIXED_POINT) + #include #include @@ -38,7 +40,6 @@ #include "mathops.h" #include "pitch.h" -#if defined(OPUS_X86_MAY_HAVE_SSE4_1) && defined(FIXED_POINT) #include #include "x86cpu.h" diff --git a/Frameworks/Opus/Opus/opus/celt/x86/x86_celt_map.c b/Frameworks/Opus/Opus/opus/celt/x86/x86_celt_map.c index 1ed2acbcf..03a6ef924 100644 --- a/Frameworks/Opus/Opus/opus/celt/x86/x86_celt_map.c +++ b/Frameworks/Opus/Opus/opus/celt/x86/x86_celt_map.c @@ -29,11 +29,17 @@ #include "config.h" #endif +#ifdef __x86_64__ + +#include "cpu_support.h" +#include "arch.h" + #include "x86/x86cpu.h" #include "celt_lpc.h" #include "pitch.h" #include "pitch_sse.h" + #if defined(OPUS_HAVE_RTCD) # if defined(FIXED_POINT) @@ -146,3 +152,5 @@ void (*const COMB_FILTER_CONST_IMPL[OPUS_ARCHMASK + 1])( #endif #endif + +#endif diff --git a/Frameworks/Opus/Opus/opus/celt/x86/x86cpu.c b/Frameworks/Opus/Opus/opus/celt/x86/x86cpu.c index f850715e1..33131cd3e 100644 --- a/Frameworks/Opus/Opus/opus/celt/x86/x86cpu.c +++ b/Frameworks/Opus/Opus/opus/celt/x86/x86cpu.c @@ -29,17 +29,16 @@ #include "config.h" #endif +#if (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \ + (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \ + (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) + #include "cpu_support.h" #include "macros.h" #include "main.h" #include "pitch.h" #include "x86cpu.h" -#if (defined(OPUS_X86_MAY_HAVE_SSE) && !defined(OPUS_X86_PRESUME_SSE)) || \ - (defined(OPUS_X86_MAY_HAVE_SSE2) && !defined(OPUS_X86_PRESUME_SSE2)) || \ - (defined(OPUS_X86_MAY_HAVE_SSE4_1) && !defined(OPUS_X86_PRESUME_SSE4_1)) - - #if defined(_MSC_VER) #include diff --git a/Frameworks/Opus/Opus/opus/config.h b/Frameworks/Opus/Opus/opus/config.h index d9d405ace..2aa962100 100644 --- a/Frameworks/Opus/Opus/opus/config.h +++ b/Frameworks/Opus/Opus/opus/config.h @@ -41,9 +41,19 @@ POSSIBILITY OF SUCH DAMAGE. #define __MACOSX__ +#ifndef __aarch64__ #define OPUS_HAVE_RTCD 1 #define OPUS_X86_MAY_HAVE_SSE 1 #define OPUS_X86_MAY_HAVE_SSE2 1 #define OPUS_X86_MAY_HAVE_SSE4_1 1 +#else + +#undef OPUS_HAVE_RTCD +#define OPUS_ARM_MAY_HAVE_NEON 1 +#define OPUS_ARM_MAY_HAVE_NEON_INTR 1 +#define OPUS_ARM_PRESUME_NEON 1 +#define OPUS_ARM_PRESUME_NEON_INTR 1 +#endif + #endif CONFIG_H diff --git a/Frameworks/Opus/Opus/opus/silk/x86/NSQ_del_dec_sse.c b/Frameworks/Opus/Opus/opus/silk/x86/NSQ_del_dec_sse.c index f5245dc17..441d66c19 100644 --- a/Frameworks/Opus/Opus/opus/silk/x86/NSQ_del_dec_sse.c +++ b/Frameworks/Opus/Opus/opus/silk/x86/NSQ_del_dec_sse.c @@ -29,6 +29,8 @@ #include "config.h" #endif +#if defined(OPUS_X86_MAY_HAVE_SSE4_1) + #include #include #include @@ -855,3 +857,5 @@ static OPUS_INLINE void silk_nsq_del_dec_scale_states_sse4_1( } } } + +#endif diff --git a/Frameworks/Opus/Opus/opus/silk/x86/NSQ_sse.c b/Frameworks/Opus/Opus/opus/silk/x86/NSQ_sse.c index 1d2965612..7fbeadd7a 100644 --- a/Frameworks/Opus/Opus/opus/silk/x86/NSQ_sse.c +++ b/Frameworks/Opus/Opus/opus/silk/x86/NSQ_sse.c @@ -29,6 +29,8 @@ #include "config.h" #endif +#ifdef __x86_64__ + #include #include #include @@ -718,3 +720,5 @@ static OPUS_INLINE void silk_nsq_scale_states_sse4_1( } } } + +#endif diff --git a/Frameworks/Opus/Opus/opus/silk/x86/VAD_sse.c b/Frameworks/Opus/Opus/opus/silk/x86/VAD_sse.c index 0f4fb7a62..0683b1b0e 100644 --- a/Frameworks/Opus/Opus/opus/silk/x86/VAD_sse.c +++ b/Frameworks/Opus/Opus/opus/silk/x86/VAD_sse.c @@ -29,6 +29,8 @@ #include "config.h" #endif +#ifdef __x86_64__ + #include #include #include @@ -275,3 +277,5 @@ opus_int silk_VAD_GetSA_Q8_sse4_1( /* O Return value, 0 if s RESTORE_STACK; return( ret ); } + +#endif diff --git a/Frameworks/Opus/Opus/opus/silk/x86/VQ_WMat_EC_sse.c b/Frameworks/Opus/Opus/opus/silk/x86/VQ_WMat_EC_sse.c index 50b71ade4..691fa5efe 100644 --- a/Frameworks/Opus/Opus/opus/silk/x86/VQ_WMat_EC_sse.c +++ b/Frameworks/Opus/Opus/opus/silk/x86/VQ_WMat_EC_sse.c @@ -29,6 +29,8 @@ #include "config.h" #endif +#ifdef __x86_64__ + #include #include #include @@ -140,3 +142,5 @@ void silk_VQ_WMat_EC_sse4_1( cb_row_Q7 += LTP_ORDER; } } + +#endif diff --git a/Frameworks/Opus/Opus/opus/silk/x86/x86_silk_map.c b/Frameworks/Opus/Opus/opus/silk/x86/x86_silk_map.c index 6e79675a8..eae1e8028 100644 --- a/Frameworks/Opus/Opus/opus/silk/x86/x86_silk_map.c +++ b/Frameworks/Opus/Opus/opus/silk/x86/x86_silk_map.c @@ -35,7 +35,7 @@ #include "pitch.h" #include "main.h" -#if !defined(OPUS_X86_PRESUME_SSE4_1) +#if !defined(OPUS_X86_PRESUME_SSE4_1) && defined(__x86_64__) #if defined(FIXED_POINT) diff --git a/Frameworks/lazyusf2/lazyusf2.xcodeproj/project.pbxproj b/Frameworks/lazyusf2/lazyusf2.xcodeproj/project.pbxproj index 580201a0d..4fa9538d6 100644 --- a/Frameworks/lazyusf2/lazyusf2.xcodeproj/project.pbxproj +++ b/Frameworks/lazyusf2/lazyusf2.xcodeproj/project.pbxproj @@ -1186,9 +1186,9 @@ DYLIB_COMPATIBILITY_VERSION = 1; DYLIB_CURRENT_VERSION = 1; FRAMEWORK_VERSION = A; - GCC_PREPROCESSOR_DEFINITIONS = ( + GCC_PREPROCESSOR_DEFINITIONS = "DEBUG=1"; + "GCC_PREPROCESSOR_DEFINITIONS[arch=i386]" = ( "DEBUG=1", - ARCH_MIN_SSE2, DYNAREC, ); GCC_WARN_PEDANTIC = YES; @@ -1215,9 +1215,9 @@ DYLIB_CURRENT_VERSION = 1; FRAMEWORK_VERSION = A; GCC_OPTIMIZATION_LEVEL = fast; - GCC_PREPROCESSOR_DEFINITIONS = ( + GCC_PREPROCESSOR_DEFINITIONS = "$(inherit)"; + "GCC_PREPROCESSOR_DEFINITIONS[arch=i386]" = ( "$(inherit)", - ARCH_MIN_SSE2, DYNAREC, ); GCC_WARN_PEDANTIC = YES; diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/cached_interp.c b/Frameworks/lazyusf2/lazyusf2/r4300/cached_interp.c index ccdc87fbd..7f2acbf37 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/cached_interp.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/cached_interp.c @@ -154,7 +154,9 @@ static void osal_fastcall FIN_BLOCK(usf_state_t * state) Used by dynarec only, check should be unnecessary */ state->PC->ops(state); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) dyna_jump(state); +#endif } else { @@ -176,7 +178,9 @@ Used by dynarec only, check should be unnecessary else state->PC->ops(state); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) dyna_jump(state); +#endif } } @@ -196,8 +200,10 @@ The preceeding update_debugger SHOULD be unnecessary since it should have been called before NOTCOMPILED would have been executed */ state->PC->ops(state); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) dyna_jump(state); +#endif } static void osal_fastcall NOTCOMPILED2(usf_state_t * state) @@ -537,7 +543,9 @@ void osal_fastcall jump_to_func(usf_state_t * state) } state->PC=state->actual->block+((addr-state->actual->start)>>2); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) dyna_jump(state); +#endif } #undef addr diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/exception.c b/Frameworks/lazyusf2/lazyusf2/r4300/exception.c index 41c185726..47e3e198c 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/exception.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/exception.c @@ -96,11 +96,13 @@ void TLB_refill_exception(usf_state_t * state, unsigned int address, int w) state->last_addr = state->PC->addr; +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) { dyna_jump(state); if (!state->dyna_interp) state->delay_slot = 0; } +#endif if (state->r4300emu != CORE_DYNAREC || state->dyna_interp) { @@ -131,11 +133,13 @@ void osal_fastcall exception_general(usf_state_t * state) } generic_jump_to(state, 0x80000180); state->last_addr = state->PC->addr; +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) { dyna_jump(state); if (!state->dyna_interp) state->delay_slot = 0; } +#endif if (state->r4300emu != CORE_DYNAREC || state->dyna_interp) { state->dyna_interp = 0; diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/interupt.c b/Frameworks/lazyusf2/lazyusf2/r4300/interupt.c index ce05e92d4..f740b537d 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/interupt.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/interupt.c @@ -506,7 +506,9 @@ void osal_fastcall gen_interupt(usf_state_t * state) if (state->stop == 1) { state->g_gs_vi_counter = 0; // debug +#ifdef DYNAREC dyna_stop(state); +#endif } if (!state->interupt_unsafe_state) diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/r4300.c b/Frameworks/lazyusf2/lazyusf2/r4300/r4300.c index 9ccc09964..790088ba8 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/r4300.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/r4300.c @@ -206,6 +206,7 @@ void r4300_reset_soft(usf_state_t * state) /* ready to execute IPL3 */ } +#ifdef DYNAREC #if !defined(NO_ASM) static void dynarec_setup_code() { @@ -236,6 +237,7 @@ static void dynarec_setup_code() dyna_stop(state); } #endif +#endif void r4300_begin(usf_state_t * state) { diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/recomp.c b/Frameworks/lazyusf2/lazyusf2/r4300/recomp.c index 8e92344bb..a192daac5 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/recomp.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/recomp.c @@ -49,27 +49,34 @@ #include "ops.h" #include "tlb.h" +#ifdef DYNAREC static void *malloc_exec(usf_state_t *, size_t size); static void free_exec(void *ptr, size_t length); - +#endif static void RSV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.RESERVED; - state->recomp_func = genreserved; +#ifdef DYNAREC + state->recomp_func = genreserved; +#endif } static void RFIN_BLOCK(usf_state_t * state) { state->dst->ops = state->current_instruction_table.FIN_BLOCK; +#ifdef DYNAREC state->recomp_func = genfin_block; +#endif } static void RNOTCOMPILED(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NOTCOMPILED; +#ifdef DYNAREC state->recomp_func = gennotcompiled; +#endif } static void recompile_standard_i_type(usf_state_t * state) @@ -113,13 +120,17 @@ static void recompile_standard_cf_type(usf_state_t * state) static void RNOP(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NOP; +#ifdef DYNAREC state->recomp_func = gennop; +#endif } static void RSLL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SLL; +#ifdef DYNAREC state->recomp_func = gensll; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -127,7 +138,9 @@ static void RSLL(usf_state_t * state) static void RSRL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SRL; +#ifdef DYNAREC state->recomp_func = gensrl; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -135,7 +148,9 @@ static void RSRL(usf_state_t * state) static void RSRA(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SRA; +#ifdef DYNAREC state->recomp_func = gensra; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -143,7 +158,9 @@ static void RSRA(usf_state_t * state) static void RSLLV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SLLV; +#ifdef DYNAREC state->recomp_func = gensllv; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -151,7 +168,9 @@ static void RSLLV(usf_state_t * state) static void RSRLV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SRLV; +#ifdef DYNAREC state->recomp_func = gensrlv; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -159,7 +178,9 @@ static void RSRLV(usf_state_t * state) static void RSRAV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SRAV; +#ifdef DYNAREC state->recomp_func = gensrav; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -167,40 +188,52 @@ static void RSRAV(usf_state_t * state) static void RJR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.JR; +#ifdef DYNAREC state->recomp_func = genjr; +#endif recompile_standard_i_type(state); } static void RJALR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.JALR; +#ifdef DYNAREC state->recomp_func = genjalr; +#endif recompile_standard_r_type(state); } static void RSYSCALL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SYSCALL; +#ifdef DYNAREC state->recomp_func = gensyscall; +#endif } /* Idle loop hack from 64th Note */ static void RBREAK(usf_state_t * state) { state->dst->ops = state->current_instruction_table.BREAK; +#ifdef DYNAREC state->recomp_func = genbreak; +#endif } static void RSYNC(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SYNC; +#ifdef DYNAREC state->recomp_func = gensync; +#endif } static void RMFHI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MFHI; +#ifdef DYNAREC state->recomp_func = genmfhi; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -208,14 +241,18 @@ static void RMFHI(usf_state_t * state) static void RMTHI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MTHI; +#ifdef DYNAREC state->recomp_func = genmthi; +#endif recompile_standard_r_type(state); } static void RMFLO(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MFLO; +#ifdef DYNAREC state->recomp_func = genmflo; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -223,14 +260,18 @@ static void RMFLO(usf_state_t * state) static void RMTLO(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MTLO; +#ifdef DYNAREC state->recomp_func = genmtlo; +#endif recompile_standard_r_type(state); } static void RDSLLV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSLLV; +#ifdef DYNAREC state->recomp_func = gendsllv; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -238,7 +279,9 @@ static void RDSLLV(usf_state_t * state) static void RDSRLV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSRLV; +#ifdef DYNAREC state->recomp_func = gendsrlv; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -246,7 +289,9 @@ static void RDSRLV(usf_state_t * state) static void RDSRAV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSRAV; +#ifdef DYNAREC state->recomp_func = gendsrav; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -254,63 +299,81 @@ static void RDSRAV(usf_state_t * state) static void RMULT(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MULT; +#ifdef DYNAREC state->recomp_func = genmult; +#endif recompile_standard_r_type(state); } static void RMULTU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MULTU; +#ifdef DYNAREC state->recomp_func = genmultu; +#endif recompile_standard_r_type(state); } static void RDIV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DIV; +#ifdef DYNAREC state->recomp_func = gendiv; +#endif recompile_standard_r_type(state); } static void RDIVU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DIVU; +#ifdef DYNAREC state->recomp_func = gendivu; +#endif recompile_standard_r_type(state); } static void RDMULT(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DMULT; +#ifdef DYNAREC state->recomp_func = gendmult; +#endif recompile_standard_r_type(state); } static void RDMULTU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DMULTU; +#ifdef DYNAREC state->recomp_func = gendmultu; +#endif recompile_standard_r_type(state); } static void RDDIV(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DDIV; +#ifdef DYNAREC state->recomp_func = genddiv; +#endif recompile_standard_r_type(state); } static void RDDIVU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DDIVU; +#ifdef DYNAREC state->recomp_func = genddivu; +#endif recompile_standard_r_type(state); } static void RADD(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ADD; +#ifdef DYNAREC state->recomp_func = genadd; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -318,7 +381,9 @@ static void RADD(usf_state_t * state) static void RADDU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ADDU; +#ifdef DYNAREC state->recomp_func = genaddu; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -326,7 +391,9 @@ static void RADDU(usf_state_t * state) static void RSUB(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SUB; +#ifdef DYNAREC state->recomp_func = gensub; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -334,7 +401,9 @@ static void RSUB(usf_state_t * state) static void RSUBU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SUBU; +#ifdef DYNAREC state->recomp_func = gensubu; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -342,7 +411,9 @@ static void RSUBU(usf_state_t * state) static void RAND(usf_state_t * state) { state->dst->ops = state->current_instruction_table.AND; +#ifdef DYNAREC state->recomp_func = genand; +#endif recompile_standard_r_type(state); if(state->dst->f.r.rd == state->reg) RNOP(state); } @@ -350,7 +421,9 @@ static void RAND(usf_state_t * state) static void ROR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.OR; +#ifdef DYNAREC state->recomp_func = genor; +#endif recompile_standard_r_type(state); if(state->dst->f.r.rd == state->reg) RNOP(state); } @@ -358,7 +431,9 @@ static void ROR(usf_state_t * state) static void RXOR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.XOR; +#ifdef DYNAREC state->recomp_func = genxor; +#endif recompile_standard_r_type(state); if(state->dst->f.r.rd == state->reg) RNOP(state); } @@ -366,7 +441,9 @@ static void RXOR(usf_state_t * state) static void RNOR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NOR; +#ifdef DYNAREC state->recomp_func = gennor; +#endif recompile_standard_r_type(state); if(state->dst->f.r.rd == state->reg) RNOP(state); } @@ -374,7 +451,9 @@ static void RNOR(usf_state_t * state) static void RSLT(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SLT; +#ifdef DYNAREC state->recomp_func = genslt; +#endif recompile_standard_r_type(state); if(state->dst->f.r.rd == state->reg) RNOP(state); } @@ -382,7 +461,9 @@ static void RSLT(usf_state_t * state) static void RSLTU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SLTU; +#ifdef DYNAREC state->recomp_func = gensltu; +#endif recompile_standard_r_type(state); if(state->dst->f.r.rd == state->reg) RNOP(state); } @@ -390,7 +471,9 @@ static void RSLTU(usf_state_t * state) static void RDADD(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DADD; +#ifdef DYNAREC state->recomp_func = gendadd; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -398,7 +481,9 @@ static void RDADD(usf_state_t * state) static void RDADDU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DADDU; +#ifdef DYNAREC state->recomp_func = gendaddu; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -406,7 +491,9 @@ static void RDADDU(usf_state_t * state) static void RDSUB(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSUB; +#ifdef DYNAREC state->recomp_func = gendsub; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -414,7 +501,9 @@ static void RDSUB(usf_state_t * state) static void RDSUBU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSUBU; +#ifdef DYNAREC state->recomp_func = gendsubu; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -422,44 +511,58 @@ static void RDSUBU(usf_state_t * state) static void RTGE(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTGEU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTLT(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTLTU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTEQ(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TEQ; +#ifdef DYNAREC state->recomp_func = genteq; +#endif recompile_standard_r_type(state); } static void RTNE(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RDSLL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSLL; +#ifdef DYNAREC state->recomp_func = gendsll; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -467,7 +570,9 @@ static void RDSLL(usf_state_t * state) static void RDSRL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSRL; +#ifdef DYNAREC state->recomp_func = gendsrl; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -475,7 +580,9 @@ static void RDSRL(usf_state_t * state) static void RDSRA(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSRA; +#ifdef DYNAREC state->recomp_func = gendsra; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -483,7 +590,9 @@ static void RDSRA(usf_state_t * state) static void RDSLL32(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSLL32; +#ifdef DYNAREC state->recomp_func = gendsll32; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -491,7 +600,9 @@ static void RDSLL32(usf_state_t * state) static void RDSRL32(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSRL32; +#ifdef DYNAREC state->recomp_func = gendsrl32; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -499,7 +610,9 @@ static void RDSRL32(usf_state_t * state) static void RDSRA32(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DSRA32; +#ifdef DYNAREC state->recomp_func = gendsra32; +#endif recompile_standard_r_type(state); if (state->dst->f.r.rd == state->reg) RNOP(state); } @@ -524,7 +637,9 @@ static void RBLTZ(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BLTZ; +#ifdef DYNAREC state->recomp_func = genbltz; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -532,13 +647,17 @@ static void RBLTZ(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BLTZ_IDLE; +#ifdef DYNAREC state->recomp_func = genbltz_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BLTZ_OUT; +#ifdef DYNAREC state->recomp_func = genbltz_out; +#endif } } @@ -546,7 +665,9 @@ static void RBGEZ(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BGEZ; +#ifdef DYNAREC state->recomp_func = genbgez; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -554,13 +675,17 @@ static void RBGEZ(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BGEZ_IDLE; +#ifdef DYNAREC state->recomp_func = genbgez_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BGEZ_OUT; +#ifdef DYNAREC state->recomp_func = genbgez_out; +#endif } } @@ -568,7 +693,9 @@ static void RBLTZL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BLTZL; +#ifdef DYNAREC state->recomp_func = genbltzl; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -576,13 +703,17 @@ static void RBLTZL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BLTZL_IDLE; +#ifdef DYNAREC state->recomp_func = genbltzl_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BLTZL_OUT; +#ifdef DYNAREC state->recomp_func = genbltzl_out; +#endif } } @@ -590,7 +721,9 @@ static void RBGEZL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BGEZL; +#ifdef DYNAREC state->recomp_func = genbgezl; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -598,57 +731,75 @@ static void RBGEZL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BGEZL_IDLE; +#ifdef DYNAREC state->recomp_func = genbgezl_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BGEZL_OUT; +#ifdef DYNAREC state->recomp_func = genbgezl_out; +#endif } } static void RTGEI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTGEIU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTLTI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTLTIU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTEQI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RTNEI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif } static void RBLTZAL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BLTZAL; +#ifdef DYNAREC state->recomp_func = genbltzal; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -656,13 +807,17 @@ static void RBLTZAL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BLTZAL_IDLE; +#ifdef DYNAREC state->recomp_func = genbltzal_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BLTZAL_OUT; +#ifdef DYNAREC state->recomp_func = genbltzal_out; +#endif } } @@ -670,7 +825,9 @@ static void RBGEZAL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BGEZAL; +#ifdef DYNAREC state->recomp_func = genbgezal; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -678,13 +835,17 @@ static void RBGEZAL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BGEZAL_IDLE; +#ifdef DYNAREC state->recomp_func = genbgezal_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BGEZAL_OUT; +#ifdef DYNAREC state->recomp_func = genbgezal_out; +#endif } } @@ -692,7 +853,9 @@ static void RBLTZALL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BLTZALL; +#ifdef DYNAREC state->recomp_func = genbltzall; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -700,13 +863,17 @@ static void RBLTZALL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BLTZALL_IDLE; +#ifdef DYNAREC state->recomp_func = genbltzall_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BLTZALL_OUT; +#ifdef DYNAREC state->recomp_func = genbltzall_out; +#endif } } @@ -714,7 +881,9 @@ static void RBGEZALL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BGEZALL; +#ifdef DYNAREC state->recomp_func = genbgezall; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -722,13 +891,17 @@ static void RBGEZALL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BGEZALL_IDLE; +#ifdef DYNAREC state->recomp_func = genbgezall_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BGEZALL_OUT; +#ifdef DYNAREC state->recomp_func = genbgezall_out; +#endif } } @@ -747,31 +920,41 @@ static void (*recomp_regimm[32])(usf_state_t *) = static void RTLBR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TLBR; +#ifdef DYNAREC state->recomp_func = gentlbr; +#endif } static void RTLBWI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TLBWI; +#ifdef DYNAREC state->recomp_func = gentlbwi; +#endif } static void RTLBWR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TLBWR; +#ifdef DYNAREC state->recomp_func = gentlbwr; +#endif } static void RTLBP(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TLBP; +#ifdef DYNAREC state->recomp_func = gentlbp; +#endif } static void RERET(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ERET; +#ifdef DYNAREC state->recomp_func = generet; +#endif } static void (*recomp_tlb[64])(usf_state_t *) = @@ -793,7 +976,9 @@ static void (*recomp_tlb[64])(usf_state_t *) = static void RMFC0(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MFC0; +#ifdef DYNAREC state->recomp_func = genmfc0; +#endif recompile_standard_r_type(state); state->dst->f.r.rd = (long long*)(state->g_cp0_regs + ((state->src >> 11) & 0x1F)); state->dst->f.r.nrd = (state->src >> 11) & 0x1F; @@ -803,7 +988,9 @@ static void RMFC0(usf_state_t * state) static void RMTC0(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MTC0; +#ifdef DYNAREC state->recomp_func = genmtc0; +#endif recompile_standard_r_type(state); state->dst->f.r.nrd = (state->src >> 11) & 0x1F; } @@ -829,7 +1016,9 @@ static void RBC1F(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BC1F; +#ifdef DYNAREC state->recomp_func = genbc1f; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -837,13 +1026,17 @@ static void RBC1F(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BC1F_IDLE; +#ifdef DYNAREC state->recomp_func = genbc1f_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BC1F_OUT; +#ifdef DYNAREC state->recomp_func = genbc1f_out; +#endif } } @@ -851,7 +1044,9 @@ static void RBC1T(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BC1T; +#ifdef DYNAREC state->recomp_func = genbc1t; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -859,13 +1054,17 @@ static void RBC1T(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BC1T_IDLE; +#ifdef DYNAREC state->recomp_func = genbc1t_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BC1T_OUT; +#ifdef DYNAREC state->recomp_func = genbc1t_out; +#endif } } @@ -873,7 +1072,9 @@ static void RBC1FL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BC1FL; +#ifdef DYNAREC state->recomp_func = genbc1fl; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -881,13 +1082,17 @@ static void RBC1FL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BC1FL_IDLE; +#ifdef DYNAREC state->recomp_func = genbc1fl_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BC1FL_OUT; +#ifdef DYNAREC state->recomp_func = genbc1fl_out; +#endif } } @@ -895,7 +1100,9 @@ static void RBC1TL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BC1TL; +#ifdef DYNAREC state->recomp_func = genbc1tl; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -903,13 +1110,17 @@ static void RBC1TL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BC1TL_IDLE; +#ifdef DYNAREC state->recomp_func = genbc1tl_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BC1TL_OUT; +#ifdef DYNAREC state->recomp_func = genbc1tl_out; +#endif } } @@ -926,245 +1137,315 @@ static void (*recomp_bc[4])(usf_state_t *) = static void RADD_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ADD_S; +#ifdef DYNAREC state->recomp_func = genadd_s; +#endif recompile_standard_cf_type(state); } static void RSUB_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SUB_S; +#ifdef DYNAREC state->recomp_func = gensub_s; +#endif recompile_standard_cf_type(state); } static void RMUL_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MUL_S; +#ifdef DYNAREC state->recomp_func = genmul_s; +#endif recompile_standard_cf_type(state); } static void RDIV_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DIV_S; +#ifdef DYNAREC state->recomp_func = gendiv_s; +#endif recompile_standard_cf_type(state); } static void RSQRT_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SQRT_S; +#ifdef DYNAREC state->recomp_func = gensqrt_s; +#endif recompile_standard_cf_type(state); } static void RABS_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ABS_S; +#ifdef DYNAREC state->recomp_func = genabs_s; +#endif recompile_standard_cf_type(state); } static void RMOV_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MOV_S; +#ifdef DYNAREC state->recomp_func = genmov_s; +#endif recompile_standard_cf_type(state); } static void RNEG_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NEG_S; +#ifdef DYNAREC state->recomp_func = genneg_s; +#endif recompile_standard_cf_type(state); } static void RROUND_L_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ROUND_L_S; +#ifdef DYNAREC state->recomp_func = genround_l_s; +#endif recompile_standard_cf_type(state); } static void RTRUNC_L_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TRUNC_L_S; +#ifdef DYNAREC state->recomp_func = gentrunc_l_s; +#endif recompile_standard_cf_type(state); } static void RCEIL_L_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CEIL_L_S; +#ifdef DYNAREC state->recomp_func = genceil_l_s; +#endif recompile_standard_cf_type(state); } static void RFLOOR_L_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.FLOOR_L_S; +#ifdef DYNAREC state->recomp_func = genfloor_l_s; +#endif recompile_standard_cf_type(state); } static void RROUND_W_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ROUND_W_S; +#ifdef DYNAREC state->recomp_func = genround_w_s; +#endif recompile_standard_cf_type(state); } static void RTRUNC_W_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TRUNC_W_S; +#ifdef DYNAREC state->recomp_func = gentrunc_w_s; +#endif recompile_standard_cf_type(state); } static void RCEIL_W_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CEIL_W_S; +#ifdef DYNAREC state->recomp_func = genceil_w_s; +#endif recompile_standard_cf_type(state); } static void RFLOOR_W_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.FLOOR_W_S; +#ifdef DYNAREC state->recomp_func = genfloor_w_s; +#endif recompile_standard_cf_type(state); } static void RCVT_D_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_D_S; +#ifdef DYNAREC state->recomp_func = gencvt_d_s; +#endif recompile_standard_cf_type(state); } static void RCVT_W_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_W_S; +#ifdef DYNAREC state->recomp_func = gencvt_w_s; +#endif recompile_standard_cf_type(state); } static void RCVT_L_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_L_S; +#ifdef DYNAREC state->recomp_func = gencvt_l_s; +#endif recompile_standard_cf_type(state); } static void RC_F_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_F_S; +#ifdef DYNAREC state->recomp_func = genc_f_s; +#endif recompile_standard_cf_type(state); } static void RC_UN_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_UN_S; +#ifdef DYNAREC state->recomp_func = genc_un_s; +#endif recompile_standard_cf_type(state); } static void RC_EQ_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_EQ_S; +#ifdef DYNAREC state->recomp_func = genc_eq_s; +#endif recompile_standard_cf_type(state); } static void RC_UEQ_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_UEQ_S; +#ifdef DYNAREC state->recomp_func = genc_ueq_s; +#endif recompile_standard_cf_type(state); } static void RC_OLT_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_OLT_S; +#ifdef DYNAREC state->recomp_func = genc_olt_s; +#endif recompile_standard_cf_type(state); } static void RC_ULT_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_ULT_S; +#ifdef DYNAREC state->recomp_func = genc_ult_s; +#endif recompile_standard_cf_type(state); } static void RC_OLE_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_OLE_S; +#ifdef DYNAREC state->recomp_func = genc_ole_s; +#endif recompile_standard_cf_type(state); } static void RC_ULE_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_ULE_S; +#ifdef DYNAREC state->recomp_func = genc_ule_s; +#endif recompile_standard_cf_type(state); } static void RC_SF_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_SF_S; +#ifdef DYNAREC state->recomp_func = genc_sf_s; +#endif recompile_standard_cf_type(state); } static void RC_NGLE_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_NGLE_S; +#ifdef DYNAREC state->recomp_func = genc_ngle_s; +#endif recompile_standard_cf_type(state); } static void RC_SEQ_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_SEQ_S; +#ifdef DYNAREC state->recomp_func = genc_seq_s; +#endif recompile_standard_cf_type(state); } static void RC_NGL_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_NGL_S; +#ifdef DYNAREC state->recomp_func = genc_ngl_s; +#endif recompile_standard_cf_type(state); } static void RC_LT_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_LT_S; +#ifdef DYNAREC state->recomp_func = genc_lt_s; +#endif recompile_standard_cf_type(state); } static void RC_NGE_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_NGE_S; +#ifdef DYNAREC state->recomp_func = genc_nge_s; +#endif recompile_standard_cf_type(state); } static void RC_LE_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_LE_S; +#ifdef DYNAREC state->recomp_func = genc_le_s; +#endif recompile_standard_cf_type(state); } static void RC_NGT_S(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_NGT_S; +#ifdef DYNAREC state->recomp_func = genc_ngt_s; +#endif recompile_standard_cf_type(state); } @@ -1187,245 +1468,315 @@ static void (*recomp_s[64])(usf_state_t *) = static void RADD_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ADD_D; +#ifdef DYNAREC state->recomp_func = genadd_d; +#endif recompile_standard_cf_type(state); } static void RSUB_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SUB_D; +#ifdef DYNAREC state->recomp_func = gensub_d; +#endif recompile_standard_cf_type(state); } static void RMUL_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MUL_D; +#ifdef DYNAREC state->recomp_func = genmul_d; +#endif recompile_standard_cf_type(state); } static void RDIV_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DIV_D; +#ifdef DYNAREC state->recomp_func = gendiv_d; +#endif recompile_standard_cf_type(state); } static void RSQRT_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SQRT_D; +#ifdef DYNAREC state->recomp_func = gensqrt_d; +#endif recompile_standard_cf_type(state); } static void RABS_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ABS_D; +#ifdef DYNAREC state->recomp_func = genabs_d; +#endif recompile_standard_cf_type(state); } static void RMOV_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MOV_D; +#ifdef DYNAREC state->recomp_func = genmov_d; +#endif recompile_standard_cf_type(state); } static void RNEG_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NEG_D; +#ifdef DYNAREC state->recomp_func = genneg_d; +#endif recompile_standard_cf_type(state); } static void RROUND_L_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ROUND_L_D; +#ifdef DYNAREC state->recomp_func = genround_l_d; +#endif recompile_standard_cf_type(state); } static void RTRUNC_L_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TRUNC_L_D; +#ifdef DYNAREC state->recomp_func = gentrunc_l_d; +#endif recompile_standard_cf_type(state); } static void RCEIL_L_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CEIL_L_D; +#ifdef DYNAREC state->recomp_func = genceil_l_d; +#endif recompile_standard_cf_type(state); } static void RFLOOR_L_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.FLOOR_L_D; +#ifdef DYNAREC state->recomp_func = genfloor_l_d; +#endif recompile_standard_cf_type(state); } static void RROUND_W_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ROUND_W_D; +#ifdef DYNAREC state->recomp_func = genround_w_d; +#endif recompile_standard_cf_type(state); } static void RTRUNC_W_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.TRUNC_W_D; +#ifdef DYNAREC state->recomp_func = gentrunc_w_d; +#endif recompile_standard_cf_type(state); } static void RCEIL_W_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CEIL_W_D; +#ifdef DYNAREC state->recomp_func = genceil_w_d; +#endif recompile_standard_cf_type(state); } static void RFLOOR_W_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.FLOOR_W_D; +#ifdef DYNAREC state->recomp_func = genfloor_w_d; +#endif recompile_standard_cf_type(state); } static void RCVT_S_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_S_D; +#ifdef DYNAREC state->recomp_func = gencvt_s_d; +#endif recompile_standard_cf_type(state); } static void RCVT_W_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_W_D; +#ifdef DYNAREC state->recomp_func = gencvt_w_d; +#endif recompile_standard_cf_type(state); } static void RCVT_L_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_L_D; +#ifdef DYNAREC state->recomp_func = gencvt_l_d; +#endif recompile_standard_cf_type(state); } static void RC_F_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_F_D; +#ifdef DYNAREC state->recomp_func = genc_f_d; +#endif recompile_standard_cf_type(state); } static void RC_UN_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_UN_D; +#ifdef DYNAREC state->recomp_func = genc_un_d; +#endif recompile_standard_cf_type(state); } static void RC_EQ_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_EQ_D; +#ifdef DYNAREC state->recomp_func = genc_eq_d; +#endif recompile_standard_cf_type(state); } static void RC_UEQ_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_UEQ_D; +#ifdef DYNAREC state->recomp_func = genc_ueq_d; +#endif recompile_standard_cf_type(state); } static void RC_OLT_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_OLT_D; +#ifdef DYNAREC state->recomp_func = genc_olt_d; +#endif recompile_standard_cf_type(state); } static void RC_ULT_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_ULT_D; +#ifdef DYNAREC state->recomp_func = genc_ult_d; +#endif recompile_standard_cf_type(state); } static void RC_OLE_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_OLE_D; +#ifdef DYNAREC state->recomp_func = genc_ole_d; +#endif recompile_standard_cf_type(state); } static void RC_ULE_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_ULE_D; +#ifdef DYNAREC state->recomp_func = genc_ule_d; +#endif recompile_standard_cf_type(state); } static void RC_SF_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_SF_D; +#ifdef DYNAREC state->recomp_func = genc_sf_d; +#endif recompile_standard_cf_type(state); } static void RC_NGLE_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_NGLE_D; +#ifdef DYNAREC state->recomp_func = genc_ngle_d; +#endif recompile_standard_cf_type(state); } static void RC_SEQ_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_SEQ_D; +#ifdef DYNAREC state->recomp_func = genc_seq_d; +#endif recompile_standard_cf_type(state); } static void RC_NGL_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_NGL_D; +#ifdef DYNAREC state->recomp_func = genc_ngl_d; +#endif recompile_standard_cf_type(state); } static void RC_LT_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_LT_D; +#ifdef DYNAREC state->recomp_func = genc_lt_d; +#endif recompile_standard_cf_type(state); } static void RC_NGE_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_NGE_D; +#ifdef DYNAREC state->recomp_func = genc_nge_d; +#endif recompile_standard_cf_type(state); } static void RC_LE_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_LE_D; +#ifdef DYNAREC state->recomp_func = genc_le_d; +#endif recompile_standard_cf_type(state); } static void RC_NGT_D(usf_state_t * state) { state->dst->ops = state->current_instruction_table.C_NGT_D; +#ifdef DYNAREC state->recomp_func = genc_ngt_d; +#endif recompile_standard_cf_type(state); } @@ -1448,14 +1799,18 @@ static void (*recomp_d[64])(usf_state_t *) = static void RCVT_S_W(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_S_W; +#ifdef DYNAREC state->recomp_func = gencvt_s_w; +#endif recompile_standard_cf_type(state); } static void RCVT_D_W(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_D_W; +#ifdef DYNAREC state->recomp_func = gencvt_d_w; +#endif recompile_standard_cf_type(state); } @@ -1478,14 +1833,18 @@ static void (*recomp_w[64])(usf_state_t *) = static void RCVT_S_L(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_S_L; +#ifdef DYNAREC state->recomp_func = gencvt_s_l; +#endif recompile_standard_cf_type(state); } static void RCVT_D_L(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CVT_D_L; +#ifdef DYNAREC state->recomp_func = gencvt_d_l; +#endif recompile_standard_cf_type(state); } @@ -1508,7 +1867,9 @@ static void (*recomp_l[64])(usf_state_t *) = static void RMFC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MFC1; +#ifdef DYNAREC state->recomp_func = genmfc1; +#endif recompile_standard_r_type(state); state->dst->f.r.nrd = (state->src >> 11) & 0x1F; if (state->dst->f.r.rt == state->reg) RNOP(state); @@ -1517,7 +1878,9 @@ static void RMFC1(usf_state_t * state) static void RDMFC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DMFC1; +#ifdef DYNAREC state->recomp_func = gendmfc1; +#endif recompile_standard_r_type(state); state->dst->f.r.nrd = (state->src >> 11) & 0x1F; if (state->dst->f.r.rt == state->reg) RNOP(state); @@ -1526,7 +1889,9 @@ static void RDMFC1(usf_state_t * state) static void RCFC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CFC1; +#ifdef DYNAREC state->recomp_func = gencfc1; +#endif recompile_standard_r_type(state); state->dst->f.r.nrd = (state->src >> 11) & 0x1F; if (state->dst->f.r.rt == state->reg) RNOP(state); @@ -1536,7 +1901,9 @@ static void RMTC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.MTC1; recompile_standard_r_type(state); +#ifdef DYNAREC state->recomp_func = genmtc1; +#endif state->dst->f.r.nrd = (state->src >> 11) & 0x1F; } @@ -1544,7 +1911,9 @@ static void RDMTC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DMTC1; recompile_standard_r_type(state); +#ifdef DYNAREC state->recomp_func = gendmtc1; +#endif state->dst->f.r.nrd = (state->src >> 11) & 0x1F; } @@ -1552,7 +1921,9 @@ static void RCTC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.CTC1; recompile_standard_r_type(state); +#ifdef DYNAREC state->recomp_func = genctc1; +#endif state->dst->f.r.nrd = (state->src >> 11) & 0x1F; } @@ -1607,7 +1978,9 @@ static void RJ(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.J; +#ifdef DYNAREC state->recomp_func = genj; +#endif recompile_standard_j_type(state); target = (state->dst->f.j.inst_index<<2) | (state->dst->addr & 0xF0000000); if (target == state->dst->addr) @@ -1615,13 +1988,17 @@ static void RJ(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.J_IDLE; +#ifdef DYNAREC state->recomp_func = genj_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.J_OUT; +#ifdef DYNAREC state->recomp_func = genj_out; +#endif } } @@ -1629,7 +2006,9 @@ static void RJAL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.JAL; +#ifdef DYNAREC state->recomp_func = genjal; +#endif recompile_standard_j_type(state); target = (state->dst->f.j.inst_index<<2) | (state->dst->addr & 0xF0000000); if (target == state->dst->addr) @@ -1637,13 +2016,17 @@ static void RJAL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.JAL_IDLE; +#ifdef DYNAREC state->recomp_func = genjal_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.JAL_OUT; +#ifdef DYNAREC state->recomp_func = genjal_out; +#endif } } @@ -1651,7 +2034,9 @@ static void RBEQ(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BEQ; +#ifdef DYNAREC state->recomp_func = genbeq; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -1659,13 +2044,17 @@ static void RBEQ(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BEQ_IDLE; +#ifdef DYNAREC state->recomp_func = genbeq_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BEQ_OUT; +#ifdef DYNAREC state->recomp_func = genbeq_out; +#endif } } @@ -1673,7 +2062,9 @@ static void RBNE(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BNE; +#ifdef DYNAREC state->recomp_func = genbne; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -1681,13 +2072,17 @@ static void RBNE(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BNE_IDLE; +#ifdef DYNAREC state->recomp_func = genbne_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BNE_OUT; +#ifdef DYNAREC state->recomp_func = genbne_out; +#endif } } @@ -1695,7 +2090,9 @@ static void RBLEZ(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BLEZ; +#ifdef DYNAREC state->recomp_func = genblez; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -1703,13 +2100,17 @@ static void RBLEZ(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BLEZ_IDLE; +#ifdef DYNAREC state->recomp_func = genblez_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BLEZ_OUT; +#ifdef DYNAREC state->recomp_func = genblez_out; +#endif } } @@ -1717,7 +2118,9 @@ static void RBGTZ(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BGTZ; +#ifdef DYNAREC state->recomp_func = genbgtz; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -1725,20 +2128,26 @@ static void RBGTZ(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BGTZ_IDLE; +#ifdef DYNAREC state->recomp_func = genbgtz_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BGTZ_OUT; +#ifdef DYNAREC state->recomp_func = genbgtz_out; +#endif } } static void RADDI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ADDI; +#ifdef DYNAREC state->recomp_func = genaddi; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1746,7 +2155,9 @@ static void RADDI(usf_state_t * state) static void RADDIU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ADDIU; +#ifdef DYNAREC state->recomp_func = genaddiu; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1754,7 +2165,9 @@ static void RADDIU(usf_state_t * state) static void RSLTI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SLTI; +#ifdef DYNAREC state->recomp_func = genslti; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1762,7 +2175,9 @@ static void RSLTI(usf_state_t * state) static void RSLTIU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SLTIU; +#ifdef DYNAREC state->recomp_func = gensltiu; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1770,7 +2185,9 @@ static void RSLTIU(usf_state_t * state) static void RANDI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ANDI; +#ifdef DYNAREC state->recomp_func = genandi; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1778,7 +2195,9 @@ static void RANDI(usf_state_t * state) static void RORI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.ORI; +#ifdef DYNAREC state->recomp_func = genori; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1786,7 +2205,9 @@ static void RORI(usf_state_t * state) static void RXORI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.XORI; +#ifdef DYNAREC state->recomp_func = genxori; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1794,7 +2215,9 @@ static void RXORI(usf_state_t * state) static void RLUI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LUI; +#ifdef DYNAREC state->recomp_func = genlui; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1813,7 +2236,9 @@ static void RBEQL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BEQL; +#ifdef DYNAREC state->recomp_func = genbeql; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -1821,13 +2246,17 @@ static void RBEQL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BEQL_IDLE; +#ifdef DYNAREC state->recomp_func = genbeql_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BEQL_OUT; +#ifdef DYNAREC state->recomp_func = genbeql_out; +#endif } } @@ -1835,7 +2264,9 @@ static void RBNEL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BNEL; +#ifdef DYNAREC state->recomp_func = genbnel; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -1843,13 +2274,17 @@ static void RBNEL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BNEL_IDLE; +#ifdef DYNAREC state->recomp_func = genbnel_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BNEL_OUT; +#ifdef DYNAREC state->recomp_func = genbnel_out; +#endif } } @@ -1857,7 +2292,9 @@ static void RBLEZL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BLEZL; +#ifdef DYNAREC state->recomp_func = genblezl; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -1865,13 +2302,17 @@ static void RBLEZL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BLEZL_IDLE; +#ifdef DYNAREC state->recomp_func = genblezl_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BLEZL_OUT; +#ifdef DYNAREC state->recomp_func = genblezl_out; +#endif } } @@ -1879,7 +2320,9 @@ static void RBGTZL(usf_state_t * state) { unsigned int target; state->dst->ops = state->current_instruction_table.BGTZL; +#ifdef DYNAREC state->recomp_func = genbgtzl; +#endif recompile_standard_i_type(state); target = state->dst->addr + state->dst->f.i.immediate*4 + 4; if (target == state->dst->addr) @@ -1887,20 +2330,26 @@ static void RBGTZL(usf_state_t * state) if (state->check_nop) { state->dst->ops = state->current_instruction_table.BGTZL_IDLE; +#ifdef DYNAREC state->recomp_func = genbgtzl_idle; +#endif } } else if (target < state->dst_block->start || target >= state->dst_block->end || state->dst->addr == (state->dst_block->end-4)) { state->dst->ops = state->current_instruction_table.BGTZL_OUT; +#ifdef DYNAREC state->recomp_func = genbgtzl_out; +#endif } } static void RDADDI(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DADDI; +#ifdef DYNAREC state->recomp_func = gendaddi; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1908,7 +2357,9 @@ static void RDADDI(usf_state_t * state) static void RDADDIU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.DADDIU; +#ifdef DYNAREC state->recomp_func = gendaddiu; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1916,7 +2367,9 @@ static void RDADDIU(usf_state_t * state) static void RLDL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LDL; +#ifdef DYNAREC state->recomp_func = genldl; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1924,7 +2377,9 @@ static void RLDL(usf_state_t * state) static void RLDR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LDR; +#ifdef DYNAREC state->recomp_func = genldr; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1932,7 +2387,9 @@ static void RLDR(usf_state_t * state) static void RLB(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LB; +#ifdef DYNAREC state->recomp_func = genlb; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1940,7 +2397,9 @@ static void RLB(usf_state_t * state) static void RLH(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LH; +#ifdef DYNAREC state->recomp_func = genlh; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1948,7 +2407,9 @@ static void RLH(usf_state_t * state) static void RLWL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LWL; +#ifdef DYNAREC state->recomp_func = genlwl; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1956,7 +2417,9 @@ static void RLWL(usf_state_t * state) static void RLW(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LW; +#ifdef DYNAREC state->recomp_func = genlw; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1964,7 +2427,9 @@ static void RLW(usf_state_t * state) static void RLBU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LBU; +#ifdef DYNAREC state->recomp_func = genlbu; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1972,7 +2437,9 @@ static void RLBU(usf_state_t * state) static void RLHU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LHU; +#ifdef DYNAREC state->recomp_func = genlhu; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1980,7 +2447,9 @@ static void RLHU(usf_state_t * state) static void RLWR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LWR; +#ifdef DYNAREC state->recomp_func = genlwr; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1988,7 +2457,9 @@ static void RLWR(usf_state_t * state) static void RLWU(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LWU; +#ifdef DYNAREC state->recomp_func = genlwu; +#endif recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); } @@ -1996,61 +2467,79 @@ static void RLWU(usf_state_t * state) static void RSB(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SB; +#ifdef DYNAREC state->recomp_func = gensb; +#endif recompile_standard_i_type(state); } static void RSH(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SH; +#ifdef DYNAREC state->recomp_func = gensh; +#endif recompile_standard_i_type(state); } static void RSWL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SWL; +#ifdef DYNAREC state->recomp_func = genswl; +#endif recompile_standard_i_type(state); } static void RSW(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SW; +#ifdef DYNAREC state->recomp_func = gensw; +#endif recompile_standard_i_type(state); } static void RSDL(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SDL; +#ifdef DYNAREC state->recomp_func = gensdl; +#endif recompile_standard_i_type(state); } static void RSDR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SDR; +#ifdef DYNAREC state->recomp_func = gensdr; +#endif recompile_standard_i_type(state); } static void RSWR(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SWR; +#ifdef DYNAREC state->recomp_func = genswr; +#endif recompile_standard_i_type(state); } static void RCACHE(usf_state_t * state) { +#ifdef DYNAREC state->recomp_func = gencache; +#endif state->dst->ops = state->current_instruction_table.CACHE; } static void RLL(usf_state_t * state) { +#ifdef DYNAREC state->recomp_func = genll; +#endif state->dst->ops = state->current_instruction_table.LL; recompile_standard_i_type(state); if(state->dst->f.i.rt == state->reg) RNOP(state); @@ -2059,28 +2548,36 @@ static void RLL(usf_state_t * state) static void RLWC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LWC1; +#ifdef DYNAREC state->recomp_func = genlwc1; +#endif recompile_standard_lf_type(state); } static void RLLD(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif recompile_standard_i_type(state); } static void RLDC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LDC1; +#ifdef DYNAREC state->recomp_func = genldc1; +#endif recompile_standard_lf_type(state); } static void RLD(usf_state_t * state) { state->dst->ops = state->current_instruction_table.LD; +#ifdef DYNAREC state->recomp_func = genld; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -2088,7 +2585,9 @@ static void RLD(usf_state_t * state) static void RSC(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SC; +#ifdef DYNAREC state->recomp_func = gensc; +#endif recompile_standard_i_type(state); if (state->dst->f.i.rt == state->reg) RNOP(state); } @@ -2096,28 +2595,36 @@ static void RSC(usf_state_t * state) static void RSWC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SWC1; +#ifdef DYNAREC state->recomp_func = genswc1; +#endif recompile_standard_lf_type(state); } static void RSCD(usf_state_t * state) { state->dst->ops = state->current_instruction_table.NI; +#ifdef DYNAREC state->recomp_func = genni; +#endif recompile_standard_i_type(state); } static void RSDC1(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SDC1; +#ifdef DYNAREC state->recomp_func = gensdc1; +#endif recompile_standard_lf_type(state); } static void RSD(usf_state_t * state) { state->dst->ops = state->current_instruction_table.SD; +#ifdef DYNAREC state->recomp_func = gensd; +#endif recompile_standard_i_type(state); } @@ -2156,6 +2663,7 @@ void init_block(usf_state_t * state, precomp_block *block) if (!block->block) { size_t memsize = get_block_memsize(block); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) { block->block = (precomp_instr *) malloc_exec(state, memsize); if (!block->block) { @@ -2163,7 +2671,9 @@ void init_block(usf_state_t * state, precomp_block *block) return; } } - else { + else +#endif + { block->block = (precomp_instr *) malloc(memsize); if (!block->block) { DebugMessage(state, M64MSG_ERROR, "Memory error: couldn't allocate memory for cached interpreter."); @@ -2175,6 +2685,7 @@ void init_block(usf_state_t * state, precomp_block *block) already_exist = 0; } +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) { if (!block->code) @@ -2202,6 +2713,7 @@ void init_block(usf_state_t * state, precomp_block *block) init_assembler(state, NULL, 0, NULL, 0); init_cache(state, block->block); } +#endif if (!already_exist) { @@ -2209,10 +2721,14 @@ void init_block(usf_state_t * state, precomp_block *block) { state->dst = block->block + i; state->dst->addr = block->start + i*4; +#ifdef DYNAREC state->dst->reg_cache_infos.need_map = 0; +#endif state->dst->local_addr = state->code_length; RNOTCOMPILED(state); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) state->recomp_func(state); +#endif } state->init_length = state->code_length; } @@ -2222,12 +2738,15 @@ void init_block(usf_state_t * state, precomp_block *block) for (i=0; idst = block->block + i; +#ifdef DYNAREC state->dst->reg_cache_infos.need_map = 0; +#endif state->dst->local_addr = i * (state->init_length / length); state->dst->ops = state->current_instruction_table.NOTCOMPILED; } } +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) { free_all_registers(state); @@ -2237,6 +2756,7 @@ void init_block(usf_state_t * state, precomp_block *block) block->max_code_length = state->max_code_length; free_assembler(state, &block->jumps_table, &block->jumps_number, &block->riprel_table, &block->riprel_number); } +#endif /* here we're marking the block as a valid code even if it's not compiled * yet as the game should have already set up the code correctly. @@ -2309,16 +2829,22 @@ void init_block(usf_state_t * state, precomp_block *block) void free_block(usf_state_t * state, precomp_block *block) { +#ifdef DYNAREC size_t memsize = get_block_memsize(block); +#endif if (block->block) { +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) free_exec(block->block, memsize); else +#endif free(block->block); block->block = NULL; } +#ifdef DYNAREC if (block->code) { free_exec(block->code, block->max_code_length); block->code = NULL; } +#endif if (block->jumps_table) { free(block->jumps_table); block->jumps_table = NULL; } if (block->riprel_table) { free(block->riprel_table); block->riprel_table = NULL; } } @@ -2335,6 +2861,7 @@ void recompile_block(usf_state_t * state, int *source, precomp_block *block, uns //for (i=0; i<16; i++) block->md5[i] = 0; block->adler32 = 0; +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) { state->code_length = block->code_length; @@ -2343,6 +2870,7 @@ void recompile_block(usf_state_t * state, int *source, precomp_block *block, uns init_assembler(state, block->jumps_table, block->jumps_number, block->riprel_table, block->riprel_number); init_cache(state, block->block + (func & 0xFFF) / 4); } +#endif for (i = (func & 0xFFF) / 4; finished != 2; i++) { @@ -2359,11 +2887,15 @@ void recompile_block(usf_state_t * state, int *source, precomp_block *block, uns state->check_nop = source[i+1] == 0; state->dst = block->block + i; state->dst->addr = block->start + i*4; +#ifdef DYNAREC state->dst->reg_cache_infos.need_map = 0; +#endif state->dst->local_addr = state->code_length; state->recomp_func = NULL; recomp_ops[((state->src >> 26) & 0x3F)](state); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) state->recomp_func(state); +#endif state->dst = block->block + i; /*if ((dst+1)->ops != NOTCOMPILED && !delay_slot_compiled && @@ -2375,7 +2907,9 @@ void recompile_block(usf_state_t * state, int *source, precomp_block *block, uns if (state->delay_slot_compiled) { state->delay_slot_compiled--; +#ifdef DYNAREC free_all_registers(state); +#endif } if (i >= length-2+(length>>2)) finished = 2; @@ -2396,7 +2930,9 @@ void recompile_block(usf_state_t * state, int *source, precomp_block *block, uns { state->dst = block->block + i; state->dst->addr = block->start + i*4; +#ifdef DYNAREC state->dst->reg_cache_infos.need_map = 0; +#endif state->dst->local_addr = state->code_length; RFIN_BLOCK(state); if (state->r4300emu == CORE_DYNAREC) state->recomp_func(state); @@ -2405,13 +2941,18 @@ void recompile_block(usf_state_t * state, int *source, precomp_block *block, uns { state->dst = block->block + i; state->dst->addr = block->start + i*4; +#ifdef DYNAREC state->dst->reg_cache_infos.need_map = 0; +#endif state->dst->local_addr = state->code_length; RFIN_BLOCK(state); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) state->recomp_func(state); +#endif i++; } } +#ifdef DYNAREC else if (state->r4300emu == CORE_DYNAREC) genlink_subblock(state); if (state->r4300emu == CORE_DYNAREC) @@ -2422,6 +2963,7 @@ void recompile_block(usf_state_t * state, int *source, precomp_block *block, uns block->max_code_length = state->max_code_length; free_assembler(state, &block->jumps_table, &block->jumps_number, &block->riprel_table, &block->riprel_number); } +#endif } static int is_jump(usf_state_t * state) @@ -2507,21 +3049,28 @@ void recompile_opcode(usf_state_t * state) state->src = *state->SRC; state->dst++; state->dst->addr = (state->dst-1)->addr + 4; +#ifdef DYNAREC state->dst->reg_cache_infos.need_map = 0; +#endif if(!is_jump(state)) { state->recomp_func = NULL; recomp_ops[((state->src >> 26) & 0x3F)](state); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) state->recomp_func(state); +#endif } else { RNOP(state); +#ifdef DYNAREC if (state->r4300emu == CORE_DYNAREC) state->recomp_func(state); +#endif } state->delay_slot_compiled = 2; } +#ifdef DYNAREC #if defined(__APPLE__) static inline int macos_release() { @@ -2605,3 +3154,4 @@ static void free_exec(void *ptr, size_t length) free(ptr); #endif } +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/recomp.h b/Frameworks/lazyusf2/lazyusf2/r4300/recomp.h index 1bd9b1689..31ce7ecb7 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/recomp.h +++ b/Frameworks/lazyusf2/lazyusf2/r4300/recomp.h @@ -73,7 +73,9 @@ typedef struct _precomp_instr } f; unsigned int addr; /* word-aligned instruction address in r4300 address space */ unsigned int local_addr; /* byte offset to start of corresponding x86_64 instructions, from start of code block */ +#ifdef DYNAREC reg_cache_struct reg_cache_infos; +#endif } precomp_instr; typedef struct _precomp_block diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.c index 26d388a5d..58f69a443 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.c @@ -44,6 +44,7 @@ /* Static Functions */ +#ifdef DYNAREC void add_jump(usf_state_t * state, unsigned int pc_addr, unsigned int mi_addr, unsigned int absolute64) { if (state->jumps_number == state->max_jumps_number) @@ -199,3 +200,6 @@ void jump_end_rel32(usf_state_t * state) put32(state, jump_vec); state->code_length = jump_end; } + +#endif + diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.h index 074757974..d2aec168c 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.h +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.h @@ -77,6 +77,7 @@ #define RP3 RCX #endif +#ifdef DYNAREC void jump_start_rel8(usf_state_t *); void jump_end_rel8(usf_state_t *); void jump_start_rel32(usf_state_t *); @@ -1192,6 +1193,7 @@ static inline void ffree_fpreg(usf_state_t * state, int fpreg) put8(state, 0xDD); put8(state, 0xC0 + fpreg); } +#endif #endif /* M64P_R4300_ASSEMBLE_H */ diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble_struct.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble_struct.h index 46e59ff53..7eb4151c5 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble_struct.h +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble_struct.h @@ -23,6 +23,7 @@ #ifndef M64P_R4300_ASSEMBLE_STRUCT_H #define M64P_R4300_ASSEMBLE_STRUCT_H +#ifdef DYNAREC typedef struct _reg_cache_struct { int need_map; @@ -30,5 +31,6 @@ typedef struct _reg_cache_struct unsigned char jump_wrapper[84]; int need_cop1_check; } reg_cache_struct; +#endif #endif /* M64P_R4300_ASSEMBLE_STRUCT_H */ diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gbc.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gbc.c index 001627109..fb013e809 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gbc.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gbc.c @@ -39,6 +39,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC static void genbc1f_test(usf_state_t * state) { test_m32rel_imm32(state, (unsigned int*)&state->FCR31, 0x800000); @@ -303,3 +304,4 @@ void genbc1tl_idle(usf_state_t * state) #endif } +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop0.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop0.c index 86be49e00..82944c974 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop0.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop0.c @@ -38,6 +38,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC void genmfc0(usf_state_t * state) { #if defined(COUNT_INSTR) @@ -53,4 +54,4 @@ void genmtc0(usf_state_t * state) #endif gencallinterp(state, (unsigned long long)state->current_instruction_table.MTC0, 0); } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1.c index 14d1f7fe8..5823dc0ec 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1.c @@ -42,6 +42,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC void genmfc1(usf_state_t * state) { #if defined(COUNT_INSTR) @@ -160,4 +161,4 @@ void genctc1(usf_state_t * state) fldcw_m16rel(state, (unsigned short*)&state->rounding_mode); #endif } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_d.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_d.c index b3215822f..5aa77d7a4 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_d.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_d.c @@ -38,6 +38,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC void genadd_d(usf_state_t * state) { #if defined(COUNT_INSTR) @@ -716,4 +717,4 @@ void genc_ngt_d(usf_state_t * state) and_m32rel_imm32(state, (unsigned int*)&state->FCR31, ~0x800000); // 11 #endif } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_l.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_l.c index ac81153f0..224ccd104 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_l.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_l.c @@ -36,6 +36,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC void gencvt_s_l(usf_state_t * state) { #if defined(COUNT_INSTR) @@ -67,4 +68,4 @@ void gencvt_d_l(usf_state_t * state) fstp_preg64_qword(state, RAX); #endif } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_s.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_s.c index 75f8617f8..9582e6b08 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_s.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_s.c @@ -39,6 +39,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC void genadd_s(usf_state_t * state) { #if defined(COUNT_INSTR) @@ -715,4 +716,4 @@ void genc_ngt_s(usf_state_t * state) and_m32rel_imm32(state, (unsigned int*)&state->FCR31, ~0x800000); // 11 #endif } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_w.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_w.c index 55efd2dc4..5ee2106ef 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_w.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_w.c @@ -38,6 +38,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC void gencvt_s_w(usf_state_t * state) { #if defined(COUNT_INSTR) @@ -69,4 +70,4 @@ void gencvt_d_w(usf_state_t * state) fstp_preg64_qword(state, RAX); #endif } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gr4300.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gr4300.c index 6449150b6..7e517adb6 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gr4300.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gr4300.c @@ -49,6 +49,7 @@ /* static functions */ +#ifdef DYNAREC static void genupdate_count(usf_state_t * state, unsigned int addr) { mov_reg32_imm32(state, EAX, addr); @@ -2257,4 +2258,4 @@ void gensc(usf_state_t * state) #endif gencallinterp(state, (unsigned long long)state->current_instruction_table.SC, 0); } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gregimm.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gregimm.c index bb74308bf..a6512773d 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gregimm.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gregimm.c @@ -42,6 +42,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC static void genbltz_test(usf_state_t * state) { int rs_64bit = is64(state, (unsigned int *)state->dst->f.i.rs); @@ -608,4 +609,4 @@ void genbgezall_idle(usf_state_t * state) genbgezall(state); #endif } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gspecial.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gspecial.c index 3289449ef..e11c2f024 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gspecial.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gspecial.c @@ -45,6 +45,7 @@ # define offsetof(TYPE,MEMBER) ((unsigned int) &((TYPE*)0)->MEMBER) #endif +#ifdef DYNAREC void gensll(usf_state_t * state) { #if defined(COUNT_INSTR) @@ -1075,4 +1076,4 @@ void genbreak(usf_state_t * state) { gencallinterp(state, (unsigned long long)state->current_instruction_table.BREAK, 0); } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gtlb.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gtlb.c index 3dab44bd0..b2a68324a 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gtlb.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gtlb.c @@ -37,6 +37,7 @@ #include "r4300/instr_counters.h" #endif +#ifdef DYNAREC void gentlbwi(usf_state_t * state) { #if defined(COUNT_INSTR) @@ -98,4 +99,4 @@ void gentlbwr(usf_state_t * state) #endif gencallinterp(state, (unsigned long long)state->current_instruction_table.TLBWR, 0); } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.c index aaa78fd27..d3be7eb66 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.c @@ -34,6 +34,7 @@ #include "r4300/r4300.h" #include "r4300/recomph.h" +#ifdef DYNAREC void init_cache(usf_state_t * state, precomp_instr* start) { int i; @@ -622,4 +623,4 @@ void build_wrappers(usf_state_t * state, precomp_instr *instr, int start, int en } } } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.h index 892580c5f..202e73f2c 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.h +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.h @@ -25,6 +25,7 @@ #include "r4300/recomp.h" +#ifdef DYNAREC void init_cache(usf_state_t *, precomp_instr* start); void free_registers_move_start(usf_state_t *); void free_all_registers(usf_state_t *); @@ -42,6 +43,7 @@ int allocate_register_64_w(usf_state_t *, unsigned long long *addr); void allocate_register_32_manually(usf_state_t *, int reg, unsigned int *addr); void allocate_register_32_manually_w(usf_state_t *, int reg, unsigned int *addr); void build_wrappers(usf_state_t *, precomp_instr*, int, int, precomp_block*); +#endif #endif /* M64P_R4300_REGCACHE_H */ diff --git a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/rjump.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/rjump.c index 4007b2d2e..8112ea712 100644 --- a/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/rjump.c +++ b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/rjump.c @@ -20,6 +20,8 @@ * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */ +#ifdef DYNAREC + #include #include "usf/usf.h" @@ -108,4 +110,4 @@ void dyna_stop(usf_state_t * state) *state->return_address = (unsigned long long) state->save_rip; } } - +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.h index 5c7aeb19e..0422ee3d9 100644 --- a/Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.h +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.h @@ -27,6 +27,12 @@ /* * Streaming SIMD Extensions version import management */ +#ifdef __aarch64__ +#define ARCH_MIN_ARM_NEON 1 +#else +#define ARCH_MIN_SSE2 1 +#endif + #ifdef ARCH_MIN_SSSE3 #define ARCH_MIN_SSE2 #include diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsaw.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsaw.h index a6f4b28f1..db682c110 100644 --- a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsaw.h +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsaw.h @@ -34,22 +34,22 @@ static void VSAR(usf_state_t * state, int vd, int vs, int vt, int e) if (e > 2) { message(state, "VSAR\nInvalid mask.", 2); - #if ARCH_MIN_ARM_NEON +#if ARCH_MIN_ARM_NEON int16x8_t zero = vdupq_n_s16(0); vst1q_s16(VR[vd], zero); - #else +#else for (i = 0; i < N; i++) state->VR[vd][i] = 0x0000; /* override behavior (zilmar) */ - #endif +#endif } else { - #if ARCH_MIN_ARM_NEON +#if ARCH_MIN_ARM_NEON vector_copy(VR[vd], VACC[e]); - #else +#else for (i = 0; i < N; i++) state->VR[vd][i] = state->VACC[e][i]; - #endif +#endif } for (i = 0; i < N; i++) @@ -72,18 +72,18 @@ static void VSAW(usf_state_t * state, int vd, int vs, int vt, int e) { /* branch very unlikely...never seen a game do VSAW illegally */ message(state, "VSAW\nIllegal mask.", 2); - #if ARCH_MIN_ARM_NEON +#if ARCH_MIN_ARM_NEON int16x8_t zero = vdupq_n_s16(0); vst1q_s16(state->VR[vd], zero); - #else +#else for (i = 0; i < N; i++) state->VR[vd][i] = 0x0000; /* override behavior (zilmar) */ return; - #endif +#endif } vector_copy(state->VR[vd], state->VACC[e]); return; diff --git a/Frameworks/lazyusf2/lazyusf2/usf/usf_internal.h b/Frameworks/lazyusf2/lazyusf2/usf/usf_internal.h index 6aa2889cb..3fe2755ff 100644 --- a/Frameworks/lazyusf2/lazyusf2/usf/usf_internal.h +++ b/Frameworks/lazyusf2/lazyusf2/usf/usf_internal.h @@ -167,7 +167,9 @@ typedef struct _precomp_instr } f; unsigned int addr; /* word-aligned instruction address in r4300 address space */ unsigned int local_addr; /* byte offset to start of corresponding x86_64 instructions, from start of code block */ +#ifdef DYNAREC reg_cache_struct reg_cache_infos; +#endif } precomp_instr; typedef struct _precomp_block diff --git a/Frameworks/libsidplay/libsidplay/config.h b/Frameworks/libsidplay/libsidplay/config.h index 5705fed4b..08c4cfd86 100644 --- a/Frameworks/libsidplay/libsidplay/config.h +++ b/Frameworks/libsidplay/libsidplay/config.h @@ -5,7 +5,9 @@ #define HAVE_BOOL 1 +#if !defined(__aarch64__) #define HAVE_MMINTRIN_H 1 +#endif #define HAVE_STRCASECMP 1 diff --git a/Frameworks/vio2sf/vio2sf/src/vio2sf/desmume/SPU.h b/Frameworks/vio2sf/vio2sf/src/vio2sf/desmume/SPU.h index beb272509..6e1620b72 100644 --- a/Frameworks/vio2sf/vio2sf/src/vio2sf/desmume/SPU.h +++ b/Frameworks/vio2sf/vio2sf/src/vio2sf/desmume/SPU.h @@ -187,13 +187,21 @@ struct SPU_struct void ShutUp(); }; +#ifdef __cplusplus +extern "C" { +#endif + SoundInterface_struct *SPU_SoundCore(NDS_state *); void SPU_Pause(NDS_state *, int pause); void SPU_SetVolume(NDS_state *, int volume); void SPU_KeyOn(NDS_state *, int channel); void SPU_Emulate_core(NDS_state *); -void SPU_Emulate_user(NDS_state *, bool mix = true); +void SPU_Emulate_user(NDS_state *, BOOL mix = true); + +#ifdef __cplusplus +} +#endif class WavWriter { @@ -207,10 +215,17 @@ private: FILE *spufp; }; +#ifdef __cplusplus +extern "C" { +#endif void WAV_End(NDS_state *); bool WAV_Begin(NDS_state *, const char* fname); bool WAV_IsRecording(NDS_state *); void WAV_WavSoundUpdate(NDS_state *, void* soundData, int numSamples); +#ifdef __cplusplus +} +#endif + #endif diff --git a/Frameworks/vio2sf/vio2sf/src/vio2sf/desmume/types.h b/Frameworks/vio2sf/vio2sf/src/vio2sf/desmume/types.h index f274e50de..1e8c2e63d 100644 --- a/Frameworks/vio2sf/vio2sf/src/vio2sf/desmume/types.h +++ b/Frameworks/vio2sf/vio2sf/src/vio2sf/desmume/types.h @@ -100,8 +100,13 @@ typedef s16 v10; #ifdef WIN32 typedef int BOOL; #else +#ifdef __aarch64__ +#include +typedef bool BOOL; +#else typedef signed char BOOL; #endif +#endif #else //apple also defines BOOL typedef int desmume_BOOL;