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83CA149D1A988138005E7ED4 /* cached_interp.h */, - 83CA149E1A988138005E7ED4 /* cp0.c */, - 83CA149F1A988138005E7ED4 /* cp0.h */, - 83CA14A01A988138005E7ED4 /* cp1.c */, - 83CA14A11A988138005E7ED4 /* cp1.h */, - 83CA14A31A988138005E7ED4 /* exception.c */, - 83CA14A41A988138005E7ED4 /* exception.h */, - 83CA14A51A988138005E7ED4 /* fpu.h */, - 83CA14A71A988138005E7ED4 /* instr_counters.h */, - 83CA14A81A988138005E7ED4 /* interpreter.def */, - 83CA14A91A988138005E7ED4 /* interpreter_cop0.def */, - 83CA14AA1A988138005E7ED4 /* interpreter_cop1.def */, - 83CA14AB1A988138005E7ED4 /* interpreter_r4300.def */, - 83CA14AC1A988138005E7ED4 /* interpreter_regimm.def */, - 83CA14AD1A988138005E7ED4 /* interpreter_special.def */, - 83CA14AE1A988138005E7ED4 /* interpreter_tlb.def */, - 83CA14AF1A988138005E7ED4 /* interupt.c */, - 83CA14B01A988138005E7ED4 /* interupt.h */, - 83CA14B11A988138005E7ED4 /* macros.h */, - 83CA14B21A988138005E7ED4 /* mi_controller.c */, - 83CA14B31A988138005E7ED4 /* mi_controller.h */, - 83CA14BE1A988138005E7ED4 /* ops.h */, - 83CA14BF1A988138005E7ED4 /* pure_interp.c */, - 83CA14C01A988138005E7ED4 /* pure_interp.h */, - 83CA14C11A988138005E7ED4 /* r4300.c */, - 83CA14C21A988138005E7ED4 /* r4300.h */, - 83CA14C31A988138005E7ED4 /* r4300_core.c */, - 83CA14C41A988138005E7ED4 /* r4300_core.h */, - 83CA14C51A988138005E7ED4 /* recomp.c */, - 83CA14C61A988138005E7ED4 /* recomp.h */, - 83CA14C71A988138005E7ED4 /* recomph.h */, - 83CA14C81A988138005E7ED4 /* reset.c */, - 83CA14C91A988138005E7ED4 /* reset.h */, - 83CA14CA1A988138005E7ED4 /* tlb.c */, - 83CA14CB1A988138005E7ED4 /* tlb.h */, - 83CA14DF1A988138005E7ED4 /* x86_64 */, - ); - path = r4300; - sourceTree = ""; - }; - 83CA14DF1A988138005E7ED4 /* x86_64 */ = { - isa = PBXGroup; - children = ( - 83CA14E01A988138005E7ED4 /* assemble.c */, - 83CA14E11A988138005E7ED4 /* assemble.h */, - 83CA14E21A988138005E7ED4 /* assemble_struct.h */, - 83CA14E31A988138005E7ED4 /* gbc.c */, - 83CA14E41A988138005E7ED4 /* gcop0.c */, - 83CA14E51A988138005E7ED4 /* gcop1.c */, - 83CA14E61A988138005E7ED4 /* gcop1_d.c */, - 83CA14E71A988138005E7ED4 /* gcop1_l.c */, - 83CA14E81A988138005E7ED4 /* gcop1_s.c */, - 83CA14E91A988138005E7ED4 /* gcop1_w.c */, - 83CA14EA1A988138005E7ED4 /* gr4300.c */, - 83CA14EB1A988138005E7ED4 /* gregimm.c */, - 83CA14EC1A988138005E7ED4 /* gspecial.c */, - 83CA14ED1A988138005E7ED4 /* gtlb.c */, - 83CA14EE1A988138005E7ED4 /* interpret.h */, - 83CA14EF1A988138005E7ED4 /* regcache.c */, - 83CA14F01A988138005E7ED4 /* regcache.h */, - 83CA14F11A988138005E7ED4 /* rjump.c */, - ); - path = x86_64; - sourceTree = ""; - }; - 83CA14F21A988138005E7ED4 /* rdp */ = { - isa = PBXGroup; - children = ( - 83CA14F31A988138005E7ED4 /* rdp_core.c */, - 83CA14F41A988138005E7ED4 /* rdp_core.h */, - ); - path = rdp; - sourceTree = ""; - }; - 83CA14F51A988138005E7ED4 /* ri */ = { - isa = PBXGroup; - children = ( - 83CA14F61A988138005E7ED4 /* rdram.c */, - 83CA14F71A988138005E7ED4 /* rdram.h */, - 83CA14F81A988138005E7ED4 /* rdram_detection_hack.c */, - 83CA14F91A988138005E7ED4 /* rdram_detection_hack.h */, - 83CA14FA1A988138005E7ED4 /* ri_controller.c */, - 83CA14FB1A988138005E7ED4 /* ri_controller.h */, - ); - path = ri; - sourceTree = ""; - }; - 83CA14FC1A988138005E7ED4 /* rsp */ = { - isa = PBXGroup; - children = ( - 83CA14FD1A988138005E7ED4 /* rsp_core.c */, - 83CA14FE1A988138005E7ED4 /* rsp_core.h */, - ); - path = rsp; - sourceTree = ""; - }; 83CA14FF1A988138005E7ED4 /* rsp_hle */ = { isa = PBXGroup; children = ( - 83CA15001A988138005E7ED4 /* alist.c */, - 83CA15011A988138005E7ED4 /* alist.h */, 83CA15021A988138005E7ED4 /* alist_audio.c */, 83CA15031A988138005E7ED4 /* alist_naudio.c */, 83CA15041A988138005E7ED4 /* alist_nead.c */, + 83CA15001A988138005E7ED4 /* alist.c */, + 83CA15011A988138005E7ED4 /* alist.h */, 83CA15051A988138005E7ED4 /* arithmetics.h */, 83CA15061A988138005E7ED4 /* audio.c */, 83CA15071A988138005E7ED4 /* audio.h */, 83CA15081A988138005E7ED4 /* cicx105.c */, 83CA15091A988138005E7ED4 /* common.h */, - 83CA150A1A988138005E7ED4 /* hle.c */, - 83CA150B1A988138005E7ED4 /* hle.h */, 83CA150C1A988138005E7ED4 /* hle_external.h */, 83CA150D1A988138005E7ED4 /* hle_internal.h */, + 83CA150A1A988138005E7ED4 /* hle.c */, + 83CA150B1A988138005E7ED4 /* hle.h */, 83CA150E1A988138005E7ED4 /* jpeg.c */, - 83CA150F1A988138005E7ED4 /* LICENSES */, 83CA15101A988138005E7ED4 /* memory.c */, 83CA15111A988138005E7ED4 /* memory.h */, 83CA15121A988138005E7ED4 /* mp3.c */, - 83CA15131A988138005E7ED4 /* msvc-compat */, + 83E1579320F6E39F00BAA65A /* msvc-compat */, 83CA15151A988138005E7ED4 /* musyx.c */, 83CA15161A988138005E7ED4 /* plugin.c */, 83CA15171A988138005E7ED4 /* ucodes.h */, @@ -688,122 +460,22 @@ path = rsp_hle; sourceTree = ""; }; - 83CA15131A988138005E7ED4 /* msvc-compat */ = { + 83E1579020F6E33800BAA65A /* osal */ = { isa = PBXGroup; children = ( - 83CA15141A988138005E7ED4 /* stdbool.h */, + 83E1579120F6E33800BAA65A /* preproc.h */, + ); + path = osal; + sourceTree = ""; + }; + 83E1579320F6E39F00BAA65A /* msvc-compat */ = { + isa = PBXGroup; + children = ( + 83E1579420F6E39F00BAA65A /* our-stdbool.h */, ); path = "msvc-compat"; sourceTree = ""; }; - 83CA15181A988138005E7ED4 /* rsp_lle */ = { - isa = PBXGroup; - children = ( - 83CA151A1A988138005E7ED4 /* config.h */, - 83CA151B1A988138005E7ED4 /* execute.h */, - 83CA151C1A988138005E7ED4 /* matrix.h */, - 83CA151D1A988138005E7ED4 /* rsp.c */, - 83CA151E1A988138005E7ED4 /* rsp.h */, - 83CA151F1A988138005E7ED4 /* rsp_lle.h */, - 83CA15201A988138005E7ED4 /* su.h */, - 83CA15211A988138005E7ED4 /* vu */, - ); - path = rsp_lle; - sourceTree = ""; - }; - 83CA15211A988138005E7ED4 /* vu */ = { - isa = PBXGroup; - children = ( - 83CA15221A988138005E7ED4 /* cf.h */, - 83CA15231A988138005E7ED4 /* clamp.h */, - 83CA15241A988138005E7ED4 /* divrom.h */, - 83CA15251A988138005E7ED4 /* shuffle.h */, - 83CA15261A988138005E7ED4 /* vabs.h */, - 83CA15271A988138005E7ED4 /* vadd.h */, - 83CA15281A988138005E7ED4 /* vaddc.h */, - 83CA15291A988138005E7ED4 /* vand.h */, - 83CA152A1A988138005E7ED4 /* vch.h */, - 83CA152B1A988138005E7ED4 /* vcl.h */, - 83CA152C1A988138005E7ED4 /* vcr.h */, - 83CA152D1A988138005E7ED4 /* veq.h */, - 83CA152E1A988138005E7ED4 /* vge.h */, - 83CA152F1A988138005E7ED4 /* vlt.h */, - 83CA15301A988138005E7ED4 /* vmacf.h */, - 83CA15311A988138005E7ED4 /* vmacq.h */, - 83CA15321A988138005E7ED4 /* vmacu.h */, - 83CA15331A988138005E7ED4 /* vmadh.h */, - 83CA15341A988138005E7ED4 /* vmadl.h */, - 83CA15351A988138005E7ED4 /* vmadm.h */, - 83CA15361A988138005E7ED4 /* vmadn.h */, - 83CA15371A988138005E7ED4 /* vmov.h */, - 83CA15381A988138005E7ED4 /* vmrg.h */, - 83CA15391A988138005E7ED4 /* vmudh.h */, - 83CA153A1A988138005E7ED4 /* vmudl.h */, - 83CA153B1A988138005E7ED4 /* vmudm.h */, - 83CA153C1A988138005E7ED4 /* vmudn.h */, - 83CA153D1A988138005E7ED4 /* vmulf.h */, - 83CA153E1A988138005E7ED4 /* vmulu.h */, - 83CA153F1A988138005E7ED4 /* vnand.h */, - 83CA15401A988138005E7ED4 /* vne.h */, - 83CA15411A988138005E7ED4 /* vnop.h */, - 83CA15421A988138005E7ED4 /* vnor.h */, - 83CA15431A988138005E7ED4 /* vnxor.h */, - 83CA15441A988138005E7ED4 /* vor.h */, - 83CA15451A988138005E7ED4 /* vrcp.h */, - 83CA15461A988138005E7ED4 /* vrcph.h */, - 83CA15471A988138005E7ED4 /* vrcpl.h */, - 83CA15481A988138005E7ED4 /* vrsq.h */, - 83CA15491A988138005E7ED4 /* vrsqh.h */, - 83CA154A1A988138005E7ED4 /* vrsql.h */, - 83CA154B1A988138005E7ED4 /* vsaw.h */, - 83CA154C1A988138005E7ED4 /* vsub.h */, - 83CA154D1A988138005E7ED4 /* vsubc.h */, - 83CA154E1A988138005E7ED4 /* vu.h */, - 83CA154F1A988138005E7ED4 /* vxor.h */, - ); - path = vu; - sourceTree = ""; - }; - 83CA15501A988138005E7ED4 /* si */ = { - isa = PBXGroup; - children = ( - 83CA15511A988138005E7ED4 /* cic.c */, - 83CA15521A988138005E7ED4 /* cic.h */, - 83CA15531A988138005E7ED4 /* game_controller.c */, - 83CA15541A988138005E7ED4 /* game_controller.h */, - 83CA15551A988138005E7ED4 /* n64_cic_nus_6105.c */, - 83CA15561A988138005E7ED4 /* n64_cic_nus_6105.h */, - 83CA15571A988138005E7ED4 /* pif.c */, - 83CA15581A988138005E7ED4 /* pif.h */, - 83CA15591A988138005E7ED4 /* si_controller.c */, - 83CA155A1A988138005E7ED4 /* si_controller.h */, - ); - path = si; - sourceTree = ""; - }; - 83CA155B1A988138005E7ED4 /* usf */ = { - isa = PBXGroup; - children = ( - 8379B5881AA4237E00F28A95 /* barray.c */, - 8379B5891AA4237E00F28A95 /* barray.h */, - 83C0787A1A9B544300ABBB67 /* resampler.c */, - 83C0787B1A9B544300ABBB67 /* resampler.h */, - 83CA155C1A988138005E7ED4 /* usf.c */, - 83CA155D1A988138005E7ED4 /* usf.h */, - 83CA155E1A988138005E7ED4 /* usf_internal.h */, - ); - path = usf; - sourceTree = ""; - }; - 83CA155F1A988138005E7ED4 /* vi */ = { - isa = PBXGroup; - children = ( - 83CA15601A988138005E7ED4 /* vi_controller.c */, - 83CA15611A988138005E7ED4 /* vi_controller.h */, - ); - path = vi; - sourceTree = ""; - }; /* End PBXGroup section */ /* Begin PBXHeadersBuildPhase section */ @@ -811,125 +483,92 @@ isa = PBXHeadersBuildPhase; buildActionMask = 2147483647; files = ( - 83CA16341A988138005E7ED4 /* usf.h in Headers */, - 83CA16281A988138005E7ED4 /* vxor.h in Headers */, - 83CA161F1A988138005E7ED4 /* vrcph.h in Headers */, - 83CA16091A988138005E7ED4 /* vmacf.h in Headers */, - 83CA15A21A988138005E7ED4 /* pure_interp.h in Headers */, - 83CA15881A988138005E7ED4 /* fpu.h in Headers */, - 83CA16161A988138005E7ED4 /* vmulf.h in Headers */, - 83CA16021A988138005E7ED4 /* vand.h in Headers */, - 83CA16041A988138005E7ED4 /* vcl.h in Headers */, - 83CA15AB1A988138005E7ED4 /* reset.h in Headers */, - 83CA15AD1A988138005E7ED4 /* tlb.h in Headers */, - 83CA15761A988138005E7ED4 /* util.h in Headers */, - 83CA15DB1A988138005E7ED4 /* rsp_core.h in Headers */, - 83CA15F21A988138005E7ED4 /* ucodes.h in Headers */, - 83CA15701A988138005E7ED4 /* main.h in Headers */, - 83CA15F41A988138005E7ED4 /* config.h in Headers */, - 83CA15A41A988138005E7ED4 /* r4300.h in Headers */, - 83CA15D51A988138005E7ED4 /* rdram.h in Headers */, - 83CA15D31A988138005E7ED4 /* rdp_core.h in Headers */, - 83CA162C1A988138005E7ED4 /* game_controller.h in Headers */, - 83CA15ED1A988138005E7ED4 /* memory.h in Headers */, - 83CA16191A988138005E7ED4 /* vne.h in Headers */, - 83CA162E1A988138005E7ED4 /* n64_cic_nus_6105.h in Headers */, - 83CA156E1A988138005E7ED4 /* list.h in Headers */, - 83CA157D1A988138005E7ED4 /* pi_controller.h in Headers */, - 83CA15FF1A988138005E7ED4 /* vabs.h in Headers */, - 83CA15E31A988138005E7ED4 /* audio.h in Headers */, - 83CA160E1A988138005E7ED4 /* vmadm.h in Headers */, - 83C0787D1A9B544300ABBB67 /* resampler.h in Headers */, - 83CA16051A988138005E7ED4 /* vcr.h in Headers */, - 83CA15691A988138005E7ED4 /* m64p_debugger.h in Headers */, - 83CA15F81A988138005E7ED4 /* rsp.h in Headers */, - 83CA160A1A988138005E7ED4 /* vmacq.h in Headers */, - 83CA160B1A988138005E7ED4 /* vmacu.h in Headers */, - 83CA156A1A988138005E7ED4 /* m64p_frontend.h in Headers */, - 83CA15F61A988138005E7ED4 /* matrix.h in Headers */, - 83CA16171A988138005E7ED4 /* vmulu.h in Headers */, - 83CA15A81A988138005E7ED4 /* recomp.h in Headers */, - 83CA15821A988138005E7ED4 /* cp0.h in Headers */, - 83CA16111A988138005E7ED4 /* vmrg.h in Headers */, - 83CA15741A988138005E7ED4 /* savestates.h in Headers */, - 83CA15FE1A988138005E7ED4 /* shuffle.h in Headers */, - 83CA15FA1A988138005E7ED4 /* su.h in Headers */, - 83CA15931A988138005E7ED4 /* interupt.h in Headers */, - 83CA15F91A988138005E7ED4 /* rsp_lle.h in Headers */, - 83CA16061A988138005E7ED4 /* veq.h in Headers */, - 83CA16141A988138005E7ED4 /* vmudm.h in Headers */, - 83CA14781A987E91005E7ED4 /* dbg_types.h in Headers */, - 83CA16011A988138005E7ED4 /* vaddc.h in Headers */, - 83CA16251A988138005E7ED4 /* vsub.h in Headers */, - 83CA15C11A988138005E7ED4 /* assemble.h in Headers */, - 83CA161C1A988138005E7ED4 /* vnxor.h in Headers */, - 83CA16321A988138005E7ED4 /* si_controller.h in Headers */, - 83CA15E71A988138005E7ED4 /* hle.h in Headers */, - 83CA15941A988138005E7ED4 /* macros.h in Headers */, - 83CA15791A988138005E7ED4 /* memory.h in Headers */, - 83CA16231A988138005E7ED4 /* vrsql.h in Headers */, - 83CA161D1A988138005E7ED4 /* vor.h in Headers */, - 83CA15671A988138005E7ED4 /* m64p_common.h in Headers */, - 83CA15E11A988138005E7ED4 /* arithmetics.h in Headers */, - 83CA16351A988138005E7ED4 /* usf_internal.h in Headers */, - 83CA15A01A988138005E7ED4 /* ops.h in Headers */, - 83CA162A1A988138005E7ED4 /* cic.h in Headers */, - 83CA16071A988138005E7ED4 /* vge.h in Headers */, - 83CA15E91A988138005E7ED4 /* hle_internal.h in Headers */, - 83CA16301A988138005E7ED4 /* pif.h in Headers */, - 83CA16221A988138005E7ED4 /* vrsqh.h in Headers */, - 83CA15841A988138005E7ED4 /* cp1.h in Headers */, - 83CA16241A988138005E7ED4 /* vsaw.h in Headers */, - 83CA15871A988138005E7ED4 /* exception.h in Headers */, - 83CA15661A988138005E7ED4 /* callbacks.h in Headers */, - 83CA15631A988138005E7ED4 /* ai_controller.h in Headers */, - 83CA15961A988138005E7ED4 /* mi_controller.h in Headers */, - 83CA15D71A988138005E7ED4 /* rdram_detection_hack.h in Headers */, - 83CA15FC1A988138005E7ED4 /* clamp.h in Headers */, - 83CA161A1A988138005E7ED4 /* vnop.h in Headers */, - 83CA161B1A988138005E7ED4 /* vnor.h in Headers */, - 83CA15E81A988138005E7ED4 /* hle_external.h in Headers */, - 83CA15801A988138005E7ED4 /* cached_interp.h in Headers */, - 83CA16261A988138005E7ED4 /* vsubc.h in Headers */, - 83CA15FD1A988138005E7ED4 /* divrom.h in Headers */, - 83CA15D91A988138005E7ED4 /* ri_controller.h in Headers */, - 83CA14741A987E91005E7ED4 /* preproc.h in Headers */, - 83CA15721A988138005E7ED4 /* rom.h in Headers */, - 83CA160C1A988138005E7ED4 /* vmadh.h in Headers */, - 83CA16001A988138005E7ED4 /* vadd.h in Headers */, - 83CA16131A988138005E7ED4 /* vmudl.h in Headers */, - 83CA16211A988138005E7ED4 /* vrsq.h in Headers */, - 83CA14761A987E91005E7ED4 /* dbg_decoder.h in Headers */, - 83CA16371A988138005E7ED4 /* vi_controller.h in Headers */, - 83CA158A1A988138005E7ED4 /* instr_counters.h in Headers */, - 83CA14771A987E91005E7ED4 /* dbg_decoder_local.h in Headers */, - 83CA15C21A988138005E7ED4 /* assemble_struct.h in Headers */, - 83CA15E51A988138005E7ED4 /* common.h in Headers */, - 83CA15FB1A988138005E7ED4 /* cf.h in Headers */, - 83CA16271A988138005E7ED4 /* vu.h in Headers */, - 83CA160D1A988138005E7ED4 /* vmadl.h in Headers */, - 8379B58B1AA4237E00F28A95 /* barray.h in Headers */, - 83CA157B1A988138005E7ED4 /* cart_rom.h in Headers */, - 83CA161E1A988138005E7ED4 /* vrcp.h in Headers */, - 83CA156D1A988138005E7ED4 /* m64p_vidext.h in Headers */, - 83CA15A61A988138005E7ED4 /* r4300_core.h in Headers */, - 83CA16151A988138005E7ED4 /* vmudn.h in Headers */, - 83CA16181A988138005E7ED4 /* vnand.h in Headers */, - 83CA16121A988138005E7ED4 /* vmudh.h in Headers */, - 83CA156C1A988138005E7ED4 /* m64p_types.h in Headers */, - 83CA15D01A988138005E7ED4 /* regcache.h in Headers */, - 83CA16081A988138005E7ED4 /* vlt.h in Headers */, + 83E157EF20F6E68600BAA65A /* usf.h in Headers */, + 83E1578920F6E2D500BAA65A /* audio.h in Headers */, + 83E157A820F6E5C100BAA65A /* audiolib.h in Headers */, + 83E157A920F6E5C600BAA65A /* config.h in Headers */, + 83E157AA20F6E5CA00BAA65A /* cpu_hle.h in Headers */, + 83E157AB20F6E5CE00BAA65A /* cpu.h in Headers */, + 83E157AC20F6E5D300BAA65A /* dbg_decoder.h in Headers */, + 83E157AD20F6E5D700BAA65A /* dbg_types.h in Headers */, + 83E157AE20F6E5DA00BAA65A /* dbg_decoder_local.h in Headers */, + 83E157AF20F6E5E000BAA65A /* dma.h in Headers */, + 83E157B020F6E5E600BAA65A /* exception.h in Headers */, + 83E1578C20F6E2E000BAA65A /* interpreter_cpu.h in Headers */, + 83E157B120F6E5EE00BAA65A /* interpreter_ops.h in Headers */, + 83E157B220F6E5F100BAA65A /* main.h in Headers */, + 83E157B320F6E5F500BAA65A /* memory.h in Headers */, + 83E157B420F6E5F800BAA65A /* opcode.h in Headers */, + 83E157B520F6E5FA00BAA65A /* os.h in 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buf += 4 * do_max; + + state->sample_buffer_count -= do_max; + state->sample_buffer = sample_buffer; + + length -= do_max << 2; + + if ( length ) + { + sample_buffer = state->samplebuf; + do_max = length >> 2; + for (i = 0; i < do_max; ++i) + { + *sample_buffer++ = ((int16_t*)buf)[1]; + *sample_buffer++ = ((int16_t*)buf)[0]; + buf += 4; + } + + state->samples_in_buffer = do_max; + state->cpu_running = 0; + } +} + +void AiLenChanged(usf_state_t * state) { + int32_t length = 0; + uint32_t address = (AI_DRAM_ADDR_REG & 0x00FFFFF8); + + length = AI_LEN_REG & 0x3FFF8; + +#ifdef DEBUG_INFO + fprintf(state->debug_log, "Audio DMA push: %d %d\n", AI_DRAM_ADDR_REG, length); +#endif + + AddBuffer(state, state->RDRAM+address, length); + + if(length && !(AI_STATUS_REG&0x80000000)) { + const float VSyncTiming = 789000.0f; + double BytesPerSecond = 48681812.0 / (AI_DACRATE_REG + 1) * 4; + double CountsPerSecond = (double)((((double)VSyncTiming) * (double)60.0)) * 2.0; + double CountsPerByte = (double)CountsPerSecond / (double)BytesPerSecond; + unsigned int IntScheduled = (unsigned int)((double)AI_LEN_REG * CountsPerByte); + + ChangeTimer(state,AiTimer,IntScheduled); + } + + if(state->enableFIFOfull) { + if(AI_STATUS_REG&0x40000000) + AI_STATUS_REG|=0x80000000; + } + + AI_STATUS_REG|=0x40000000; +} + +unsigned int AiReadLength(usf_state_t * state) { + AI_LEN_REG = 0; + return AI_LEN_REG; +} + +void AiDacrateChanged(usf_state_t * state, unsigned int value) { + AI_DACRATE_REG = value; + state->SampleRate = 48681812 / (AI_DACRATE_REG + 1); +} diff --git a/Frameworks/lazyusf/lazyusf/audio.h b/Frameworks/lazyusf/lazyusf/audio.h new file mode 100644 index 000000000..3721bab18 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/audio.h @@ -0,0 +1,12 @@ +#ifndef _AUDIO_H_ +#define _AUDIO_H_ + +#include "usf.h" +#include "cpu.h" +#include "memory.h" + +uint32_t AiReadLength(usf_state_t *); +void AiLenChanged(usf_state_t *); +void AiDacrateChanged(usf_state_t *, uint32_t value); + +#endif diff --git a/Frameworks/lazyusf/lazyusf/audiolib.c b/Frameworks/lazyusf/lazyusf/audiolib.c new file mode 100644 index 000000000..c567928ea --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/audiolib.c @@ -0,0 +1,271 @@ +#include "usf.h" +#include "usf_internal.h" + +#include "cpu_hle.h" +#include "audiolib.h" +#include "os.h" + +#include "main.h" +#include "memory.h" + +#define N64WORD(x) (*(uint32_t*)PageVRAM((x))) +#define N64HALF(x) (*(uint16_t*)PageVRAM((x))) +#define N64BYTE(x) (*(uint8_t*)PageVRAM((x))) + + +int alCopy(usf_state_t * state, int paddr) { + uint32_t source = (state->GPR[4].UW[0]); + uint32_t dest = (state->GPR[5].UW[0]); + uint32_t len = (state->GPR[6].UW[0]); + + if(len&3) + DisplayError(state, "OMG!!!! - alCopy length & 3\n"); + + memcpyn642n64(state, dest, source, len); + + return 1; +} + + + +int alLink(usf_state_t * state, int paddr) { + ALLink *element = (ALLink*)PageVRAM(state->GPR[4].UW[0]); + ALLink *after = (ALLink*)PageVRAM(state->GPR[5].UW[0]); + ALLink *afterNext; + + element->next = after->next; + element->prev = state->GPR[5].UW[0]; + + if (after->next) { + afterNext = (ALLink*)PageVRAM(after->next); + afterNext->prev = state->GPR[4].UW[0]; + } + + after->next = state->GPR[4].UW[0]; + return 1; +} + + +int alUnLink(usf_state_t * state, int paddr) { + ALLink *element = (ALLink*)PageVRAM(state->GPR[4].UW[0]); + ALLink *elementNext = (ALLink*)PageVRAM(element->next); + ALLink *elementPrev = (ALLink*)PageVRAM(element->prev); +// _asm int 3 + + if (element->next) + elementNext->prev = element->prev; + if (element->prev) + elementPrev->next = element->next; + return 1; +} + +int alEvtqPostEvent(usf_state_t * state, int paddr) { + ALEventQueue *evtq; + ALEvent *events; + + uint32_t A0 = state->GPR[4].UW[0]; + uint32_t A1 = state->GPR[5].UW[0]; + uint32_t DeltaTime = state->GPR[6].UW[0]; + + uint32_t nodeNext = 0; + uint32_t nextItem = 0; + uint32_t node = 0; + uint32_t nextDelta = 0; + uint32_t item = 0; + uint32_t postWhere = 0; + uint32_t NEXT = 0; + uint32_t nextItemDelta = 0; + + evtq = (ALEventQueue *)PageVRAM(A0); + events = (ALEvent *)PageVRAM(A1); +//_asm int 3 + + NEXT = evtq->freeList.next; + + if(NEXT == 0) + return 1; + + //DisplayError("%08x", N64WORD(0x800533E4)); + //cprintf("%08x\t%08x\n", N64WORD(0x800533D4), N64WORD(0x800533D8)); + + item = NEXT; + state->GPR[4].UW[0] = NEXT; + alUnLink(state, 0); + + state->GPR[4].UW[0] = A1; state->GPR[5].UW[0] = NEXT + 0xC; state->GPR[6].UW[0] = 0x10; + alCopy(state, 0); + + postWhere = (DeltaTime==0x7FFFFFFF)?1:0; + nodeNext = A0; + node = nodeNext + 8; + + while(nodeNext !=0 ) { + nodeNext = *(uint32_t*)PageVRAM(node); + + if(nodeNext != 0) { + nextDelta = *(uint32_t*)PageVRAM(nodeNext + 8); + nextItem = nodeNext; + if(DeltaTime < nextDelta) { + *(uint32_t*)PageVRAM(item + 8) = DeltaTime; + nextItemDelta = *(uint32_t*)PageVRAM(nextItem + 8); + *(uint32_t*)PageVRAM(nextItem + 8) = nextItemDelta - DeltaTime; + + state->GPR[4].UW[0] = item; state->GPR[5].UW[0] = node; + alLink(state, 0); + return 1; + } else { + node = nodeNext; + DeltaTime -= nextDelta; + if(node == 0) + return 1; + } + } + + } + + if(postWhere == 0) + *(uint32_t*)PageVRAM(item + 8) = DeltaTime; + else + *(uint32_t*)PageVRAM(item + 8) = 0; + + + state->GPR[4].UW[0] = item; state->GPR[5].UW[0] = node; + alLink(state, 0); + return 1; +} + +int alEvtqPostEvent_Alt(usf_state_t * state, int paddr) { + return 0; +} + +#ifndef MIN +#define MIN(a,b) (((a)<(b))?(a):(b)) +#endif + +uint32_t __nextSampleTime(usf_state_t * state, uint32_t driver, uint32_t *client) { + + uint32_t c = 0; + int32_t deltaTime = 0x7FFFFFFF; + *client = 0; + + for(c = N64WORD(driver); c != 0; c = N64WORD(c)) { + int samplesLeft = N64WORD(c + 0x10); + int curSamples = N64WORD(driver + 0x20); + if((samplesLeft - curSamples) < deltaTime) { + *client = c; + deltaTime = samplesLeft - curSamples; + } + } + + return N64WORD((*client)+0x10); +} + +int32_t _timeToSamplesNoRound(usf_state_t * state, long synth, long micros) +{ + uint32_t outputRate = N64WORD(synth+0x44); + float tmp = ((float)micros) * outputRate / 1000000.0 + 0.5; + //DisplayError("Smaple rate is %d", outputRate); + + return (int32_t)tmp; +} + +uint32_t byteswap(char b[4] ) { + uint32_t out = 0; + out += b[3]; + out += b[2] << 8; + out += b[1] << 16; + out += b[0] << 24; + return out; +} + +int alAudioFrame(usf_state_t * state, int paddr) { + + uint32_t alGlobals = 0; + uint32_t driver = 0, *paramSamples, *curSamples, client = 0, dl = 0; + uint32_t A0 = state->GPR[4].UW[0]; + uint32_t A1 = state->GPR[5].UW[0]; + uint32_t A2 = state->GPR[6].UW[0]; + uint32_t outLen = state->GPR[7].UW[0]; + uint32_t cmdlEnd = A0; + uint32_t lOutBuf = A2; + + alGlobals = ((*(uint16_t*)PageRAM2(paddr + 0x8)) & 0xFFFF) << 16; //alGlobals->drvr + alGlobals += *(int16_t*)PageRAM2(paddr + 0xc); + //alGlobals = 0x80750C74; + driver = N64WORD(alGlobals); + paramSamples = (uint32_t*) PageVRAM(driver + 0x1c); + curSamples = (uint32_t*) PageVRAM(driver + 0x20); + + if(N64WORD(driver) == 0) { // if(drvr->head == 0) + N64WORD(A1) = 0; + state->GPR[2].UW[0] = A0; + return 1; + } + + for(*paramSamples = __nextSampleTime(state, driver, &client); (*paramSamples - *curSamples) < outLen; *paramSamples = __nextSampleTime(state, driver, &client)) { + int32_t *cSamplesLeft; + cSamplesLeft = (int32_t *) PageVRAM(client + 0x10); + *paramSamples &= ~0xf; + + //run handler (not-HLE'd) + state->GPR[4].UW[0] = client; + RunFunction(state, N64WORD(client+0x8)); + *cSamplesLeft += _timeToSamplesNoRound(state, driver, state->GPR[2].UW[0]); + } + + *paramSamples &= ~0xf; + + //give us some stack + state->GPR[0x1d].UW[0] -= 0x20; + N64WORD(state->GPR[0x1d].UW[0]+0x4) = 0; //tmp + + while (outLen > 0) { + + uint32_t maxOutSamples = 0, nOut = 0, cmdPtr = 0, output = 0, setParam = 0, handler = 0; + + maxOutSamples = N64WORD(driver + 0x48); + nOut = MIN(maxOutSamples, outLen); + cmdPtr = cmdlEnd;//+8; + + output = N64WORD(driver + 0x38); + setParam = N64WORD(output+8); // alSaveParam + + state->GPR[4].DW = output; + state->GPR[5].DW = 0x6; // AL_FILTER_SET_DRAM + state->GPR[6].DW = lOutBuf; + RunFunction(state, setParam); + + handler = N64WORD(output+4); // alSavePull + state->GPR[4].DW = output; + state->GPR[5].DW = state->GPR[0x1d].UW[0]+0x12; //&tmp + state->GPR[6].DW = nOut; + state->GPR[7].DW = *curSamples; + N64WORD(state->GPR[0x1d].UW[0]+0x10) = cmdPtr; + RunFunction(state, handler); + + curSamples = (uint32_t *) PageVRAM(driver + 0x20); + + cmdlEnd = state->GPR[2].UW[0]; + outLen -= nOut; + lOutBuf += (nOut<<2); + *curSamples += nOut; + + } + + state->GPR[0x1d].UW[0] += 0x20; + + N64WORD(A1) = (int32_t) ((cmdlEnd - A0) >> 3); + + state->GPR[4].UW[0] = driver; + + while( (dl = N64WORD(driver+0x14)) ) { + state->GPR[4].UW[0] = dl; + alUnLink(state, 0); + state->GPR[4].UW[0] = dl; + state->GPR[5].UW[0] = driver + 4; + alLink(state, 0); + } + + state->GPR[2].UW[0] = cmdlEnd; + return 1; +} diff --git a/Frameworks/lazyusf/lazyusf/audiolib.h b/Frameworks/lazyusf/lazyusf/audiolib.h new file mode 100644 index 000000000..375e9b8cb --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/audiolib.h @@ -0,0 +1,60 @@ +#ifndef _CPU_HLE_AUDIOLIB_ +#define _CPU_HLE_AUDIOLIB_ + + + +#include "cpu_hle.h" +#include "os.h" + +// a few of these structures/type were sequestered from SGI\Nindendo's code + +typedef struct ALLink_s { + uint32_t next; + uint32_t prev; +} ALLink; + +typedef struct { + ALLink freeList; + ALLink allocList; + int32_t eventCount; +} ALEventQueue; + + +typedef struct { + uint16_t type; + uint8_t msg[12]; +} ALEvent; + + +typedef struct { + ALLink node; + int32_t delta; //microtime + ALEvent event; +} ALEventListItem; + +int alCopy(usf_state_t *, int paddr); +int alLink(usf_state_t *, int paddr); +int alUnLink(usf_state_t *, int paddr); +int alEvtqPostEvent(usf_state_t *, int paddr) ; +int alEvtqPostEvent_Alt(usf_state_t *, int paddr); +int alAudioFrame(usf_state_t *, int paddr); + +// need to remove these + +typedef struct { + uint8_t *base; + uint8_t *cur; + int32_t len; + int32_t count; +} ALHeap; + +typedef struct ALPlayer_s { + struct ALPlayer_s *next; + void *clientData; + void *handler; + int32_t callTime; + int32_t samplesLeft; +} ALPlayer; + + +#endif diff --git a/Frameworks/lazyusf/lazyusf/config.h b/Frameworks/lazyusf/lazyusf/config.h new file mode 100644 index 000000000..ab09878e1 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/config.h @@ -0,0 +1,63 @@ +/* config.h. Generated from config.h.in by configure. */ +/* config.h.in. Generated from configure.in by autoheader. */ + +/* Define to 1 if you have the header file. */ +#define HAVE_DLFCN_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_INTTYPES_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_MEMORY_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDINT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STDLIB_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STRINGS_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_STRING_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_STAT_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_SYS_TYPES_H 1 + +/* Define to 1 if you have the header file. */ +#define HAVE_UNISTD_H 1 + +/* Define to the sub-directory in which libtool stores uninstalled libraries. + */ +#define LT_OBJDIR ".libs/" + +/* Name of package */ +#define PACKAGE "lazyusf" + +/* Define to the address where bug reports for this package should be sent. */ +#define PACKAGE_BUGREPORT "" + +/* Define to the full name of this package. */ +#define PACKAGE_NAME "lazyusf" + +/* Define to the full name and version of this package. */ +#define PACKAGE_STRING "lazyusf 1.0.0" + +/* Define to the one symbol short name of this package. */ +#define PACKAGE_TARNAME "lazyusf" + +/* Define to the version of this package. */ +#define PACKAGE_VERSION "1.0.0" + +/* Define to 1 if you have the ANSI C header files. */ +#define STDC_HEADERS 1 + +/* Version number of package */ +#define VERSION "1.0.0" + +/* Define to 1 if the X Window System is missing or not being used. */ +/* #undef X_DISPLAY_MISSING */ diff --git a/Frameworks/lazyusf/lazyusf/cpu.c b/Frameworks/lazyusf/lazyusf/cpu.c new file mode 100644 index 000000000..ef32418ae --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/cpu.c @@ -0,0 +1,604 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ + +#include +#include + +#include "main.h" +#include "cpu.h" +#include "usf.h" +#include "audio.h" +#include "registers.h" +#include "rsp.h" +#include "cpu_hle.h" + +#include "usf_internal.h" + +#include + +void ChangeCompareTimer(usf_state_t * state) { + uint32_t NextCompare = COMPARE_REGISTER - COUNT_REGISTER; + if ((NextCompare & 0x80000000) != 0) { NextCompare = 0x7FFFFFFF; } + if (NextCompare == 0) { NextCompare = 0x1; } + ChangeTimer(state,CompareTimer,NextCompare); +} + +void ChangeTimer(usf_state_t * state, int32_t Type, int32_t Value) { + if (Value == 0) { + state->Timers->NextTimer[Type] = 0; + state->Timers->Active[Type] = 0; + return; + } + state->Timers->NextTimer[Type] = Value - state->Timers->Timer; + state->Timers->Active[Type] = 1; + CheckTimer(state); +} + +void CheckTimer (usf_state_t * state) { + int32_t count; + + for (count = 0; count < MaxTimers; count++) { + if (!state->Timers->Active[count]) { continue; } + if (!(count == CompareTimer && state->Timers->NextTimer[count] == 0x7FFFFFFF)) { + state->Timers->NextTimer[count] += state->Timers->Timer; + } + } + state->Timers->CurrentTimerType = -1; + state->Timers->Timer = 0x7FFFFFFF; + for (count = 0; count < MaxTimers; count++) { + if (!state->Timers->Active[count]) { continue; } + if (state->Timers->NextTimer[count] >= state->Timers->Timer) { continue; } + state->Timers->Timer = state->Timers->NextTimer[count]; + state->Timers->CurrentTimerType = count; + } + if (state->Timers->CurrentTimerType == -1) { + DisplayError(state, "No active timers ???\nEmulation Stopped"); + StopEmulation(state); + } + for (count = 0; count < MaxTimers; count++) { + if (!state->Timers->Active[count]) { continue; } + if (!(count == CompareTimer && state->Timers->NextTimer[count] == 0x7FFFFFFF)) { + state->Timers->NextTimer[count] -= state->Timers->Timer; + } + } + + if (state->Timers->NextTimer[CompareTimer] == 0x7FFFFFFF) { + uint32_t NextCompare = COMPARE_REGISTER - COUNT_REGISTER; + if ((NextCompare & 0x80000000) == 0 && NextCompare != 0x7FFFFFFF) { + ChangeCompareTimer(state); + } + } +} + + + +void CloseCpu (usf_state_t * state) { + uint32_t count = 0; + + if(!state->MemChunk) return; + if (!state->cpu_running) { return; } + + state->cpu_running = 0; + + for (count = 0; count < 3; count ++ ) { + state->CPU_Action->CloseCPU = 1; + state->CPU_Action->DoSomething = 1; + } + + state->CPURunning = 0; +} + +int32_t DelaySlotEffectsCompare (usf_state_t * state, uint32_t PC, uint32_t Reg1, uint32_t Reg2) { + OPCODE Command; + + if (!r4300i_LW_VAddr(state, PC + 4, (uint32_t*)&Command.u.Hex)) { + return 1; + } + + switch (Command.u.b.op) { + case R4300i_SPECIAL: + switch (Command.u.e.funct) { + case R4300i_SPECIAL_SLL: + case R4300i_SPECIAL_SRL: + case R4300i_SPECIAL_SRA: + case R4300i_SPECIAL_SLLV: + case R4300i_SPECIAL_SRLV: + case R4300i_SPECIAL_SRAV: + case R4300i_SPECIAL_MFHI: + case R4300i_SPECIAL_MTHI: + case R4300i_SPECIAL_MFLO: + case R4300i_SPECIAL_MTLO: + case R4300i_SPECIAL_DSLLV: + case R4300i_SPECIAL_DSRLV: + case R4300i_SPECIAL_DSRAV: + case R4300i_SPECIAL_ADD: + case R4300i_SPECIAL_ADDU: + case R4300i_SPECIAL_SUB: + case R4300i_SPECIAL_SUBU: + case R4300i_SPECIAL_AND: + case R4300i_SPECIAL_OR: + case R4300i_SPECIAL_XOR: + case R4300i_SPECIAL_NOR: + case R4300i_SPECIAL_SLT: + case R4300i_SPECIAL_SLTU: + case R4300i_SPECIAL_DADD: + case R4300i_SPECIAL_DADDU: + case R4300i_SPECIAL_DSUB: + case R4300i_SPECIAL_DSUBU: + case R4300i_SPECIAL_DSLL: + case R4300i_SPECIAL_DSRL: + case R4300i_SPECIAL_DSRA: + case R4300i_SPECIAL_DSLL32: + case R4300i_SPECIAL_DSRL32: + case R4300i_SPECIAL_DSRA32: + if (Command.u.e.rd == 0) { return 0; } + if (Command.u.e.rd == Reg1) { return 1; } + if (Command.u.e.rd == Reg2) { return 1; } + break; + case R4300i_SPECIAL_MULT: + case R4300i_SPECIAL_MULTU: + case R4300i_SPECIAL_DIV: + case R4300i_SPECIAL_DIVU: + case R4300i_SPECIAL_DMULT: + case R4300i_SPECIAL_DMULTU: + case R4300i_SPECIAL_DDIV: + case R4300i_SPECIAL_DDIVU: + break; + default: + return 1; + } + break; + case R4300i_CP0: + switch (Command.u.b.rs) { + case R4300i_COP0_MT: break; + case R4300i_COP0_MF: + if (Command.u.b.rt == 0) { return 0; } + if (Command.u.b.rt == Reg1) { return 1; } + if (Command.u.b.rt == Reg2) { return 1; } + break; + default: + if ( (Command.u.b.rs & 0x10 ) != 0 ) { + switch( state->Opcode.u.e.funct ) { + case R4300i_COP0_CO_TLBR: break; + case R4300i_COP0_CO_TLBWI: break; + case R4300i_COP0_CO_TLBWR: break; + case R4300i_COP0_CO_TLBP: break; + default: + return 1; + } + return 1; + } + } + break; + case R4300i_CP1: + switch (Command.u.f.fmt) { + case R4300i_COP1_MF: + if (Command.u.b.rt == 0) { return 0; } + if (Command.u.b.rt == Reg1) { return 1; } + if (Command.u.b.rt == Reg2) { return 1; } + break; + case R4300i_COP1_CF: break; + case R4300i_COP1_MT: break; + case R4300i_COP1_CT: break; + case R4300i_COP1_S: break; + case R4300i_COP1_D: break; + case R4300i_COP1_W: break; + case R4300i_COP1_L: break; + return 1; + } + break; + case R4300i_ANDI: + case R4300i_ORI: + case R4300i_XORI: + case R4300i_LUI: + case R4300i_ADDI: + case R4300i_ADDIU: + case R4300i_SLTI: + case R4300i_SLTIU: + case R4300i_DADDI: + case R4300i_DADDIU: + case R4300i_LB: + case R4300i_LH: + case R4300i_LW: + case R4300i_LWL: + case R4300i_LWR: + case R4300i_LDL: + case R4300i_LDR: + case R4300i_LBU: + case R4300i_LHU: + case R4300i_LD: + case R4300i_LWC1: + case R4300i_LDC1: + if (Command.u.b.rt == 0) { return 0; } + if (Command.u.b.rt == Reg1) { return 1; } + if (Command.u.b.rt == Reg2) { return 1; } + break; + case R4300i_CACHE: break; + case R4300i_SB: break; + case R4300i_SH: break; + case R4300i_SW: break; + case R4300i_SWR: break; + case R4300i_SWL: break; + case R4300i_SWC1: break; + case R4300i_SDC1: break; + case R4300i_SD: break; + default: + + return 1; + } + return 0; +} + +int32_t DelaySlotEffectsJump (usf_state_t * state, uint32_t JumpPC) { + OPCODE Command; + + if (!r4300i_LW_VAddr(state, JumpPC, &Command.u.Hex)) { return 1; } + + switch (Command.u.b.op) { + case R4300i_SPECIAL: + switch (Command.u.e.funct) { + case R4300i_SPECIAL_JR: return DelaySlotEffectsCompare(state,JumpPC,Command.u.b.rs,0); + case R4300i_SPECIAL_JALR: return DelaySlotEffectsCompare(state,JumpPC,Command.u.b.rs,31); + } + break; + case R4300i_REGIMM: + switch (Command.u.b.rt) { + case R4300i_REGIMM_BLTZ: + case R4300i_REGIMM_BGEZ: + case R4300i_REGIMM_BLTZL: + case R4300i_REGIMM_BGEZL: + case R4300i_REGIMM_BLTZAL: + case R4300i_REGIMM_BGEZAL: + return DelaySlotEffectsCompare(state,JumpPC,Command.u.b.rs,0); + } + break; + case R4300i_JAL: + case R4300i_SPECIAL_JALR: return DelaySlotEffectsCompare(state,JumpPC,31,0); break; + case R4300i_J: return 0; + case R4300i_BEQ: + case R4300i_BNE: + case R4300i_BLEZ: + case R4300i_BGTZ: + return DelaySlotEffectsCompare(state,JumpPC,Command.u.b.rs,Command.u.b.rt); + case R4300i_CP1: + switch (Command.u.f.fmt) { + case R4300i_COP1_BC: + switch (Command.u.f.ft) { + case R4300i_COP1_BC_BCF: + case R4300i_COP1_BC_BCT: + case R4300i_COP1_BC_BCFL: + case R4300i_COP1_BC_BCTL: + { + int32_t EffectDelaySlot; + OPCODE NewCommand; + + if (!r4300i_LW_VAddr(state, JumpPC + 4, &NewCommand.u.Hex)) { return 1; } + + EffectDelaySlot = 0; + if (NewCommand.u.b.op == R4300i_CP1) { + if (NewCommand.u.f.fmt == R4300i_COP1_S && (NewCommand.u.e.funct & 0x30) == 0x30 ) { + EffectDelaySlot = 1; + } + if (NewCommand.u.f.fmt == R4300i_COP1_D && (NewCommand.u.e.funct & 0x30) == 0x30 ) { + EffectDelaySlot = 1; + } + } + return EffectDelaySlot; + } + break; + } + break; + } + break; + case R4300i_BEQL: + case R4300i_BNEL: + case R4300i_BLEZL: + case R4300i_BGTZL: + return DelaySlotEffectsCompare(state,JumpPC,Command.u.b.rs,Command.u.b.rt); + } + return 1; +} + +void DoSomething ( usf_state_t * state ) { + if (state->CPU_Action->CloseCPU) { + //StopEmulation(); + state->cpu_running = 0; + //printf("Stopping?\n"); + } + if (state->CPU_Action->CheckInterrupts) { + state->CPU_Action->CheckInterrupts = 0; + CheckInterrupts(state); + } + if (state->CPU_Action->DoInterrupt) { + state->CPU_Action->DoInterrupt = 0; + DoIntrException(state, 0); + } + + + state->CPU_Action->DoSomething = 0; + + if (state->CPU_Action->DoInterrupt) { state->CPU_Action->DoSomething = 1; } +} + +void InPermLoop ( usf_state_t * state ) { + // *** Changed ***/ + if (state->CPU_Action->DoInterrupt) { return; } + + /* Interrupts enabled */ + if (( STATUS_REGISTER & STATUS_IE ) == 0 ) { goto InterruptsDisabled; } + if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { goto InterruptsDisabled; } + if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { goto InterruptsDisabled; } + if (( STATUS_REGISTER & 0xFF00) == 0) { goto InterruptsDisabled; } + + /* check sound playing */ + + /* check RSP running */ + /* check RDP running */ + if (state->Timers->Timer >= 0) { + COUNT_REGISTER += state->Timers->Timer + 1; + state->Timers->Timer = -1; + } + return; + +InterruptsDisabled: + DisplayError(state, "Stuck in Permanent Loop"); + StopEmulation(state); +} + +void ReadFromMem(const void * source, void * target, uint32_t length, uint32_t *offset) { + memcpy((uint8_t*)target,((uint8_t*)source)+*offset,length); + *offset+=length; +} + + +uint32_t Machine_LoadStateFromRAM(usf_state_t * state, void * savestatespace) { + uint8_t LoadHeader[0x40]; + uint32_t Value, count, SaveRDRAMSize, offset=0; + + ReadFromMem( savestatespace,&Value,sizeof(Value),&offset); + if (Value != 0x23D8A6C8) { return 0; } + ReadFromMem( savestatespace,&SaveRDRAMSize,sizeof(SaveRDRAMSize),&offset); + ReadFromMem( savestatespace,&LoadHeader,0x40,&offset); + + state->Timers->CurrentTimerType = -1; + state->Timers->Timer = 0; + for (count = 0; count < MaxTimers; count ++) { state->Timers->Active[count] = 0; } + + //fix rdram size + if (SaveRDRAMSize != state->RdramSize) { + // dothis :) + } + + state->RdramSize = SaveRDRAMSize; + + ReadFromMem( savestatespace,&Value,sizeof(Value),&offset); + ChangeTimer(state,ViTimer,Value); + ReadFromMem( savestatespace,&state->PROGRAM_COUNTER,sizeof(state->PROGRAM_COUNTER),&offset); + ReadFromMem( savestatespace,state->GPR,sizeof(int64_t)*32,&offset); + ReadFromMem( savestatespace,state->FPR,sizeof(int64_t)*32,&offset); + ReadFromMem( savestatespace,state->CP0,sizeof(uint32_t)*32,&offset); + ReadFromMem( savestatespace,state->FPCR,sizeof(uint32_t)*32,&offset); + ReadFromMem( savestatespace,&state->HI,sizeof(int64_t),&offset); + ReadFromMem( savestatespace,&state->LO,sizeof(int64_t),&offset); + ReadFromMem( savestatespace,state->RegRDRAM,sizeof(uint32_t)*10,&offset); + ReadFromMem( savestatespace,state->RegSP,sizeof(uint32_t)*10,&offset); + ReadFromMem( savestatespace,state->RegDPC,sizeof(uint32_t)*10,&offset); + ReadFromMem( savestatespace,state->RegMI,sizeof(uint32_t)*4,&offset); + ReadFromMem( savestatespace,state->RegVI,sizeof(uint32_t)*14,&offset); + ReadFromMem( savestatespace,state->RegAI,sizeof(uint32_t)*6,&offset); + ReadFromMem( savestatespace,state->RegPI,sizeof(uint32_t)*13,&offset); + ReadFromMem( savestatespace,state->RegRI,sizeof(uint32_t)*8,&offset); + ReadFromMem( savestatespace,state->RegSI,sizeof(uint32_t)*4,&offset); + ReadFromMem( savestatespace,state->tlb,sizeof(TLB)*32,&offset); + ReadFromMem( savestatespace,(uint8_t*)state->PIF_Ram,0x40,&offset); + ReadFromMem( savestatespace,state->RDRAM,SaveRDRAMSize,&offset); + ReadFromMem( savestatespace,state->DMEM,0x1000,&offset); + ReadFromMem( savestatespace,state->IMEM,0x1000,&offset); + + state->CP0[32] = 0; + + SetupTLB(state); + ChangeCompareTimer(state); + AI_STATUS_REG = 0; + AiDacrateChanged(state, AI_DACRATE_REG); + +// StartAiInterrupt(state); + + SetFpuLocations(state); // important if FR=1 + + return 1; +} + +void StartEmulationFromSave ( usf_state_t * state, void * savestate ) { + uint32_t count = 0; + + //printf("Starting generic Cpu\n"); + + //CloseCpu(); + memset(state->N64MEM, 0, state->RdramSize); + + memset(state->DMEM, 0, 0x1000); + memset(state->IMEM, 0, 0x1000); + memset(state->TLB_Map, 0, 0x100000 * sizeof(uintptr_t) + 0x10000); + + memset(state->CPU_Action,0,sizeof(*state->CPU_Action)); + state->WrittenToRom = 0; + + InitilizeTLB(state); + + SetupRegisters(state, state->Registers); + + BuildInterpreter(state); + + state->Timers->CurrentTimerType = -1; + state->Timers->Timer = 0; + + for (count = 0; count < MaxTimers; count ++) { state->Timers->Active[count] = 0; } + ChangeTimer(state,ViTimer,5000); + ChangeCompareTimer(state); + state->ViFieldNumber = 0; + state->CPURunning = 1; + *state->WaitMode = 0; + + init_rsp(state); + + Machine_LoadStateFromRAM(state, savestate); + + state->SampleRate = 48681812 / (AI_DACRATE_REG + 1); + + if(state->enableFIFOfull) { + const float VSyncTiming = 789000.0f; + double BytesPerSecond = 48681812.0 / (AI_DACRATE_REG + 1) * 4; + double CountsPerSecond = (double)(((double)VSyncTiming) * (double)60.0); + double CountsPerByte = (double)CountsPerSecond / (double)BytesPerSecond; + uint32_t IntScheduled = (uint32_t)((double)AI_LEN_REG * CountsPerByte); + + ChangeTimer(state,AiTimer,IntScheduled); + AI_STATUS_REG|=0x40000000; + } + + state->OLD_VI_V_SYNC_REG = ~VI_V_SYNC_REG; + + CPUHLE_Scan(state); +} + + +void RefreshScreen (usf_state_t * state){ + if (state->OLD_VI_V_SYNC_REG != VI_V_SYNC_REG) + { + state->OLD_VI_V_SYNC_REG = VI_V_SYNC_REG; + if (VI_V_SYNC_REG == 0) + { + state->VI_INTR_TIME = 500000; + } + else + { + state->VI_INTR_TIME = (VI_V_SYNC_REG + 1) * 1500; + if ((VI_V_SYNC_REG & 1) != 0) + { + state->VI_INTR_TIME -= 38; + } + } + } + + ChangeTimer(state,ViTimer,state->Timers->Timer + state->Timers->NextTimer[ViTimer] + state->VI_INTR_TIME); + + if ((VI_STATUS_REG & 0x10) != 0) + { + if (state->ViFieldNumber == 0) + { + state->ViFieldNumber = 1; + } + else + { + state->ViFieldNumber = 0; + } + } + else + { + state->ViFieldNumber = 0; + } +} + +void RunRsp (usf_state_t * state) { +#ifdef DEBUG_INFO + fprintf(state->debug_log, "RSP Task:"); +#endif + if ( ( SP_STATUS_REG & SP_STATUS_HALT ) == 0) { + if ( ( SP_STATUS_REG & SP_STATUS_BROKE ) == 0 ) { + + uint32_t Task = *( uint32_t *)(state->DMEM + 0xFC0); + + switch (Task) { + case 1: { + MI_INTR_REG |= 0x20; + + SP_STATUS_REG |= (0x0203 ); + if ((SP_STATUS_REG & SP_STATUS_INTR_BREAK) != 0 ) + MI_INTR_REG |= 1; + +#ifdef DEBUG_INFO + fprintf(state->debug_log, " DList - interrupts %d\n", MI_INTR_REG); +#endif + + CheckInterrupts(state); + + DPC_STATUS_REG &= ~0x0002; + return; + + } + break; + case 2: { +#ifdef DEBUG_INFO + fprintf(state->debug_log, " AList"); +#endif + break; + } + break; + default: + + break; + } + + real_run_rsp(state, 100); + SP_STATUS_REG |= (0x0203 ); + if ((SP_STATUS_REG & SP_STATUS_INTR_BREAK) != 0 ) { +#ifdef DEBUG_INFO + fprintf(state->debug_log, " - interrupt"); +#endif + MI_INTR_REG |= 1; + CheckInterrupts(state); + } + } + } +#ifdef DEBUG_INFO + fprintf(state->debug_log, "\n"); +#endif +} + +void TimerDone (usf_state_t * state) { + switch (state->Timers->CurrentTimerType) { + case CompareTimer: + if(state->enablecompare) + FAKE_CAUSE_REGISTER |= CAUSE_IP7; + CheckInterrupts(state); + ChangeCompareTimer(state); + break; + case ViTimer: + RefreshScreen(state); + MI_INTR_REG |= MI_INTR_VI; + CheckInterrupts(state); + *state->WaitMode=0; + break; + case AiTimer: + ChangeTimer(state,AiTimer,0); + AI_STATUS_REG=0; + state->AudioIntrReg|=4; + //CheckInterrupts(state); + break; + } + CheckTimer(state); +} diff --git a/Frameworks/lazyusf/lazyusf/cpu.h b/Frameworks/lazyusf/lazyusf/cpu.h new file mode 100644 index 000000000..df328580e --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/cpu.h @@ -0,0 +1,95 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#ifndef _CPU_H_ +#define _CPU_H_ + +#include "interpreter_cpu.h" +#include "interpreter_ops.h" +#include "registers.h" +#include "tlb.h" +#include "memory.h" +#include "dma.h" +#include "exception.h" +#include "pif.h" +#include "opcode.h" +#include "usf.h" + +typedef struct { + int32_t DoSomething; + int32_t CloseCPU; + int32_t CheckInterrupts; + int32_t DoInterrupt; +} CPU_ACTION; + +#define MaxTimers 3 +#define CompareTimer 0 +#define ViTimer 1 +#define AiTimer 2 + +typedef struct { + int32_t NextTimer[MaxTimers]; + int32_t Active[MaxTimers]; + int32_t CurrentTimerType; + int32_t Timer; +} SYSTEM_TIMERS; + +void ChangeCompareTimer ( usf_state_t * ); +void ChangeTimer ( usf_state_t *, int32_t Type, int32_t Value ); +void CheckTimer ( usf_state_t * ); +void CloseCpu ( usf_state_t * ); +int32_t DelaySlotEffectsCompare ( usf_state_t *, uint32_t PC, uint32_t Reg1, uint32_t Reg2 ); +int32_t DelaySlotEffectsJump ( usf_state_t *, uint32_t JumpPC); +void DoSomething ( usf_state_t * ); +void InPermLoop ( usf_state_t * ); +void InitiliazeCPUFlags ( usf_state_t * ); +void RefreshScreen ( usf_state_t * ); +void RunRsp ( usf_state_t * ); +void StartEmulation ( usf_state_t * ); +void TimerDone ( usf_state_t * ); +void RecompileTimerDone ( usf_state_t * ); + +#define NORMAL 0 +#define DO_DELAY_SLOT 1 +#define DO_END_DELAY_SLOT 2 +#define DELAY_SLOT 3 +#define END_DELAY_SLOT 4 +#define LIKELY_DELAY_SLOT 5 +#define JUMP 6 +#define DELAY_SLOT_DONE 7 +#define LIKELY_DELAY_SLOT_DONE 8 +#define END_BLOCK 9 + +enum SaveType { + Auto, + Eeprom_4K, + Eeprom_16K, + Sram, + FlashRam +}; + +void StartEmulationFromSave ( usf_state_t * state, void * savestate ); + +#endif diff --git a/Frameworks/lazyusf/lazyusf/cpu_hle.c b/Frameworks/lazyusf/lazyusf/cpu_hle.c new file mode 100644 index 000000000..6b04cedc5 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/cpu_hle.c @@ -0,0 +1,161 @@ +#include + +#include "usf.h" +#include "usf_internal.h" + +#include "cpu_hle.h" +#include "os.h" +#include "audiolib.h" + +// Nintendo 64 Standard (and non standard) library functions, for HLE + + +int numEntries = 0; + + + +_HLE_Entry entrys[] = { + {"__osEnqueueThread",0,20,{0x8C,0x98,0,0,0x8C,0xAF,0,4,0,0x80,0xC8,0x25,0x8F,0xE,0,4,1,0xCF,8,0x2A},0,0,__osEnqueueThread}, + + {"__osRestoreInt",0,28,{0x40,8,0x60,0 ,1,4,0x40,0x25,0x40,0x88,0x60,0,0,0,0,0,0,0,0,0,3,0xE0,0,8,0,0,0,0},0,0,__osRestoreInt}, + {"__osDisableInt",0,32,{0x40,8,0x60,0,0x24,1,0xFF,0xFE,1,1,0x48,0x24,0x40,0x89,0x60,0,0x31,2,0,1,0,0,0,0,3,0xE0,0,8,0,0,0,0},0,0,__osDisableInt}, +// {"osStartThread",0,32,{0x27,0xBD,0xFF,0xD8,0xAF,0xBF,0,0x1C,0xAF,0xA4,0,0x28,0xAF,0xB1,0,0x18,0xC,-1,-1,-1,0xAF,0xB0,0,0x14,0x8F,0xAE,0,0x28,0x24,1,0,1,0,0x40,0x80,0x25},0,0,osStartThread}, + //{"osPiStartDma",0,52,{0x27,0xBD,0xFF,0xD8,0x3C,0xE,-1,-1,0x8D,0xCE,-1,-1,0xAF,0xBF,0,0x1C,0xAF,0xA4,0,0x28,0xAF,0xA5,0,0x2C,0xAF,0xA6,0,0x30,0xAF,0xA7,0,0x34,0xAF,0xB1,0,0x18,0x15,0xC0,0,3,0xAF,0xB0,0,0x14,0x10,0,0,0x32,0x24,2,0xFF,0xFF},0,0,osPiStartDma} + //{"osRecvMesg",0,60,{0x27,0xBD,0xFF,0xD8,0xAF,0xBF,0,0x1C,0xAF,0xA4,0,0x28,0xAF,0xA5,0,0x2C,0xAF,0xA6,0,0x30,0xAF,0xB1,0,0x18,0xC,-1,-1,-1,0xAF,0xB0,0,0x14,0x8F,0xAE,0,0x28,0,0x40,0x80,0x25,0x8D,0xCF,0,8,0x15,0xE0,0,0x12,0,0,0,0,0x8f,0xb8,0,0x30,0x17,0,0,5},0,0,osRecvMesg}, + + {"saveThreadContext",0,32,{0x3C,5,-1,-1,0x8C,0xA5,-1,-1,0x40,8,0x60,0,0x8C,0xBB,0,0x18,0x35,8,0,2,0xAC,0xA8,1,0x18,0xFC,0xB0,0,0x98,0xFC,0xB1,0,0xA0},0,0,saveThreadContext}, + {"loadThreadContext",0,40,{0x3C,4,-1,-1,0xC,-1,-1,-1,0x24,0x84,-1,-1,0x3C,1,-1,-1,0xAC,0x22,-1,-1,0x24,8,0,4,0xA4,0x48,0,0x10,0,0x40,0xD0,0x25,0x3C,8,-1,-1,0x8F,0x5B,1,0x18},0,0,loadThreadContext}, + + + {"osSetIntMask",0,44,{0x40,0xC,0x60,0,0x31,0x82,0xFF,1,0x3C,8,-1,-1,0x25,8,-1,-1,0x8D,0xB,0,0,0x24,1,0xFF,0xFF,1,0x61,0x40,0x26,0x31,8,0xFF,0,0,0x48,0x10,0x25,0x3C,0xA,0xA4,0x30,0x8D,0x4A,0,0xC},0,0,osSetIntMask}, + {"osVirtualToPhysical",0,36,{0x27,0xBD,0xFF,0xE8,0xAF,0xA4,0,0x18,0x8F,0xAE,0,0x18,0x3C,1,0x80,0,0xAF,0xBF,0,0x14,1,0xC1,8,0x2B,0x14,0x20,0,7,0x3C,1,0xA0,0,1,0xC1,8,0x2B},0,0,osVirtualToPhysical}, + + + {"alCopy",0,32,{0,0x80,0x10,0x25,0,0xA0,0x18,0x25,0x18,0xC0,0,0x18,0,0,0x38,0x25,0x30,0xC5,0,3,0x10,0xA0,0,9,0,0xA0,0x20,0x25,0x90,0x4E,0,0},0,0,alCopy}, + {"alLink",0,28,{0x8C,0xAE,0,0,0xAC,0x85,0,4,0xAC,0x8E,0,0,0x8C,0xA2,0,0,0x10,0x40,0,2,0,0,0,0,0xAC,0x44,0,4},0,0,alLink}, + {"alUnlink",0,28,{0x8C,0x82,0,0,0x50,0x40,0,4,0x8C,0x82,0,4,0x8C,0x8E,0,4,0xAC,0x4E,0,4,0x8C,0x82,0,4,0x10,0x40,0,3},0,0,alUnLink}, + + {"osAiSetNextBuffer",0,32,{0x27,0xBD,0xFF,0xE0,0x3C,0xF,-1,-1,0x91,0xEF,-1,-1,0xAF,0xA4,0,0x20,0x8F,0xAE,0,0x20,0xAF,0xBF,0,0x14,0xAF,0xA5,0,0x24,0x11,0xE0,0,3},0,0,osAiSetNextBuffer}, + + {"alLink (DK64)",0,20,{0x8C,0xAE,0,0,0xAC,0x8E,0,0,0xAC,0x85,0,4,0x8C,0xAF,0,0,0x11,0xE0,0,3},0,0,alLink}, + {"alUnLink (DK64)",0,28,{0x8C,0x8E,0,0,0x11,0xC0,0,4,0,0,0,0,0x8C,0x8F,0,4,0x8C,0x98,0,0,0xAF,0xF,0,4,0x8C,0x99,0,4},0,0,alUnLink}, + + {"alEvtqPostEvent",0,64,{0x27,0xBD,0xFF,0xD0,0xAF,0xBF,0,0x14,0xAF,0xA4,0,0x30,0xAF,0xA5,0,0x34,0xAF,0xA0,0,0x20,0x24,4,0,1,0xC,-1,-1,-1,0xAF,0xA6,0,0x38,0x8F,0xAE,0,0x30,0x8F,0xA7,0,0x38,0,0x40,0x28,0x25,0x8D,0xC8,0,0,0x15,0,0,5,1,0,0x20,0x25,0xC,-1,-1,-1,0,0x40,0x20,0x25},0,0,alEvtqPostEvent}, + + {"alEvtqPostEvent (DK64)",0,64,{0x27,0xBD,0xFF,0xD0,0xAF,0xBF,0,0x14,0xAF,0xA4,0,0x30,0xAF,0xA5,0,0x34,0xAF,0xA6,0,0x38,0xAF,0xA0,0,0x20,0xC,-1,-1,-1,0x24,4,0,1,0xAF,0xA2,0,0x1C,0x8F,0xAE,0,0x30,0x8D,0xCF,0,0,0xAF,0xAF,0,0x2C,0x8F,0xB8,0,0x2C,0x17,0,0,5,0,0,0,0,0xC,-1,-1,-1,0x8F,0xA4,0,0x1C},0,0,alEvtqPostEvent}, + {"alEvtqPostEvent (CBFD)",0,56,{0x27,0xBD,0xFF,0xC0,0xAF,0xBF,0,0x14,0xAF,0xA4,0,0x40,0xAF,0xA5,0,0x44,0xAF,0xA6,0,0x48,0xAF,0xA7,0,0x4C,0xAF,0xA0,0,0x30,0x8F,0xAE,0,0x4C,0x31,0xCF,0,2,0x11,0xE0,0,4,0,0,0,0,0xC,-1,-1,-1,0x24,4,0,1,0xAF,0xA2,0,0x2C},0,0,alEvtqPostEvent}, + {"alEvtqPostEvent (BT)",0,60,{0x27,0xBD,0xFF,0xD0,0xAF,0xBF,0,0x14,0xAF,0xA4,0,0x30,0xAF,0xA5,0,0x34,0xAF,0xA6,0,0x38,0xAF,0xA7,0,0x3C,0xAF,0xA0,0,0x20,0xC,-1,-1,-1,0x24,4,0,1,0xAF,0xA2,0,0x1C,0x8F,0xAE,0,0x30,0x8D,0xCF,0,0,0xAF,0xAF,0,0x2C,0x8F,0xB8,0,0x2C,0x17,0,0,5},0,0,alEvtqPostEvent}, + + {"alAudioFrame",0,52,{0x27,0xBD,0xFF,0x48,0xAF,0xB1,0,0x30,0x3C,0x11,-1,-1,0x8E,0x31,0-1,-1,0xAF,0xBF,0,0x4C,0xAF,0xB7,0,0x48,0xAF,0xB6,0,0x44,0xAF,0xB5,0,0x40,0xAF,0xB4,0,0x3C,0xAF,0xB3,0,0x38,0xAF,0xB2,0,0x34,0xAF,0xB0,0,0x2C,0xF7,0xB6,0,0x20},0,0,alAudioFrame}, + + //{"alAudioFrame (DK64)",0,64,{0x27,0xBD,0xFF,0xC0,0xAF,0xBF,0,0x1C,0xAF,0xA4,0,0x40,0xAF,0xA5,0,0x44,0xAF,0xA6,0,0x48,0xAF,0xA7,0,0x4C,0xAF,0xB1,0,0x18,0xAF,0xB0,0,0x14,0xA7,0xA0,0,0x3A,0x8F,0xAE,0,0x40,0xAF,0xAE,0,0x34,0x8F,0xAF,0,0x48,0xAF,0xAF,0,0x28,0x3C,0x18,0x80,0x75,0x8F,0x18,0xC,0x74,0x8F,0x19,0,0},0,0,alAudioFrame}, + +}; +//int 0xA4,0xA6,0,0x38 + +//char foundlist[2048]; + +int sort_entrys(void * a, void * b) +{ + _HLE_Entry * _a = (_HLE_Entry *)a; + _HLE_Entry * _b = (_HLE_Entry *)b; + return _b->used - _a->used; +} + +int CPUHLE_Scan(usf_state_t * state) +{ + int i = 0, j = 0; + unsigned char c = 0; + long d = 0; + int entrySize = 0; + int entry = 0; + void * address = 0; + int good = 1; //, needcomma = 0; + _HLE_Entry * entries; + unsigned entries_used = 0; + + numEntries = sizeof(entrys) / sizeof(_HLE_Entry); + + entries = state->cpu_hle_entries = realloc( state->cpu_hle_entries, sizeof(entrys) ); + memcpy( entries, entrys, sizeof(entrys) ); + + //for(i=0; i < numEntries; i++) + // entries[i].used = 0; + + //memset(foundlist,0,2048); + + for(i=0; i < (state->RdramSize - 64); i+=4) { + + for(entry = 0; entry < numEntries; entry++) { + + if(entries[entry].used) + continue; + + good = 1; + entrySize = entries[entry].length; + + for(j=0; j < entrySize; j++) { + address = state->N64MEM + i + j; + //address = i; + c = *(unsigned char *)(address); + d = entries[entry].bytes[j^3]; + + if((c != d) && (d!=-1)) { + good = 0; + break; + } + } + + if(good == 1 && i< (state->RdramSize-64)) { + //char buf[256]; + //if(needcomma) { + // sprintf(buf,", %s", entries[entry].name); + //} else { + // sprintf(buf,"%s", entries[entry].name); + //} + + //needcomma = 1; + //strcat(foundlist,buf); + + entries[entry].used = 1; + entries[entry].phys = i; + ++entries_used; + break; + } + } + + } + + qsort(entries, numEntries, sizeof(*entries), sort_entrys); + state->cpu_hle_entry_count = entries_used; + + //printf("<--------------HLE Functions Found--------------->\n%s<------------------------------------------------>\n", foundlist); + //printf("HLE Functions found: %s\n", foundlist); + + return 0; +} + +int DoCPUHLE(usf_state_t * state, unsigned long loc) +{ + int i = 0; + uintptr_t real_addr = PageVRAM2(loc); + _HLE_Entry * entries = state->cpu_hle_entries; + unsigned numEntries = state->cpu_hle_entry_count; + + for(i = 0; i < numEntries; i++) { + + if(entries[i].phys == real_addr) { + //printf("CPU HLEing using %d at %08x (phys: %08x) \"%s\"\n", entries[i].name, loc, entries[i].phys, entries[i].name); + + if(entries[i].location(state, entries[i].phys)) { + // printf("done\n"); + return 1; + } + else + return 0; + } + + } + + return 0; +} diff --git a/Frameworks/lazyusf/lazyusf/cpu_hle.h b/Frameworks/lazyusf/lazyusf/cpu_hle.h new file mode 100644 index 000000000..a2a0d6355 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/cpu_hle.h @@ -0,0 +1,27 @@ +#ifndef _CPU_HLE_ +#define _CPU_HLE_ + +#include "usf.h" +#include "cpu.h" +#include "interpreter_ops.h" +#include "memory.h" + +typedef struct { + char *name; + int num; + int length; + long bytes[80]; + int used; + int phys; + int (*location)(usf_state_t *, int); +} _HLE_Entry; + +int CPUHLE_Scan(usf_state_t *); +int DoCPUHLE(usf_state_t *, unsigned long loc); +//////////////////////////////////////////////////////////////////// +// OS Thread Stuff +// found this stuff in daedalus + + + +#endif diff --git a/Frameworks/lazyusf/lazyusf/dma.c b/Frameworks/lazyusf/lazyusf/dma.c new file mode 100644 index 000000000..f5849625e --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/dma.c @@ -0,0 +1,180 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ + +#include + +#include "main.h" +#include "cpu.h" + +#include "usf.h" +#include "usf_internal.h" + +void PI_DMA_READ (usf_state_t * state) { + + PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; + MI_INTR_REG |= MI_INTR_PI; + CheckInterrupts(state); + return; +} + +void PI_DMA_WRITE (usf_state_t * state) { + uint32_t i; + PI_STATUS_REG |= PI_STATUS_DMA_BUSY; + if ( PI_DRAM_ADDR_REG + PI_WR_LEN_REG + 1 > state->RdramSize) { + PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; + MI_INTR_REG |= MI_INTR_PI; + CheckInterrupts(state); + return; + } + + if ( PI_CART_ADDR_REG >= 0x08000000 && PI_CART_ADDR_REG <= 0x08010000) { + return; + } + + if ( PI_CART_ADDR_REG >= 0x10000000 && PI_CART_ADDR_REG <= 0x1FBFFFFF) { + PI_CART_ADDR_REG -= 0x10000000; + for (i = 0; i < PI_WR_LEN_REG + 1; i ++) { + *(state->N64MEM+((PI_DRAM_ADDR_REG + i) ^ 3)) = *PageROM(state, (PI_CART_ADDR_REG + i) ^ 3); + } + PI_CART_ADDR_REG += 0x10000000; + + PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; + MI_INTR_REG |= MI_INTR_PI; + CheckInterrupts(state); + CheckTimer(state); + return; + } + + PI_STATUS_REG &= ~PI_STATUS_DMA_BUSY; + MI_INTR_REG |= MI_INTR_PI; + CheckInterrupts(state); +} + + +void SI_DMA_READ (usf_state_t * state) { + + if ((int32_t)SI_DRAM_ADDR_REG > (int32_t)state->RdramSize) { + return; + } + + PifRamRead(state); + SI_DRAM_ADDR_REG &= 0xFFFFFFF8; + if ((int32_t)SI_DRAM_ADDR_REG < 0) { + int32_t count, RdramPos; + + RdramPos = (int32_t)SI_DRAM_ADDR_REG; + for (count = 0; count < 0x40; count++, RdramPos++) { + if (RdramPos < 0) { continue; } + state->N64MEM[RdramPos ^3] = state->PIF_Ram[count]; + } + } else { + int32_t count, RdramPos; + + RdramPos = (uint32_t)SI_DRAM_ADDR_REG; + for (count = 0; count < 0x40; count++, RdramPos++) { + if (RdramPos < 0) { continue; } + state->N64MEM[RdramPos ^3] = state->PIF_Ram[count]; + } + } + + MI_INTR_REG |= MI_INTR_SI; + SI_STATUS_REG |= SI_STATUS_INTERRUPT; + CheckInterrupts(state); +} + + +void SI_DMA_WRITE (usf_state_t * state) { + + if ((int32_t)SI_DRAM_ADDR_REG > (int32_t)state->RdramSize) { + return; + } + + SI_DRAM_ADDR_REG &= 0xFFFFFFF8; + if ((int32_t)SI_DRAM_ADDR_REG < 0) { + int32_t count, RdramPos; + + RdramPos = (int32_t)SI_DRAM_ADDR_REG; + for (count = 0; count < 0x40; count++, RdramPos++) { + if (RdramPos < 0) { state->PIF_Ram[count] = 0; continue; } + state->PIF_Ram[count] = state->N64MEM[RdramPos ^3]; + } + } else { + int32_t count, RdramPos; + + RdramPos = (int32_t)SI_DRAM_ADDR_REG; + for (count = 0; count < 0x40; count++, RdramPos++) { + if (RdramPos < 0) { state->PIF_Ram[count] = 0; continue; } + state->PIF_Ram[count] = state->N64MEM[RdramPos ^3]; + } + } + + PifRamWrite(state); + + MI_INTR_REG |= MI_INTR_SI; + SI_STATUS_REG |= SI_STATUS_INTERRUPT; + CheckInterrupts(state); + +} + +void SP_DMA_READ (usf_state_t * state) { + SP_DRAM_ADDR_REG &= 0x1FFFFFFF; + + if (SP_DRAM_ADDR_REG > state->RdramSize) { + SP_DMA_BUSY_REG = 0; + SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY; + return; + } + + if (SP_RD_LEN_REG + 1 + (SP_MEM_ADDR_REG & 0xFFF) > 0x1000) { + return; + } + + memcpy( state->DMEM + (SP_MEM_ADDR_REG & 0x1FFF), state->N64MEM + SP_DRAM_ADDR_REG, + SP_RD_LEN_REG + 1 ); + + SP_DMA_BUSY_REG = 0; + SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY; + MI_INTR_REG &= ~MI_INTR_SP; + CheckInterrupts(state); + CheckTimer(state); +} + +void SP_DMA_WRITE (usf_state_t * state) { + if (SP_DRAM_ADDR_REG > state->RdramSize) { + return; + } + + if (SP_WR_LEN_REG + 1 + (SP_MEM_ADDR_REG & 0xFFF) > 0x1000) { + return; + } + + memcpy( state->N64MEM + SP_DRAM_ADDR_REG, state->DMEM + (SP_MEM_ADDR_REG & 0x1FFF), + SP_WR_LEN_REG + 1); + + SP_DMA_BUSY_REG = 0; + SP_STATUS_REG &= ~SP_STATUS_DMA_BUSY; +} + diff --git a/Frameworks/lazyusf/lazyusf/dma.h b/Frameworks/lazyusf/lazyusf/dma.h new file mode 100644 index 000000000..8d9adb223 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/dma.h @@ -0,0 +1,34 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +void PI_DMA_READ ( usf_state_t * ); +void PI_DMA_WRITE ( usf_state_t * ); +void SI_DMA_READ ( usf_state_t * ); +void SI_DMA_WRITE ( usf_state_t * ); +void SP_DMA_READ ( usf_state_t * ); +void SP_DMA_WRITE ( usf_state_t * ); + + + diff --git a/Frameworks/lazyusf/lazyusf/exception.c b/Frameworks/lazyusf/lazyusf/exception.c new file mode 100644 index 000000000..d44bfee4d --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/exception.c @@ -0,0 +1,158 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ + +#include "main.h" +#include "cpu.h" + +#include "usf_internal.h" + +void CheckInterrupts ( usf_state_t * state ) { + + MI_INTR_REG &= ~MI_INTR_AI; + MI_INTR_REG |= (state->AudioIntrReg & MI_INTR_AI); +#ifdef DEBUG_INFO + if (MI_INTR_REG) + fprintf(state->debug_log, "Interrupt %d - ", MI_INTR_REG); +#endif + if ((MI_INTR_MASK_REG & MI_INTR_REG) != 0) { +#ifdef DEBUG_INFO + fprintf(state->debug_log, "triggered\n"); +#endif + FAKE_CAUSE_REGISTER |= CAUSE_IP2; + } else { +#ifdef DEBUG_INFO + if (MI_INTR_REG) + fprintf(state->debug_log, "masked\n"); +#endif + FAKE_CAUSE_REGISTER &= ~CAUSE_IP2; + } + + if (( STATUS_REGISTER & STATUS_IE ) == 0 ) { return; } + if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { return; } + if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { return; } + + if (( STATUS_REGISTER & FAKE_CAUSE_REGISTER & 0xFF00) != 0) { + if (!state->CPU_Action->DoInterrupt) { + state->CPU_Action->DoSomething = 1; + state->CPU_Action->DoInterrupt = 1; + } + } +} + +void DoAddressError ( usf_state_t * state, uint32_t DelaySlot, uint32_t BadVaddr, uint32_t FromRead) { + if (FromRead) { + CAUSE_REGISTER = EXC_RADE; + } else { + CAUSE_REGISTER = EXC_WADE; + } + BAD_VADDR_REGISTER = BadVaddr; + if (DelaySlot) { + CAUSE_REGISTER |= CAUSE_BD; + EPC_REGISTER = state->PROGRAM_COUNTER - 4; + } else { + EPC_REGISTER = state->PROGRAM_COUNTER; + } + STATUS_REGISTER |= STATUS_EXL; + state->PROGRAM_COUNTER = 0x80000180; +} + +void DoBreakException ( usf_state_t * state, uint32_t DelaySlot) { + CAUSE_REGISTER = EXC_BREAK; + if (DelaySlot) { + CAUSE_REGISTER |= CAUSE_BD; + EPC_REGISTER = state->PROGRAM_COUNTER - 4; + } else { + EPC_REGISTER = state->PROGRAM_COUNTER; + } + STATUS_REGISTER |= STATUS_EXL; + state->PROGRAM_COUNTER = 0x80000180; +} + +void DoCopUnusableException ( usf_state_t * state, uint32_t DelaySlot, uint32_t Coprocessor ) { + CAUSE_REGISTER = EXC_CPU; + if (Coprocessor == 1) { CAUSE_REGISTER |= 0x10000000; } + if (DelaySlot) { + CAUSE_REGISTER |= CAUSE_BD; + EPC_REGISTER = state->PROGRAM_COUNTER - 4; + } else { + EPC_REGISTER = state->PROGRAM_COUNTER; + } + STATUS_REGISTER |= STATUS_EXL; + state->PROGRAM_COUNTER = 0x80000180; +} + +void DoIntrException ( usf_state_t * state, uint32_t DelaySlot ) { + + if (( STATUS_REGISTER & STATUS_IE ) == 0 ) { return; } + if (( STATUS_REGISTER & STATUS_EXL ) != 0 ) { return; } + if (( STATUS_REGISTER & STATUS_ERL ) != 0 ) { return; } + CAUSE_REGISTER = FAKE_CAUSE_REGISTER; + CAUSE_REGISTER |= EXC_INT; + EPC_REGISTER = state->PROGRAM_COUNTER; + if (DelaySlot) { + CAUSE_REGISTER |= CAUSE_BD; + EPC_REGISTER -= 4; + } + STATUS_REGISTER |= STATUS_EXL; + state->PROGRAM_COUNTER = 0x80000180; +} + +void DoTLBMiss ( usf_state_t * state, uint32_t DelaySlot, uint32_t BadVaddr ) { + + CAUSE_REGISTER = EXC_RMISS; + BAD_VADDR_REGISTER = BadVaddr; + CONTEXT_REGISTER &= 0xFF80000F; + CONTEXT_REGISTER |= (BadVaddr >> 9) & 0x007FFFF0; + ENTRYHI_REGISTER = (BadVaddr & 0xFFFFE000); + if ((STATUS_REGISTER & STATUS_EXL) == 0) { + if (DelaySlot) { + CAUSE_REGISTER |= CAUSE_BD; + EPC_REGISTER = state->PROGRAM_COUNTER - 4; + } else { + EPC_REGISTER = state->PROGRAM_COUNTER; + } + if (AddressDefined(state, BadVaddr)) { + state->PROGRAM_COUNTER = 0x80000180; + } else { + state->PROGRAM_COUNTER = 0x80000000; + } + STATUS_REGISTER |= STATUS_EXL; + } else { + state->PROGRAM_COUNTER = 0x80000180; + } +} + +void DoSysCallException ( usf_state_t * state, uint32_t DelaySlot) { + CAUSE_REGISTER = EXC_SYSCALL; + if (DelaySlot) { + CAUSE_REGISTER |= CAUSE_BD; + EPC_REGISTER = state->PROGRAM_COUNTER - 4; + } else { + EPC_REGISTER = state->PROGRAM_COUNTER; + } + STATUS_REGISTER |= STATUS_EXL; + state->PROGRAM_COUNTER = 0x80000180; +} diff --git a/Frameworks/lazyusf/lazyusf/exception.h b/Frameworks/lazyusf/lazyusf/exception.h new file mode 100644 index 000000000..7ee97d58e --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/exception.h @@ -0,0 +1,75 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#define EXC_CODE(x) ((x)<<2) +#define EXC_INT EXC_CODE(0) /* interrupt */ +#define EXC_MOD EXC_CODE(1) /* TLB mod */ +#define EXC_RMISS EXC_CODE(2) /* Read TLB Miss */ +#define EXC_WMISS EXC_CODE(3) /* Write TLB Miss */ +#define EXC_RADE EXC_CODE(4) /* Read Address Error */ +#define EXC_WADE EXC_CODE(5) /* Write Address Error */ +#define EXC_IBE EXC_CODE(6) /* Instruction Bus Error */ +#define EXC_DBE EXC_CODE(7) /* Data Bus Error */ +#define EXC_SYSCALL EXC_CODE(8) /* SYSCALL */ +#define EXC_BREAK EXC_CODE(9) /* BREAKpoint */ +#define EXC_II EXC_CODE(10)/* Illegal Instruction */ +#define EXC_CPU EXC_CODE(11)/* CoProcessor Unusable */ +#define EXC_OV EXC_CODE(12)/* OVerflow */ +#define EXC_TRAP EXC_CODE(13)/* Trap exception */ +#define EXC_VCEI EXC_CODE(14)/* Virt. Coherency on Inst. fetch */ +#define EXC_FPE EXC_CODE(15)/* Floating Point Exception */ +#define EXC_WATCH EXC_CODE(23)/* Watchpoint reference */ +#define EXC_VCED EXC_CODE(31)/* Virt. Coherency on data read */ + +#define Exception_Name(Except)\ + (Except) == EXC_INT ? "interrupt" :\ + (Except) == EXC_MOD ? "TLB mod" :\ + (Except) == EXC_RMISS ? "Read TLB Miss" :\ + (Except) == EXC_WMISS ? "Write TLB Miss" :\ + (Except) == EXC_RADE ? "Read Address Error" :\ + (Except) == EXC_WADE ? "Write Address Error" :\ + (Except) == EXC_IBE ? "Instruction Bus Error" :\ + (Except) == EXC_DBE ? "Data Bus Error" :\ + (Except) == EXC_SYSCALL ? "SYSCALL" :\ + (Except) == EXC_BREAK ? "Break" :\ + (Except) == EXC_II ? "Illegal Instruction" :\ + (Except) == EXC_CPU ? "CoProcessor Unusable" :\ + (Except) == EXC_OV ? "OVerflow" :\ + (Except) == EXC_TRAP ? "Trap exception" :\ + (Except) == EXC_VCEI ? "Virt. Coherency on Inst. fetch" :\ + (Except) == EXC_FPE ? "Floating Point Exception" :\ + (Except) == EXC_WATCH ? "Watchpoint reference" :\ + (Except) == EXC_VCED ? "Virt. Coherency on data read" :\ + "Unkown" + +void AiCheckInterrupts ( usf_state_t * ); +void CheckInterrupts ( usf_state_t * ); +void DoAddressError ( usf_state_t *, uint32_t DelaySlot, uint32_t BadVaddr, uint32_t FromRead ); +void DoBreakException ( usf_state_t *, uint32_t DelaySlot ); +void DoCopUnusableException ( usf_state_t *, uint32_t DelaySlot, uint32_t Coprocessor ); +void DoIntrException ( usf_state_t *, uint32_t DelaySlot ); +void DoTLBMiss ( usf_state_t *, uint32_t DelaySlot, uint32_t BadVaddr ); +void DoSysCallException ( usf_state_t *, uint32_t DelaySlot); + diff --git a/Frameworks/lazyusf/lazyusf/interpreter_cpu.c b/Frameworks/lazyusf/lazyusf/interpreter_cpu.c new file mode 100644 index 000000000..75b2f73f9 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/interpreter_cpu.c @@ -0,0 +1,799 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#include +#include "main.h" +#include "cpu.h" +#include "usf.h" +#include "memory.h" +#include "cpu_hle.h" + +#include "usf_internal.h" + +#include + +void (* R4300i_Opcode[64])(usf_state_t *); +void (* R4300i_Special[64])(usf_state_t *); +void (* R4300i_Regimm[32])(usf_state_t *); +void (* R4300i_CoP0[32])(usf_state_t *); +void (* R4300i_CoP0_Function[64])(usf_state_t *); +void (* R4300i_CoP1[32])(usf_state_t *); +void (* R4300i_CoP1_BC[32])(usf_state_t *); +void (* R4300i_CoP1_S[64])(usf_state_t *); +void (* R4300i_CoP1_D[64])(usf_state_t *); +void (* R4300i_CoP1_W[64])(usf_state_t *); +void (* R4300i_CoP1_L[64])(usf_state_t *); + +void R4300i_opcode_SPECIAL (usf_state_t * state) { + R4300i_Special[ state->Opcode.u.e.funct ](state); +} + +void R4300i_opcode_REGIMM (usf_state_t * state) { + R4300i_Regimm[ state->Opcode.u.b.rt ](state); +} + +void R4300i_opcode_COP0 (usf_state_t * state) { + R4300i_CoP0[ state->Opcode.u.b.rs ](state); +} + +void R4300i_opcode_COP0_CO (usf_state_t * state) { + R4300i_CoP0_Function[ state->Opcode.u.e.funct ](state); +} + +void R4300i_opcode_COP1 (usf_state_t * state) { + R4300i_CoP1[ state->Opcode.u.f.fmt ](state); +} + +void R4300i_opcode_COP1_BC (usf_state_t * state) { + R4300i_CoP1_BC[ state->Opcode.u.f.ft ](state); +} + +void R4300i_opcode_COP1_S (usf_state_t * state) { + // controlfp(RoundingModel); + R4300i_CoP1_S[ state->Opcode.u.e.funct ](state); +} + +void R4300i_opcode_COP1_D (usf_state_t * state) { + // controlfp(RoundingModel); + R4300i_CoP1_D[ state->Opcode.u.e.funct ](state); +} + +void R4300i_opcode_COP1_W (usf_state_t * state) { + R4300i_CoP1_W[ state->Opcode.u.e.funct ](state); +} + +void R4300i_opcode_COP1_L (usf_state_t * state) { + R4300i_CoP1_L[ state->Opcode.u.e.funct ](state); +} + + +void BuildInterpreter (usf_state_t * state) { + (void)state; + R4300i_Opcode[ 0] = R4300i_opcode_SPECIAL; + R4300i_Opcode[ 1] = R4300i_opcode_REGIMM; + R4300i_Opcode[ 2] = r4300i_J; + R4300i_Opcode[ 3] = r4300i_JAL; + R4300i_Opcode[ 4] = r4300i_BEQ; + R4300i_Opcode[ 5] = r4300i_BNE; + R4300i_Opcode[ 6] = r4300i_BLEZ; + R4300i_Opcode[ 7] = r4300i_BGTZ; + R4300i_Opcode[ 8] = r4300i_ADDI; + R4300i_Opcode[ 9] = r4300i_ADDIU; + R4300i_Opcode[10] = r4300i_SLTI; + R4300i_Opcode[11] = r4300i_SLTIU; + R4300i_Opcode[12] = r4300i_ANDI; + R4300i_Opcode[13] = r4300i_ORI; + R4300i_Opcode[14] = r4300i_XORI; + R4300i_Opcode[15] = r4300i_LUI; + R4300i_Opcode[16] = R4300i_opcode_COP0; + R4300i_Opcode[17] = R4300i_opcode_COP1; + R4300i_Opcode[18] = R4300i_UnknownOpcode; + R4300i_Opcode[19] = R4300i_UnknownOpcode; + R4300i_Opcode[20] = r4300i_BEQL; + R4300i_Opcode[21] = r4300i_BNEL; + R4300i_Opcode[22] = r4300i_BLEZL; + R4300i_Opcode[23] = r4300i_BGTZL; + R4300i_Opcode[24] = R4300i_UnknownOpcode; + R4300i_Opcode[25] = r4300i_DADDIU; + R4300i_Opcode[26] = r4300i_LDL; + R4300i_Opcode[27] = r4300i_LDR; + R4300i_Opcode[28] = R4300i_UnknownOpcode; + R4300i_Opcode[29] = R4300i_UnknownOpcode; + R4300i_Opcode[30] = R4300i_UnknownOpcode; + R4300i_Opcode[31] = R4300i_UnknownOpcode; + R4300i_Opcode[32] = r4300i_LB; + R4300i_Opcode[33] = r4300i_LH; + R4300i_Opcode[34] = r4300i_LWL; + R4300i_Opcode[35] = r4300i_LW; + R4300i_Opcode[36] = r4300i_LBU; + R4300i_Opcode[37] = r4300i_LHU; + R4300i_Opcode[38] = r4300i_LWR; + R4300i_Opcode[39] = r4300i_LWU; + R4300i_Opcode[40] = r4300i_SB; + R4300i_Opcode[41] = r4300i_SH; + R4300i_Opcode[42] = r4300i_SWL; + R4300i_Opcode[43] = r4300i_SW; + R4300i_Opcode[44] = r4300i_SDL; + R4300i_Opcode[45] = r4300i_SDR; + R4300i_Opcode[46] = r4300i_SWR; + R4300i_Opcode[47] = r4300i_CACHE; + R4300i_Opcode[48] = r4300i_LL; + R4300i_Opcode[49] = r4300i_LWC1; + R4300i_Opcode[50] = R4300i_UnknownOpcode; + R4300i_Opcode[51] = R4300i_UnknownOpcode; + R4300i_Opcode[52] = R4300i_UnknownOpcode; + R4300i_Opcode[53] = r4300i_LDC1; + R4300i_Opcode[54] = R4300i_UnknownOpcode; + R4300i_Opcode[55] = r4300i_LD; + R4300i_Opcode[56] = r4300i_SC; + R4300i_Opcode[57] = r4300i_SWC1; + R4300i_Opcode[58] = R4300i_UnknownOpcode; + R4300i_Opcode[59] = R4300i_UnknownOpcode; + R4300i_Opcode[60] = R4300i_UnknownOpcode; + R4300i_Opcode[61] = r4300i_SDC1; + R4300i_Opcode[62] = R4300i_UnknownOpcode; + R4300i_Opcode[63] = r4300i_SD; + + R4300i_Special[ 0] = r4300i_SPECIAL_SLL; + R4300i_Special[ 1] = R4300i_UnknownOpcode; + R4300i_Special[ 2] = r4300i_SPECIAL_SRL; + R4300i_Special[ 3] = r4300i_SPECIAL_SRA; + R4300i_Special[ 4] = r4300i_SPECIAL_SLLV; + R4300i_Special[ 5] = R4300i_UnknownOpcode; + R4300i_Special[ 6] = r4300i_SPECIAL_SRLV; + R4300i_Special[ 7] = r4300i_SPECIAL_SRAV; + R4300i_Special[ 8] = r4300i_SPECIAL_JR; + R4300i_Special[ 9] = r4300i_SPECIAL_JALR; + R4300i_Special[10] = R4300i_UnknownOpcode; + R4300i_Special[11] = R4300i_UnknownOpcode; + R4300i_Special[12] = r4300i_SPECIAL_SYSCALL; + R4300i_Special[13] = r4300i_SPECIAL_BREAK; + R4300i_Special[14] = R4300i_UnknownOpcode; + R4300i_Special[15] = r4300i_SPECIAL_SYNC; + R4300i_Special[16] = r4300i_SPECIAL_MFHI; + R4300i_Special[17] = r4300i_SPECIAL_MTHI; + R4300i_Special[18] = r4300i_SPECIAL_MFLO; + R4300i_Special[19] = r4300i_SPECIAL_MTLO; + R4300i_Special[20] = r4300i_SPECIAL_DSLLV; + R4300i_Special[21] = R4300i_UnknownOpcode; + R4300i_Special[22] = r4300i_SPECIAL_DSRLV; + R4300i_Special[23] = r4300i_SPECIAL_DSRAV; + R4300i_Special[24] = r4300i_SPECIAL_MULT; + R4300i_Special[25] = r4300i_SPECIAL_MULTU; + R4300i_Special[26] = r4300i_SPECIAL_DIV; + R4300i_Special[27] = r4300i_SPECIAL_DIVU; + R4300i_Special[28] = r4300i_SPECIAL_DMULT; + R4300i_Special[29] = r4300i_SPECIAL_DMULTU; + R4300i_Special[30] = r4300i_SPECIAL_DDIV; + R4300i_Special[31] = r4300i_SPECIAL_DDIVU; + R4300i_Special[32] = r4300i_SPECIAL_ADD; + R4300i_Special[33] = r4300i_SPECIAL_ADDU; + R4300i_Special[34] = r4300i_SPECIAL_SUB; + R4300i_Special[35] = r4300i_SPECIAL_SUBU; + R4300i_Special[36] = r4300i_SPECIAL_AND; + R4300i_Special[37] = r4300i_SPECIAL_OR; + R4300i_Special[38] = r4300i_SPECIAL_XOR; + R4300i_Special[39] = r4300i_SPECIAL_NOR; + R4300i_Special[40] = R4300i_UnknownOpcode; + R4300i_Special[41] = R4300i_UnknownOpcode; + R4300i_Special[42] = r4300i_SPECIAL_SLT; + R4300i_Special[43] = r4300i_SPECIAL_SLTU; + R4300i_Special[44] = r4300i_SPECIAL_DADD; + R4300i_Special[45] = r4300i_SPECIAL_DADDU; + R4300i_Special[46] = r4300i_SPECIAL_DSUB; + R4300i_Special[47] = r4300i_SPECIAL_DSUBU; + R4300i_Special[48] = R4300i_UnknownOpcode; + R4300i_Special[49] = R4300i_UnknownOpcode; + R4300i_Special[50] = R4300i_UnknownOpcode; + R4300i_Special[51] = R4300i_UnknownOpcode; + R4300i_Special[52] = r4300i_SPECIAL_TEQ; + R4300i_Special[53] = R4300i_UnknownOpcode; + R4300i_Special[54] = R4300i_UnknownOpcode; + R4300i_Special[55] = R4300i_UnknownOpcode; + R4300i_Special[56] = r4300i_SPECIAL_DSLL; + R4300i_Special[57] = R4300i_UnknownOpcode; + R4300i_Special[58] = r4300i_SPECIAL_DSRL; + R4300i_Special[59] = r4300i_SPECIAL_DSRA; + R4300i_Special[60] = r4300i_SPECIAL_DSLL32; + R4300i_Special[61] = R4300i_UnknownOpcode; + R4300i_Special[62] = r4300i_SPECIAL_DSRL32; + R4300i_Special[63] = r4300i_SPECIAL_DSRA32; + + R4300i_Regimm[ 0] = r4300i_REGIMM_BLTZ; + R4300i_Regimm[ 1] = r4300i_REGIMM_BGEZ; + R4300i_Regimm[ 2] = r4300i_REGIMM_BLTZL; + R4300i_Regimm[ 3] = r4300i_REGIMM_BGEZL; + R4300i_Regimm[ 4] = R4300i_UnknownOpcode; + R4300i_Regimm[ 5] = R4300i_UnknownOpcode; + R4300i_Regimm[ 6] = R4300i_UnknownOpcode; + R4300i_Regimm[ 7] = R4300i_UnknownOpcode; + R4300i_Regimm[ 8] = R4300i_UnknownOpcode; + R4300i_Regimm[ 9] = R4300i_UnknownOpcode; + R4300i_Regimm[10] = R4300i_UnknownOpcode; + R4300i_Regimm[11] = R4300i_UnknownOpcode; + R4300i_Regimm[12] = R4300i_UnknownOpcode; + R4300i_Regimm[13] = R4300i_UnknownOpcode; + R4300i_Regimm[14] = R4300i_UnknownOpcode; + R4300i_Regimm[15] = R4300i_UnknownOpcode; + R4300i_Regimm[16] = r4300i_REGIMM_BLTZAL; + R4300i_Regimm[17] = r4300i_REGIMM_BGEZAL; + R4300i_Regimm[18] = R4300i_UnknownOpcode; + R4300i_Regimm[19] = R4300i_UnknownOpcode; + R4300i_Regimm[20] = R4300i_UnknownOpcode; + R4300i_Regimm[21] = R4300i_UnknownOpcode; + R4300i_Regimm[22] = R4300i_UnknownOpcode; + R4300i_Regimm[23] = R4300i_UnknownOpcode; + R4300i_Regimm[24] = R4300i_UnknownOpcode; + R4300i_Regimm[25] = R4300i_UnknownOpcode; + R4300i_Regimm[26] = R4300i_UnknownOpcode; + R4300i_Regimm[27] = R4300i_UnknownOpcode; + R4300i_Regimm[28] = R4300i_UnknownOpcode; + R4300i_Regimm[29] = R4300i_UnknownOpcode; + R4300i_Regimm[30] = R4300i_UnknownOpcode; + R4300i_Regimm[31] = R4300i_UnknownOpcode; + + R4300i_CoP0[ 0] = r4300i_COP0_MF; + R4300i_CoP0[ 1] = R4300i_UnknownOpcode; + R4300i_CoP0[ 2] = R4300i_UnknownOpcode; + R4300i_CoP0[ 3] = R4300i_UnknownOpcode; + R4300i_CoP0[ 4] = r4300i_COP0_MT; + R4300i_CoP0[ 5] = R4300i_UnknownOpcode; + R4300i_CoP0[ 6] = R4300i_UnknownOpcode; + R4300i_CoP0[ 7] = R4300i_UnknownOpcode; + R4300i_CoP0[ 8] = R4300i_UnknownOpcode; + R4300i_CoP0[ 9] = R4300i_UnknownOpcode; + R4300i_CoP0[10] = R4300i_UnknownOpcode; + R4300i_CoP0[11] = R4300i_UnknownOpcode; + R4300i_CoP0[12] = R4300i_UnknownOpcode; + R4300i_CoP0[13] = R4300i_UnknownOpcode; + R4300i_CoP0[14] = R4300i_UnknownOpcode; + R4300i_CoP0[15] = R4300i_UnknownOpcode; + R4300i_CoP0[16] = R4300i_opcode_COP0_CO; + R4300i_CoP0[17] = R4300i_opcode_COP0_CO; + R4300i_CoP0[18] = R4300i_opcode_COP0_CO; + R4300i_CoP0[19] = R4300i_opcode_COP0_CO; + R4300i_CoP0[20] = R4300i_opcode_COP0_CO; + R4300i_CoP0[21] = R4300i_opcode_COP0_CO; + R4300i_CoP0[22] = R4300i_opcode_COP0_CO; + R4300i_CoP0[23] = R4300i_opcode_COP0_CO; + R4300i_CoP0[24] = R4300i_opcode_COP0_CO; + R4300i_CoP0[25] = R4300i_opcode_COP0_CO; + R4300i_CoP0[26] = R4300i_opcode_COP0_CO; + R4300i_CoP0[27] = R4300i_opcode_COP0_CO; + R4300i_CoP0[28] = R4300i_opcode_COP0_CO; + R4300i_CoP0[29] = R4300i_opcode_COP0_CO; + R4300i_CoP0[30] = R4300i_opcode_COP0_CO; + R4300i_CoP0[31] = R4300i_opcode_COP0_CO; + + R4300i_CoP0_Function[ 0] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[ 1] = r4300i_COP0_CO_TLBR; + R4300i_CoP0_Function[ 2] = r4300i_COP0_CO_TLBWI; + R4300i_CoP0_Function[ 3] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[ 4] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[ 5] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[ 6] = r4300i_COP0_CO_TLBWR; + R4300i_CoP0_Function[ 7] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[ 8] = r4300i_COP0_CO_TLBP; + R4300i_CoP0_Function[ 9] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[10] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[11] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[12] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[13] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[14] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[15] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[16] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[17] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[18] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[19] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[20] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[21] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[22] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[23] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[24] = r4300i_COP0_CO_ERET; + R4300i_CoP0_Function[25] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[26] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[27] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[28] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[29] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[30] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[31] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[32] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[33] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[34] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[35] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[36] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[37] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[38] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[39] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[40] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[41] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[42] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[43] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[44] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[45] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[46] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[47] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[48] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[49] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[50] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[51] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[52] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[53] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[54] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[55] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[56] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[57] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[58] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[59] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[60] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[61] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[62] = R4300i_UnknownOpcode; + R4300i_CoP0_Function[63] = R4300i_UnknownOpcode; + + R4300i_CoP1[ 0] = r4300i_COP1_MF; + R4300i_CoP1[ 1] = r4300i_COP1_DMF; + R4300i_CoP1[ 2] = r4300i_COP1_CF; + R4300i_CoP1[ 3] = R4300i_UnknownOpcode; + R4300i_CoP1[ 4] = r4300i_COP1_MT; + R4300i_CoP1[ 5] = r4300i_COP1_DMT; + R4300i_CoP1[ 6] = r4300i_COP1_CT; + R4300i_CoP1[ 7] = R4300i_UnknownOpcode; + R4300i_CoP1[ 8] = R4300i_opcode_COP1_BC; + R4300i_CoP1[ 9] = R4300i_UnknownOpcode; + R4300i_CoP1[10] = R4300i_UnknownOpcode; + R4300i_CoP1[11] = R4300i_UnknownOpcode; + R4300i_CoP1[12] = R4300i_UnknownOpcode; + R4300i_CoP1[13] = R4300i_UnknownOpcode; + R4300i_CoP1[14] = R4300i_UnknownOpcode; + R4300i_CoP1[15] = R4300i_UnknownOpcode; + R4300i_CoP1[16] = R4300i_opcode_COP1_S; + R4300i_CoP1[17] = R4300i_opcode_COP1_D; + R4300i_CoP1[18] = R4300i_UnknownOpcode; + R4300i_CoP1[19] = R4300i_UnknownOpcode; + R4300i_CoP1[20] = R4300i_opcode_COP1_W; + R4300i_CoP1[21] = R4300i_opcode_COP1_L; + R4300i_CoP1[22] = R4300i_UnknownOpcode; + R4300i_CoP1[23] = R4300i_UnknownOpcode; + R4300i_CoP1[24] = R4300i_UnknownOpcode; + R4300i_CoP1[25] = R4300i_UnknownOpcode; + R4300i_CoP1[26] = R4300i_UnknownOpcode; + R4300i_CoP1[27] = R4300i_UnknownOpcode; + R4300i_CoP1[28] = R4300i_UnknownOpcode; + R4300i_CoP1[29] = R4300i_UnknownOpcode; + R4300i_CoP1[30] = R4300i_UnknownOpcode; + R4300i_CoP1[31] = R4300i_UnknownOpcode; + + R4300i_CoP1_BC[ 0] = r4300i_COP1_BCF; + R4300i_CoP1_BC[ 1] = r4300i_COP1_BCT; + R4300i_CoP1_BC[ 2] = r4300i_COP1_BCFL; + R4300i_CoP1_BC[ 3] = r4300i_COP1_BCTL; + R4300i_CoP1_BC[ 4] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[ 5] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[ 6] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[ 7] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[ 8] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[ 9] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[10] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[11] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[12] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[13] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[14] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[15] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[16] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[17] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[18] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[19] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[20] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[21] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[22] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[23] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[24] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[25] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[26] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[27] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[28] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[29] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[30] = R4300i_UnknownOpcode; + R4300i_CoP1_BC[31] = R4300i_UnknownOpcode; + + R4300i_CoP1_S[ 0] = r4300i_COP1_S_ADD; + R4300i_CoP1_S[ 1] = r4300i_COP1_S_SUB; + R4300i_CoP1_S[ 2] = r4300i_COP1_S_MUL; + R4300i_CoP1_S[ 3] = r4300i_COP1_S_DIV; + R4300i_CoP1_S[ 4] = r4300i_COP1_S_SQRT; + R4300i_CoP1_S[ 5] = r4300i_COP1_S_ABS; + R4300i_CoP1_S[ 6] = r4300i_COP1_S_MOV; + R4300i_CoP1_S[ 7] = r4300i_COP1_S_NEG; + R4300i_CoP1_S[ 8] = R4300i_UnknownOpcode; + R4300i_CoP1_S[ 9] = r4300i_COP1_S_TRUNC_L; + R4300i_CoP1_S[10] = r4300i_COP1_S_CEIL_L; //added by Witten + R4300i_CoP1_S[11] = r4300i_COP1_S_FLOOR_L; //added by Witten + R4300i_CoP1_S[12] = r4300i_COP1_S_ROUND_W; + R4300i_CoP1_S[13] = r4300i_COP1_S_TRUNC_W; + R4300i_CoP1_S[14] = r4300i_COP1_S_CEIL_W; //added by Witten + R4300i_CoP1_S[15] = r4300i_COP1_S_FLOOR_W; + R4300i_CoP1_S[16] = R4300i_UnknownOpcode; + R4300i_CoP1_S[17] = R4300i_UnknownOpcode; + R4300i_CoP1_S[18] = R4300i_UnknownOpcode; + R4300i_CoP1_S[19] = R4300i_UnknownOpcode; + R4300i_CoP1_S[20] = R4300i_UnknownOpcode; + R4300i_CoP1_S[21] = R4300i_UnknownOpcode; + R4300i_CoP1_S[22] = R4300i_UnknownOpcode; + R4300i_CoP1_S[23] = R4300i_UnknownOpcode; + R4300i_CoP1_S[24] = R4300i_UnknownOpcode; + R4300i_CoP1_S[25] = R4300i_UnknownOpcode; + R4300i_CoP1_S[26] = R4300i_UnknownOpcode; + R4300i_CoP1_S[27] = R4300i_UnknownOpcode; + R4300i_CoP1_S[28] = R4300i_UnknownOpcode; + R4300i_CoP1_S[29] = R4300i_UnknownOpcode; + R4300i_CoP1_S[30] = R4300i_UnknownOpcode; + R4300i_CoP1_S[31] = R4300i_UnknownOpcode; + R4300i_CoP1_S[32] = R4300i_UnknownOpcode; + R4300i_CoP1_S[33] = r4300i_COP1_S_CVT_D; + R4300i_CoP1_S[34] = R4300i_UnknownOpcode; + R4300i_CoP1_S[35] = R4300i_UnknownOpcode; + R4300i_CoP1_S[36] = r4300i_COP1_S_CVT_W; + R4300i_CoP1_S[37] = r4300i_COP1_S_CVT_L; + R4300i_CoP1_S[38] = R4300i_UnknownOpcode; + R4300i_CoP1_S[39] = R4300i_UnknownOpcode; + R4300i_CoP1_S[40] = R4300i_UnknownOpcode; + R4300i_CoP1_S[41] = R4300i_UnknownOpcode; + R4300i_CoP1_S[42] = R4300i_UnknownOpcode; + R4300i_CoP1_S[43] = R4300i_UnknownOpcode; + R4300i_CoP1_S[44] = R4300i_UnknownOpcode; + R4300i_CoP1_S[45] = R4300i_UnknownOpcode; + R4300i_CoP1_S[46] = R4300i_UnknownOpcode; + R4300i_CoP1_S[47] = R4300i_UnknownOpcode; + R4300i_CoP1_S[48] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[49] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[50] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[51] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[52] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[53] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[54] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[55] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[56] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[57] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[58] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[59] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[60] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[61] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[62] = r4300i_COP1_S_CMP; + R4300i_CoP1_S[63] = r4300i_COP1_S_CMP; + + R4300i_CoP1_D[ 0] = r4300i_COP1_D_ADD; + R4300i_CoP1_D[ 1] = r4300i_COP1_D_SUB; + R4300i_CoP1_D[ 2] = r4300i_COP1_D_MUL; + R4300i_CoP1_D[ 3] = r4300i_COP1_D_DIV; + R4300i_CoP1_D[ 4] = r4300i_COP1_D_SQRT; + R4300i_CoP1_D[ 5] = r4300i_COP1_D_ABS; + R4300i_CoP1_D[ 6] = r4300i_COP1_D_MOV; + R4300i_CoP1_D[ 7] = r4300i_COP1_D_NEG; + R4300i_CoP1_D[ 8] = R4300i_UnknownOpcode; + R4300i_CoP1_D[ 9] = r4300i_COP1_D_TRUNC_L; //added by Witten + R4300i_CoP1_D[10] = r4300i_COP1_D_CEIL_L; //added by Witten + R4300i_CoP1_D[11] = r4300i_COP1_D_FLOOR_L; //added by Witten + R4300i_CoP1_D[12] = r4300i_COP1_D_ROUND_W; + R4300i_CoP1_D[13] = r4300i_COP1_D_TRUNC_W; + R4300i_CoP1_D[14] = r4300i_COP1_D_CEIL_W; //added by Witten + R4300i_CoP1_D[15] = r4300i_COP1_D_FLOOR_W; //added by Witten + R4300i_CoP1_D[16] = R4300i_UnknownOpcode; + R4300i_CoP1_D[17] = R4300i_UnknownOpcode; + R4300i_CoP1_D[18] = R4300i_UnknownOpcode; + R4300i_CoP1_D[19] = R4300i_UnknownOpcode; + R4300i_CoP1_D[20] = R4300i_UnknownOpcode; + R4300i_CoP1_D[21] = R4300i_UnknownOpcode; + R4300i_CoP1_D[22] = R4300i_UnknownOpcode; + R4300i_CoP1_D[23] = R4300i_UnknownOpcode; + R4300i_CoP1_D[24] = R4300i_UnknownOpcode; + R4300i_CoP1_D[25] = R4300i_UnknownOpcode; + R4300i_CoP1_D[26] = R4300i_UnknownOpcode; + R4300i_CoP1_D[27] = R4300i_UnknownOpcode; + R4300i_CoP1_D[28] = R4300i_UnknownOpcode; + R4300i_CoP1_D[29] = R4300i_UnknownOpcode; + R4300i_CoP1_D[30] = R4300i_UnknownOpcode; + R4300i_CoP1_D[31] = R4300i_UnknownOpcode; + R4300i_CoP1_D[32] = r4300i_COP1_D_CVT_S; + R4300i_CoP1_D[33] = R4300i_UnknownOpcode; + R4300i_CoP1_D[34] = R4300i_UnknownOpcode; + R4300i_CoP1_D[35] = R4300i_UnknownOpcode; + R4300i_CoP1_D[36] = r4300i_COP1_D_CVT_W; + R4300i_CoP1_D[37] = r4300i_COP1_D_CVT_L; + R4300i_CoP1_D[38] = R4300i_UnknownOpcode; + R4300i_CoP1_D[39] = R4300i_UnknownOpcode; + R4300i_CoP1_D[40] = R4300i_UnknownOpcode; + R4300i_CoP1_D[41] = R4300i_UnknownOpcode; + R4300i_CoP1_D[42] = R4300i_UnknownOpcode; + R4300i_CoP1_D[43] = R4300i_UnknownOpcode; + R4300i_CoP1_D[44] = R4300i_UnknownOpcode; + R4300i_CoP1_D[45] = R4300i_UnknownOpcode; + R4300i_CoP1_D[46] = R4300i_UnknownOpcode; + R4300i_CoP1_D[47] = R4300i_UnknownOpcode; + R4300i_CoP1_D[48] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[49] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[50] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[51] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[52] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[53] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[54] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[55] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[56] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[57] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[58] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[59] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[60] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[61] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[62] = r4300i_COP1_D_CMP; + R4300i_CoP1_D[63] = r4300i_COP1_D_CMP; + + R4300i_CoP1_W[ 0] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 1] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 2] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 3] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 4] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 5] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 6] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 7] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 8] = R4300i_UnknownOpcode; + R4300i_CoP1_W[ 9] = R4300i_UnknownOpcode; + R4300i_CoP1_W[10] = R4300i_UnknownOpcode; + R4300i_CoP1_W[11] = R4300i_UnknownOpcode; + R4300i_CoP1_W[12] = R4300i_UnknownOpcode; + R4300i_CoP1_W[13] = R4300i_UnknownOpcode; + R4300i_CoP1_W[14] = R4300i_UnknownOpcode; + R4300i_CoP1_W[15] = R4300i_UnknownOpcode; + R4300i_CoP1_W[16] = R4300i_UnknownOpcode; + R4300i_CoP1_W[17] = R4300i_UnknownOpcode; + R4300i_CoP1_W[18] = R4300i_UnknownOpcode; + R4300i_CoP1_W[19] = R4300i_UnknownOpcode; + R4300i_CoP1_W[20] = R4300i_UnknownOpcode; + R4300i_CoP1_W[21] = R4300i_UnknownOpcode; + R4300i_CoP1_W[22] = R4300i_UnknownOpcode; + R4300i_CoP1_W[23] = R4300i_UnknownOpcode; + R4300i_CoP1_W[24] = R4300i_UnknownOpcode; + R4300i_CoP1_W[25] = R4300i_UnknownOpcode; + R4300i_CoP1_W[26] = R4300i_UnknownOpcode; + R4300i_CoP1_W[27] = R4300i_UnknownOpcode; + R4300i_CoP1_W[28] = R4300i_UnknownOpcode; + R4300i_CoP1_W[29] = R4300i_UnknownOpcode; + R4300i_CoP1_W[30] = R4300i_UnknownOpcode; + R4300i_CoP1_W[31] = R4300i_UnknownOpcode; + R4300i_CoP1_W[32] = r4300i_COP1_W_CVT_S; + R4300i_CoP1_W[33] = r4300i_COP1_W_CVT_D; + R4300i_CoP1_W[34] = R4300i_UnknownOpcode; + R4300i_CoP1_W[35] = R4300i_UnknownOpcode; + R4300i_CoP1_W[36] = R4300i_UnknownOpcode; + R4300i_CoP1_W[37] = R4300i_UnknownOpcode; + R4300i_CoP1_W[38] = R4300i_UnknownOpcode; + R4300i_CoP1_W[39] = R4300i_UnknownOpcode; + R4300i_CoP1_W[40] = R4300i_UnknownOpcode; + R4300i_CoP1_W[41] = R4300i_UnknownOpcode; + R4300i_CoP1_W[42] = R4300i_UnknownOpcode; + R4300i_CoP1_W[43] = R4300i_UnknownOpcode; + R4300i_CoP1_W[44] = R4300i_UnknownOpcode; + R4300i_CoP1_W[45] = R4300i_UnknownOpcode; + R4300i_CoP1_W[46] = R4300i_UnknownOpcode; + R4300i_CoP1_W[47] = R4300i_UnknownOpcode; + R4300i_CoP1_W[48] = R4300i_UnknownOpcode; + R4300i_CoP1_W[49] = R4300i_UnknownOpcode; + R4300i_CoP1_W[50] = R4300i_UnknownOpcode; + R4300i_CoP1_W[51] = R4300i_UnknownOpcode; + R4300i_CoP1_W[52] = R4300i_UnknownOpcode; + R4300i_CoP1_W[53] = R4300i_UnknownOpcode; + R4300i_CoP1_W[54] = R4300i_UnknownOpcode; + R4300i_CoP1_W[55] = R4300i_UnknownOpcode; + R4300i_CoP1_W[56] = R4300i_UnknownOpcode; + R4300i_CoP1_W[57] = R4300i_UnknownOpcode; + R4300i_CoP1_W[58] = R4300i_UnknownOpcode; + R4300i_CoP1_W[59] = R4300i_UnknownOpcode; + R4300i_CoP1_W[60] = R4300i_UnknownOpcode; + R4300i_CoP1_W[61] = R4300i_UnknownOpcode; + R4300i_CoP1_W[62] = R4300i_UnknownOpcode; + R4300i_CoP1_W[63] = R4300i_UnknownOpcode; + + R4300i_CoP1_L[ 0] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 1] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 2] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 3] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 4] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 5] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 6] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 7] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 8] = R4300i_UnknownOpcode; + R4300i_CoP1_L[ 9] = R4300i_UnknownOpcode; + R4300i_CoP1_L[10] = R4300i_UnknownOpcode; + R4300i_CoP1_L[11] = R4300i_UnknownOpcode; + R4300i_CoP1_L[12] = R4300i_UnknownOpcode; + R4300i_CoP1_L[13] = R4300i_UnknownOpcode; + R4300i_CoP1_L[14] = R4300i_UnknownOpcode; + R4300i_CoP1_L[15] = R4300i_UnknownOpcode; + R4300i_CoP1_L[16] = R4300i_UnknownOpcode; + R4300i_CoP1_L[17] = R4300i_UnknownOpcode; + R4300i_CoP1_L[18] = R4300i_UnknownOpcode; + R4300i_CoP1_L[19] = R4300i_UnknownOpcode; + R4300i_CoP1_L[20] = R4300i_UnknownOpcode; + R4300i_CoP1_L[21] = R4300i_UnknownOpcode; + R4300i_CoP1_L[22] = R4300i_UnknownOpcode; + R4300i_CoP1_L[23] = R4300i_UnknownOpcode; + R4300i_CoP1_L[24] = R4300i_UnknownOpcode; + R4300i_CoP1_L[25] = R4300i_UnknownOpcode; + R4300i_CoP1_L[26] = R4300i_UnknownOpcode; + R4300i_CoP1_L[27] = R4300i_UnknownOpcode; + R4300i_CoP1_L[28] = R4300i_UnknownOpcode; + R4300i_CoP1_L[29] = R4300i_UnknownOpcode; + R4300i_CoP1_L[30] = R4300i_UnknownOpcode; + R4300i_CoP1_L[31] = R4300i_UnknownOpcode; + R4300i_CoP1_L[32] = r4300i_COP1_L_CVT_S; + R4300i_CoP1_L[33] = r4300i_COP1_L_CVT_D; + R4300i_CoP1_L[34] = R4300i_UnknownOpcode; + R4300i_CoP1_L[35] = R4300i_UnknownOpcode; + R4300i_CoP1_L[36] = R4300i_UnknownOpcode; + R4300i_CoP1_L[37] = R4300i_UnknownOpcode; + R4300i_CoP1_L[38] = R4300i_UnknownOpcode; + R4300i_CoP1_L[39] = R4300i_UnknownOpcode; + R4300i_CoP1_L[40] = R4300i_UnknownOpcode; + R4300i_CoP1_L[41] = R4300i_UnknownOpcode; + R4300i_CoP1_L[42] = R4300i_UnknownOpcode; + R4300i_CoP1_L[43] = R4300i_UnknownOpcode; + R4300i_CoP1_L[44] = R4300i_UnknownOpcode; + R4300i_CoP1_L[45] = R4300i_UnknownOpcode; + R4300i_CoP1_L[46] = R4300i_UnknownOpcode; + R4300i_CoP1_L[47] = R4300i_UnknownOpcode; + R4300i_CoP1_L[48] = R4300i_UnknownOpcode; + R4300i_CoP1_L[49] = R4300i_UnknownOpcode; + R4300i_CoP1_L[50] = R4300i_UnknownOpcode; + R4300i_CoP1_L[51] = R4300i_UnknownOpcode; + R4300i_CoP1_L[52] = R4300i_UnknownOpcode; + R4300i_CoP1_L[53] = R4300i_UnknownOpcode; + R4300i_CoP1_L[54] = R4300i_UnknownOpcode; + R4300i_CoP1_L[55] = R4300i_UnknownOpcode; + R4300i_CoP1_L[56] = R4300i_UnknownOpcode; + R4300i_CoP1_L[57] = R4300i_UnknownOpcode; + R4300i_CoP1_L[58] = R4300i_UnknownOpcode; + R4300i_CoP1_L[59] = R4300i_UnknownOpcode; + R4300i_CoP1_L[60] = R4300i_UnknownOpcode; + R4300i_CoP1_L[61] = R4300i_UnknownOpcode; + R4300i_CoP1_L[62] = R4300i_UnknownOpcode; + R4300i_CoP1_L[63] = R4300i_UnknownOpcode; +} + + +void RunFunction(usf_state_t * state, uint32_t address) { + uint32_t oldPC = state->PROGRAM_COUNTER, oldRA = state->GPR[31].UW[0], la = state->NextInstruction; + int callStack = 0; + + state->NextInstruction = NORMAL; + state->PROGRAM_COUNTER = address; + + while( (state->PROGRAM_COUNTER != oldRA) || callStack) { + + if(state->PROGRAM_COUNTER == address) + callStack++; + + ExecuteInterpreterOpCode(state); + + if(state->PROGRAM_COUNTER == oldRA) + callStack--; + } + + state->PROGRAM_COUNTER = oldPC; + state->GPR[31].UW[0] = oldRA; + state->NextInstruction = la; +} + +#ifdef DEBUG_INFO +#include "debugger/dbg_decoder.h" +#endif + +void ExecuteInterpreterOpCode (usf_state_t * state) { + + + if (*state->WaitMode) state->Timers->Timer = -1; + + if (!r4300i_LW_VAddr(state, state->PROGRAM_COUNTER, &state->Opcode.u.Hex)) { + DoTLBMiss(state, state->NextInstruction == JUMP,state->PROGRAM_COUNTER); + state->NextInstruction = NORMAL; + return; + } + +#ifdef DEBUG_INFO + { + char opcode[256]; + char arguments[256]; + r4300_decode_op(state->Opcode.u.Hex, opcode, arguments, state->PROGRAM_COUNTER); + fprintf(state->debug_log, "%08x: %-16s %s\n", state->PROGRAM_COUNTER, opcode, arguments); + } +#endif + + COUNT_REGISTER += 2; + state->Timers->Timer -= 2; + + RANDOM_REGISTER -= 1; + if ((int32_t)RANDOM_REGISTER < (int32_t)WIRED_REGISTER) { + RANDOM_REGISTER = 31; + } + + R4300i_Opcode[ state->Opcode.u.b.op ](state); + + if (state->GPR[0].DW != 0) { + state->GPR[0].DW = 0; + } + + switch (state->NextInstruction) { + case NORMAL: + state->PROGRAM_COUNTER += 4; + break; + case DELAY_SLOT: + state->NextInstruction = JUMP; + state->PROGRAM_COUNTER += 4; + break; + case JUMP: + if ( +#ifdef DEBUG_INFO + 0 && +#endif + state->cpu_hle_entry_count && + DoCPUHLE(state, state->JumpToLocation)) { + state->PROGRAM_COUNTER = state->GPR[31].UW[0]; + state->NextInstruction = NORMAL; + } + else { + state->PROGRAM_COUNTER = state->JumpToLocation; + state->NextInstruction = NORMAL; + } + if ((int32_t)state->Timers->Timer < 0) { TimerDone(state); } + if (state->CPU_Action->DoSomething) { DoSomething(state); } + } +} + +void StartInterpreterCPU (usf_state_t * state) { + const int safety_count_max = 20000000; + int safety_count = safety_count_max; + size_t last_sample_buffer_count = state->sample_buffer_count; + + state->NextInstruction = NORMAL; + + while(state->cpu_running) { + ExecuteInterpreterOpCode(state); + if (!--safety_count) { + if (last_sample_buffer_count == state->sample_buffer_count) { + DisplayError( state, "Emulator core is not generating any samples after 20 million instructions" ); + break; + } else { + safety_count = safety_count_max; + last_sample_buffer_count = state->sample_buffer_count; + } + } + } + + state->cpu_stopped = 1; + +} + +void TestInterpreterJump (usf_state_t * state, uint32_t PC, uint32_t TargetPC, int32_t Reg1, int32_t Reg2) { + if (PC != TargetPC) { return; } + if (DelaySlotEffectsCompare(state,PC,Reg1,Reg2)) { return; } + InPermLoop(state); +} diff --git a/Frameworks/lazyusf/lazyusf/interpreter_cpu.h b/Frameworks/lazyusf/lazyusf/interpreter_cpu.h new file mode 100644 index 000000000..53dc69534 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/interpreter_cpu.h @@ -0,0 +1,37 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#include + +void BuildInterpreter ( usf_state_t * ); +void ExecuteInterpreterOpCode ( usf_state_t * ); +void StartInterpreterCPU ( usf_state_t * ); +void TestInterpreterJump ( usf_state_t *, uint32_t PC, uint32_t TargetPC, int32_t Reg1, int32_t Reg2 ); + +void RunFunction( usf_state_t *, uint32_t address ); + + + +extern void (* R4300i_Opcode[64])(usf_state_t *); diff --git a/Frameworks/lazyusf/lazyusf/interpreter_ops.c b/Frameworks/lazyusf/lazyusf/interpreter_ops.c new file mode 100644 index 000000000..ba9faa82c --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/interpreter_ops.c @@ -0,0 +1,1342 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ + +#include +#include +#include +#include "main.h" +#include "cpu.h" +#include "usf.h" + +#ifdef _MSC_VER +#define INLINE __forceinline +#else +#define INLINE inline __attribute__((always_inline)) +#endif + +#include "usf_internal.h" + +#define ADDRESS_ERROR_EXCEPTION(Address,FromRead) \ + DoAddressError(state,state->NextInstruction == JUMP,Address,FromRead);\ + state->NextInstruction = JUMP;\ + state->JumpToLocation = state->PROGRAM_COUNTER;\ + return; + +//#define TEST_COP1_USABLE_EXCEPTION +#define TEST_COP1_USABLE_EXCEPTION \ + if ((STATUS_REGISTER & STATUS_CU1) == 0) {\ + DoCopUnusableException(state,state->NextInstruction == JUMP,1);\ + state->NextInstruction = JUMP;\ + state->JumpToLocation = state->PROGRAM_COUNTER;\ + return;\ + } + +#define TLB_READ_EXCEPTION(Address) \ + DoTLBMiss(state,state->NextInstruction == JUMP,Address);\ + state->NextInstruction = JUMP;\ + state->JumpToLocation = state->PROGRAM_COUNTER;\ + return; + +/************************* OpCode functions *************************/ +void r4300i_J (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = (state->PROGRAM_COUNTER & 0xF0000000) + (state->Opcode.u.d.target << 2); + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,0,0); +} + +void r4300i_JAL (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = (state->PROGRAM_COUNTER & 0xF0000000) + (state->Opcode.u.d.target << 2); + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,0,0); + state->GPR[31].DW= (int32_t)(state->PROGRAM_COUNTER + 8); +} + +void r4300i_BEQ (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + if (state->GPR[state->Opcode.u.b.rs].DW == state->GPR[state->Opcode.u.b.rt].DW) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,state->Opcode.u.b.rt); + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_BNE (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + if (state->GPR[state->Opcode.u.b.rs].DW != state->GPR[state->Opcode.u.b.rt].DW) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,state->Opcode.u.b.rt); + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_BLEZ (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + if (state->GPR[state->Opcode.u.b.rs].DW <= 0) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_BGTZ (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + if (state->GPR[state->Opcode.u.b.rs].DW > 0) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_ADDI (usf_state_t * state) { + if (state->Opcode.u.b.rt == 0) { return; } + state->GPR[state->Opcode.u.b.rt].DW = (state->GPR[state->Opcode.u.b.rs].W[0] + ((int16_t)state->Opcode.u.c.immediate)); +} + +void r4300i_ADDIU (usf_state_t * state) { + state->GPR[state->Opcode.u.b.rt].DW = (state->GPR[state->Opcode.u.b.rs].W[0] + ((int16_t)state->Opcode.u.c.immediate)); +} + +void r4300i_SLTI (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW < (int64_t)((int16_t)state->Opcode.u.c.immediate)) { + state->GPR[state->Opcode.u.b.rt].DW = 1; + } else { + state->GPR[state->Opcode.u.b.rt].DW = 0; + } +} + +void r4300i_SLTIU (usf_state_t * state) { + int32_t imm32 = (int16_t)state->Opcode.u.c.immediate; + int64_t imm64; + + imm64 = imm32; + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rs].UDW < (uint64_t)imm64?1:0; +} + +void r4300i_ANDI (usf_state_t * state) { + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rs].DW & state->Opcode.u.c.immediate; +} + +void r4300i_ORI (usf_state_t * state) { + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rs].DW | state->Opcode.u.c.immediate; +} + +void r4300i_XORI (usf_state_t * state) { + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rs].DW ^ state->Opcode.u.c.immediate; +} + +void r4300i_LUI (usf_state_t * state) { + if (state->Opcode.u.b.rt == 0) { return; } + state->GPR[state->Opcode.u.b.rt].DW = (int32_t)((int16_t)state->Opcode.u.b.offset << 16); +} + +void r4300i_BEQL (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW == state->GPR[state->Opcode.u.b.rt].DW) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,state->Opcode.u.b.rt); + } else { + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_BNEL (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW != state->GPR[state->Opcode.u.b.rt].DW) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,state->Opcode.u.b.rt); + } else { + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_BLEZL (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW <= 0) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_BGTZL (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW > 0) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_DADDIU (usf_state_t * state) { + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rs].DW + (int64_t)((int16_t)state->Opcode.u.c.immediate); +} + +uint64_t LDL_MASK[8] = { 0ULL,0xFFULL,0xFFFFULL,0xFFFFFFULL,0xFFFFFFFFULL,0xFFFFFFFFFFULL, 0xFFFFFFFFFFFFULL, 0xFFFFFFFFFFFFFFULL }; +int32_t LDL_SHIFT[8] = { 0, 8, 16, 24, 32, 40, 48, 56 }; + +void r4300i_LDL (usf_state_t * state) { + uint32_t Offset, Address; + uint64_t Value; + + Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + Offset = Address & 7; + + if (!r4300i_LD_VAddr(state,(Address & ~7),&Value)) { + return; + } + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rt].DW & LDL_MASK[Offset]; + state->GPR[state->Opcode.u.b.rt].DW += Value << LDL_SHIFT[Offset]; +} + +uint64_t LDR_MASK[8] = { 0xFFFFFFFFFFFFFF00ULL, 0xFFFFFFFFFFFF0000ULL, + 0xFFFFFFFFFF000000ULL, 0xFFFFFFFF00000000ULL, + 0xFFFFFF0000000000ULL, 0xFFFF000000000000ULL, + 0xFF00000000000000ULL, 0 }; +int32_t LDR_SHIFT[8] = { 56, 48, 40, 32, 24, 16, 8, 0 }; + +void r4300i_LDR (usf_state_t * state) { + uint32_t Offset, Address; + uint64_t Value; + + Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + Offset = Address & 7; + + if (!r4300i_LD_VAddr(state,(Address & ~7),&Value)) { + return; + } + + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rt].DW & LDR_MASK[Offset]; + state->GPR[state->Opcode.u.b.rt].DW += Value >> LDR_SHIFT[Offset]; + +} + +void r4300i_LB (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if (state->Opcode.u.b.rt == 0) { return; } + if (!r4300i_LB_VAddr(state,Address,&state->GPR[state->Opcode.u.b.rt].UB[0])) { + TLB_READ_EXCEPTION(Address); + } else { + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rt].B[0]; + } +} + +void r4300i_LH (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,1); } + if (!r4300i_LH_VAddr(state,Address,&state->GPR[state->Opcode.u.b.rt].UHW[0])) { + //if (ShowTLBMisses) { + // Too spammy + //DisplayError(state, "LH TLB: %X",Address); + //} + TLB_READ_EXCEPTION(Address); + } else { + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rt].HW[0]; + } +} + +uint32_t LWL_MASK[4] = { 0,0xFF,0xFFFF,0xFFFFFF }; +int32_t LWL_SHIFT[4] = { 0, 8, 16, 24}; + +void r4300i_LWL (usf_state_t * state) { + uint32_t Offset, Address, Value; + + Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + Offset = Address & 3; + + if (!r4300i_LW_VAddr(state,(Address & ~3),&Value)) { + return; + } + + state->GPR[state->Opcode.u.b.rt].DW = (int32_t)(state->GPR[state->Opcode.u.b.rt].W[0] & LWL_MASK[Offset]); + state->GPR[state->Opcode.u.b.rt].DW += (int32_t)(Value << LWL_SHIFT[Offset]); +} + +void r4300i_LW (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + + +// if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,1); } + + if (state->Opcode.u.b.rt == 0) { return; } + + + if (!r4300i_LW_VAddr(state,Address,&state->GPR[state->Opcode.u.b.rt].UW[0])) { + //if (ShowTLBMisses) { + //printf("LW TLB: %X",Address); + //} + TLB_READ_EXCEPTION(Address); + } else { + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rt].W[0]; + } +} + +void r4300i_LBU (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if (!r4300i_LB_VAddr(state,Address,&state->GPR[state->Opcode.u.b.rt].UB[0])) { + //if (ShowTLBMisses) { + // Too spammy + //DisplayError(state, "LBU TLB: %X",Address); + //} + TLB_READ_EXCEPTION(Address); + } else { + state->GPR[state->Opcode.u.b.rt].UDW = state->GPR[state->Opcode.u.b.rt].UB[0]; + } +} + +void r4300i_LHU (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,1); } + if (!r4300i_LH_VAddr(state,Address,&state->GPR[state->Opcode.u.b.rt].UHW[0])) { + //if (ShowTLBMisses) { + // Too spammy + //DisplayError(state, "LHU TLB: %X",Address); + //} + TLB_READ_EXCEPTION(Address); + } else { + state->GPR[state->Opcode.u.b.rt].UDW = state->GPR[state->Opcode.u.b.rt].UHW[0]; + } +} + +uint32_t LWR_MASK[4] = { 0xFFFFFF00, 0xFFFF0000, 0xFF000000, 0 }; +int32_t LWR_SHIFT[4] = { 24, 16 ,8, 0 }; + +void r4300i_LWR (usf_state_t * state) { + uint32_t Offset, Address, Value; + + Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + Offset = Address & 3; + + if (!r4300i_LW_VAddr(state,(Address & ~3),&Value)) { + return; + } + + state->GPR[state->Opcode.u.b.rt].DW = (int32_t)(state->GPR[state->Opcode.u.b.rt].W[0] & LWR_MASK[Offset]); + state->GPR[state->Opcode.u.b.rt].DW += (int32_t)(Value >> LWR_SHIFT[Offset]); +} + +void r4300i_LWU (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,1); } + if (state->Opcode.u.b.rt == 0) { return; } + + if (!r4300i_LW_VAddr(state,Address,&state->GPR[state->Opcode.u.b.rt].UW[0])) { + //if (ShowTLBMisses) { + // Too spammy + //DisplayError(state, "LWU TLB: %X",Address); + //} + TLB_READ_EXCEPTION(Address); + } else { + state->GPR[state->Opcode.u.b.rt].UDW = state->GPR[state->Opcode.u.b.rt].UW[0]; + } +} + +void r4300i_SB (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if (!r4300i_SB_VAddr(state,Address,state->GPR[state->Opcode.u.b.rt].UB[0])) { + } +} + +void r4300i_SH (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if ((Address & 1) != 0) { ADDRESS_ERROR_EXCEPTION(Address,0); } + if (!r4300i_SH_VAddr(state,Address,state->GPR[state->Opcode.u.b.rt].UHW[0])) { + } +} + +uint32_t SWL_MASK[4] = { 0,0xFF000000,0xFFFF0000,0xFFFFFF00 }; +int32_t SWL_SHIFT[4] = { 0, 8, 16, 24 }; + +void r4300i_SWL (usf_state_t * state) { + uint32_t Offset, Address, Value; + + Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + Offset = Address & 3; + + if (!r4300i_LW_VAddr(state,(Address & ~3),&Value)) { + return; + } + + Value &= SWL_MASK[Offset]; + Value += state->GPR[state->Opcode.u.b.rt].UW[0] >> SWL_SHIFT[Offset]; + + if (!r4300i_SW_VAddr(state,(Address & ~0x03),Value)) { + } +} + + +void r4300i_SW (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,0); } + if (!r4300i_SW_VAddr(state,Address,state->GPR[state->Opcode.u.b.rt].UW[0])) { + } + //TranslateVaddr(&Address); + //if (Address == 0x00090AA0) { + // LogMessage("%X: Write %X to %X",state->PROGRAM_COUNTER,state->GPR[state->Opcode.u.b.rt].UW[0],state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset); + //} +} + +uint64_t SDL_MASK[8] = { 0,0xFF00000000000000ULL, + 0xFFFF000000000000ULL, + 0xFFFFFF0000000000ULL, + 0xFFFFFFFF00000000ULL, + 0xFFFFFFFFFF000000ULL, + 0xFFFFFFFFFFFF0000ULL, + 0xFFFFFFFFFFFFFF00ULL + }; +int32_t SDL_SHIFT[8] = { 0, 8, 16, 24, 32, 40, 48, 56 }; + +void r4300i_SDL (usf_state_t * state) { + uint32_t Offset, Address; + uint64_t Value; + + Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + Offset = Address & 7; + + if (!r4300i_LD_VAddr(state,(Address & ~7),&Value)) { + return; + } + + Value &= SDL_MASK[Offset]; + Value += state->GPR[state->Opcode.u.b.rt].UDW >> SDL_SHIFT[Offset]; + + if (!r4300i_SD_VAddr(state,(Address & ~7),Value)) { + } +} + +uint64_t SDR_MASK[8] = { 0x00FFFFFFFFFFFFFFULL, + 0x0000FFFFFFFFFFFFULL, + 0x000000FFFFFFFFFFULL, + 0x00000000FFFFFFFFULL, + 0x0000000000FFFFFFULL, + 0x000000000000FFFFULL, + 0x00000000000000FFULL, + 0x0000000000000000ULL + }; +int32_t SDR_SHIFT[8] = { 56,48,40,32,24,16,8,0 }; + +void r4300i_SDR (usf_state_t * state) { + uint32_t Offset, Address; + uint64_t Value; + + Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + Offset = Address & 7; + + if (!r4300i_LD_VAddr(state,(Address & ~7),&Value)) { + return; + } + + Value &= SDR_MASK[Offset]; + Value += state->GPR[state->Opcode.u.b.rt].UDW << SDR_SHIFT[Offset]; + + if (!r4300i_SD_VAddr(state,(Address & ~7),Value)) { + } +} + +uint32_t SWR_MASK[4] = { 0x00FFFFFF,0x0000FFFF,0x000000FF,0x00000000 }; +int32_t SWR_SHIFT[4] = { 24, 16 , 8, 0 }; + +void r4300i_SWR (usf_state_t * state) { + uint32_t Offset, Address, Value; + + Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + Offset = Address & 3; + + if (!r4300i_LW_VAddr(state,(Address & ~3),&Value)) { + return; + } + + Value &= SWR_MASK[Offset]; + Value += state->GPR[state->Opcode.u.b.rt].UW[0] << SWR_SHIFT[Offset]; + + if (!r4300i_SW_VAddr(state,(Address & ~0x03),Value)) { + } +} + +void r4300i_CACHE (usf_state_t * state) { + (void)state; +} + +void r4300i_LL (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + uintptr_t ll = 0; + if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,1); } + + if (state->Opcode.u.b.rt == 0) { return; } + + if (!r4300i_LW_VAddr(state,Address,&state->GPR[state->Opcode.u.b.rt].UW[0])) { + //if (ShowTLBMisses) { + // Too spammy + //DisplayError(state, "LW TLB: %X",Address); + //} + TLB_READ_EXCEPTION(Address); + } else { + state->GPR[state->Opcode.u.b.rt].DW = state->GPR[state->Opcode.u.b.rt].W[0]; + } + state->LLBit = 1; + state->LLAddr = Address; + ll = state->LLAddr; + TranslateVaddr(state, &ll); + state->LLAddr = (uint32_t) ll; +} + +void r4300i_LWC1 (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (uint32_t)((int16_t)state->Opcode.u.b.offset); + TEST_COP1_USABLE_EXCEPTION + if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,1); } + if (!r4300i_LW_VAddr(state,Address,&*(uint32_t *)state->FPRFloatLocation[state->Opcode.u.f.ft])) { + //if (ShowTLBMisses) { + // Too spammy + //DisplayError(state, "LWC1 TLB: %X",Address); + //} + TLB_READ_EXCEPTION(Address); + } +} + +void r4300i_SC (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,0); } + if (state->LLBit == 1) { + if (!r4300i_SW_VAddr(state,Address,state->GPR[state->Opcode.u.b.rt].UW[0])) { + DisplayError(state, "SW TLB: %X",Address); + } + } + state->GPR[state->Opcode.u.b.rt].UW[0] = state->LLBit; +} + +void r4300i_LD (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if ((Address & 7) != 0) { ADDRESS_ERROR_EXCEPTION(Address,1); } + if (!r4300i_LD_VAddr(state,Address,&state->GPR[state->Opcode.u.b.rt].UDW)) { + } +} + + +void r4300i_LDC1 (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + + TEST_COP1_USABLE_EXCEPTION + if ((Address & 7) != 0) { ADDRESS_ERROR_EXCEPTION(Address,1); } + if (!r4300i_LD_VAddr(state,Address,&*(uint64_t *)state->FPRDoubleLocation[state->Opcode.u.f.ft])) { + } +} + +void r4300i_SWC1 (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + TEST_COP1_USABLE_EXCEPTION + if ((Address & 3) != 0) { ADDRESS_ERROR_EXCEPTION(Address,0); } + + if (!r4300i_SW_VAddr(state,Address,*(uint32_t *)state->FPRFloatLocation[state->Opcode.u.f.ft])) { + } +} + +void r4300i_SDC1 (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + + TEST_COP1_USABLE_EXCEPTION + if ((Address & 7) != 0) { ADDRESS_ERROR_EXCEPTION(Address,0); } + if (!r4300i_SD_VAddr(state,Address,*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.ft])) { + } +} + +void r4300i_SD (usf_state_t * state) { + uint32_t Address = state->GPR[state->Opcode.u.c.base].UW[0] + (int16_t)state->Opcode.u.b.offset; + if ((Address & 7) != 0) { ADDRESS_ERROR_EXCEPTION(Address,0); } + if (!r4300i_SD_VAddr(state,Address,state->GPR[state->Opcode.u.b.rt].UDW)) { + } +} +/********************** R4300i state->Opcodes: Special **********************/ +void r4300i_SPECIAL_SLL (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (state->GPR[state->Opcode.u.b.rt].W[0] << state->Opcode.u.e.sa); +} + +void r4300i_SPECIAL_SRL (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (int32_t)(state->GPR[state->Opcode.u.b.rt].UW[0] >> state->Opcode.u.e.sa); +} + +void r4300i_SPECIAL_SRA (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (state->GPR[state->Opcode.u.b.rt].W[0] >> state->Opcode.u.e.sa); +} + +void r4300i_SPECIAL_SLLV (usf_state_t * state) { + if (state->Opcode.u.e.rd == 0) { return; } + state->GPR[state->Opcode.u.e.rd].DW = (state->GPR[state->Opcode.u.b.rt].W[0] << (state->GPR[state->Opcode.u.b.rs].UW[0] & 0x1F)); +} + +void r4300i_SPECIAL_SRLV (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (int32_t)(state->GPR[state->Opcode.u.b.rt].UW[0] >> (state->GPR[state->Opcode.u.b.rs].UW[0] & 0x1F)); +} + +void r4300i_SPECIAL_SRAV (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (state->GPR[state->Opcode.u.b.rt].W[0] >> (state->GPR[state->Opcode.u.b.rs].UW[0] & 0x1F)); +} + +void r4300i_SPECIAL_JR (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->GPR[state->Opcode.u.b.rs].UW[0]; +} + +void r4300i_SPECIAL_JALR (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->GPR[state->Opcode.u.b.rs].UW[0]; + state->GPR[state->Opcode.u.e.rd].DW = (int32_t)(state->PROGRAM_COUNTER + 8); +} + +void r4300i_SPECIAL_SYSCALL (usf_state_t * state) { + DoSysCallException(state, state->NextInstruction == JUMP); + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER; +} + +void r4300i_SPECIAL_BREAK (usf_state_t * state) { + *state->WaitMode=1; +} + +void r4300i_SPECIAL_SYNC (usf_state_t * state) { + (void)state; +} + +void r4300i_SPECIAL_MFHI (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->HI.DW; +} + +void r4300i_SPECIAL_MTHI (usf_state_t * state) { + state->HI.DW = state->GPR[state->Opcode.u.b.rs].DW; +} + +void r4300i_SPECIAL_MFLO (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->LO.DW; +} + +void r4300i_SPECIAL_MTLO (usf_state_t * state) { + state->LO.DW = state->GPR[state->Opcode.u.b.rs].DW; +} + +void r4300i_SPECIAL_DSLLV (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rt].DW << (state->GPR[state->Opcode.u.b.rs].UW[0] & 0x3F); +} + +void r4300i_SPECIAL_DSRLV (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].UDW = state->GPR[state->Opcode.u.b.rt].UDW >> (state->GPR[state->Opcode.u.b.rs].UW[0] & 0x3F); +} + +void r4300i_SPECIAL_DSRAV (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rt].DW >> (state->GPR[state->Opcode.u.b.rs].UW[0] & 0x3F); +} + +void r4300i_SPECIAL_MULT (usf_state_t * state) { + state->HI.DW = (int64_t)(state->GPR[state->Opcode.u.b.rs].W[0]) * (int64_t)(state->GPR[state->Opcode.u.b.rt].W[0]); + state->LO.DW = state->HI.W[0]; + state->HI.DW = state->HI.W[1]; +} + +void r4300i_SPECIAL_MULTU (usf_state_t * state) { + state->HI.DW = (uint64_t)(state->GPR[state->Opcode.u.b.rs].UW[0]) * (uint64_t)(state->GPR[state->Opcode.u.b.rt].UW[0]); + state->LO.DW = state->HI.W[0]; + state->HI.DW = state->HI.W[1]; +} + +void r4300i_SPECIAL_DIV (usf_state_t * state) { + if ( state->GPR[state->Opcode.u.b.rt].UDW != 0 ) { + state->LO.DW = state->GPR[state->Opcode.u.b.rs].W[0] / state->GPR[state->Opcode.u.b.rt].W[0]; + state->HI.DW = state->GPR[state->Opcode.u.b.rs].W[0] % state->GPR[state->Opcode.u.b.rt].W[0]; + } else { + } +} + +void r4300i_SPECIAL_DIVU (usf_state_t * state) { + if ( state->GPR[state->Opcode.u.b.rt].UDW != 0 ) { + state->LO.DW = (int32_t)(state->GPR[state->Opcode.u.b.rs].UW[0] / state->GPR[state->Opcode.u.b.rt].UW[0]); + state->HI.DW = (int32_t)(state->GPR[state->Opcode.u.b.rs].UW[0] % state->GPR[state->Opcode.u.b.rt].UW[0]); + } else { + } +} + +void r4300i_SPECIAL_DMULT (usf_state_t * state) { + MIPS_DWORD Tmp[3]; + + state->LO.UDW = (uint64_t)state->GPR[state->Opcode.u.b.rs].UW[0] * (uint64_t)state->GPR[state->Opcode.u.b.rt].UW[0]; + Tmp[0].UDW = (int64_t)state->GPR[state->Opcode.u.b.rs].W[1] * (int64_t)(uint64_t)state->GPR[state->Opcode.u.b.rt].UW[0]; + Tmp[1].UDW = (int64_t)(uint64_t)state->GPR[state->Opcode.u.b.rs].UW[0] * (int64_t)state->GPR[state->Opcode.u.b.rt].W[1]; + state->HI.UDW = (int64_t)state->GPR[state->Opcode.u.b.rs].W[1] * (int64_t)state->GPR[state->Opcode.u.b.rt].W[1]; + + Tmp[2].UDW = (uint64_t)state->LO.UW[1] + (uint64_t)Tmp[0].UW[0] + (uint64_t)Tmp[1].UW[0]; + state->LO.UDW += ((uint64_t)Tmp[0].UW[0] + (uint64_t)Tmp[1].UW[0]) << 32; + state->HI.UDW += (uint64_t)Tmp[0].W[1] + (uint64_t)Tmp[1].W[1] + Tmp[2].UW[1]; +} + +void r4300i_SPECIAL_DMULTU (usf_state_t * state) { + MIPS_DWORD Tmp[3]; + + state->LO.UDW = (uint64_t)state->GPR[state->Opcode.u.b.rs].UW[0] * (uint64_t)state->GPR[state->Opcode.u.b.rt].UW[0]; + Tmp[0].UDW = (uint64_t)state->GPR[state->Opcode.u.b.rs].UW[1] * (uint64_t)state->GPR[state->Opcode.u.b.rt].UW[0]; + Tmp[1].UDW = (uint64_t)state->GPR[state->Opcode.u.b.rs].UW[0] * (uint64_t)state->GPR[state->Opcode.u.b.rt].UW[1]; + state->HI.UDW = (uint64_t)state->GPR[state->Opcode.u.b.rs].UW[1] * (uint64_t)state->GPR[state->Opcode.u.b.rt].UW[1]; + + Tmp[2].UDW = (uint64_t)state->LO.UW[1] + (uint64_t)Tmp[0].UW[0] + (uint64_t)Tmp[1].UW[0]; + state->LO.UDW += ((uint64_t)Tmp[0].UW[0] + (uint64_t)Tmp[1].UW[0]) << 32; + state->HI.UDW += (uint64_t)Tmp[0].UW[1] + (uint64_t)Tmp[1].UW[1] + Tmp[2].UW[1]; +} + +void r4300i_SPECIAL_DDIV (usf_state_t * state) { + if ( state->GPR[state->Opcode.u.b.rt].UDW != 0 ) { + state->LO.DW = state->GPR[state->Opcode.u.b.rs].DW / state->GPR[state->Opcode.u.b.rt].DW; + state->HI.DW = state->GPR[state->Opcode.u.b.rs].DW % state->GPR[state->Opcode.u.b.rt].DW; + } else { + } +} + +void r4300i_SPECIAL_DDIVU (usf_state_t * state) { + if ( state->GPR[state->Opcode.u.b.rt].UDW != 0 ) { + state->LO.UDW = state->GPR[state->Opcode.u.b.rs].UDW / state->GPR[state->Opcode.u.b.rt].UDW; + state->HI.UDW = state->GPR[state->Opcode.u.b.rs].UDW % state->GPR[state->Opcode.u.b.rt].UDW; + } else { + } +} + +void r4300i_SPECIAL_ADD (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].W[0] + state->GPR[state->Opcode.u.b.rt].W[0]; +} + +void r4300i_SPECIAL_ADDU (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].W[0] + state->GPR[state->Opcode.u.b.rt].W[0]; +} + +void r4300i_SPECIAL_SUB (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].W[0] - state->GPR[state->Opcode.u.b.rt].W[0]; +} + +void r4300i_SPECIAL_SUBU (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].W[0] - state->GPR[state->Opcode.u.b.rt].W[0]; +} + +void r4300i_SPECIAL_AND (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].DW & state->GPR[state->Opcode.u.b.rt].DW; +} + +void r4300i_SPECIAL_OR (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].DW | state->GPR[state->Opcode.u.b.rt].DW; +} + +void r4300i_SPECIAL_XOR (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].DW ^ state->GPR[state->Opcode.u.b.rt].DW; +} + +void r4300i_SPECIAL_NOR (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = ~(state->GPR[state->Opcode.u.b.rs].DW | state->GPR[state->Opcode.u.b.rt].DW); +} + +void r4300i_SPECIAL_SLT (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW < state->GPR[state->Opcode.u.b.rt].DW) { + state->GPR[state->Opcode.u.e.rd].DW = 1; + } else { + state->GPR[state->Opcode.u.e.rd].DW = 0; + } +} + +void r4300i_SPECIAL_SLTU (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].UDW < state->GPR[state->Opcode.u.b.rt].UDW) { + state->GPR[state->Opcode.u.e.rd].DW = 1; + } else { + state->GPR[state->Opcode.u.e.rd].DW = 0; + } +} + +void r4300i_SPECIAL_DADD (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].DW + state->GPR[state->Opcode.u.b.rt].DW; +} + +void r4300i_SPECIAL_DADDU (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].DW + state->GPR[state->Opcode.u.b.rt].DW; +} + +void r4300i_SPECIAL_DSUB (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].DW - state->GPR[state->Opcode.u.b.rt].DW; +} + +void r4300i_SPECIAL_DSUBU (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = state->GPR[state->Opcode.u.b.rs].DW - state->GPR[state->Opcode.u.b.rt].DW; +} + +void r4300i_SPECIAL_TEQ (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW == state->GPR[state->Opcode.u.b.rt].DW) { + } +} + +void r4300i_SPECIAL_DSLL (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (state->GPR[state->Opcode.u.b.rt].DW << state->Opcode.u.e.sa); +} + +void r4300i_SPECIAL_DSRL (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].UDW = (state->GPR[state->Opcode.u.b.rt].UDW >> state->Opcode.u.e.sa); +} + +void r4300i_SPECIAL_DSRA (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (state->GPR[state->Opcode.u.b.rt].DW >> state->Opcode.u.e.sa); +} + +void r4300i_SPECIAL_DSLL32 (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (state->GPR[state->Opcode.u.b.rt].DW << (state->Opcode.u.e.sa + 32)); +} + +void r4300i_SPECIAL_DSRL32 (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].UDW = (state->GPR[state->Opcode.u.b.rt].UDW >> (state->Opcode.u.e.sa + 32)); +} + +void r4300i_SPECIAL_DSRA32 (usf_state_t * state) { + state->GPR[state->Opcode.u.e.rd].DW = (state->GPR[state->Opcode.u.b.rt].DW >> (state->Opcode.u.e.sa + 32)); +} + +/********************** R4300i state->Opcodes: RegImm **********************/ +void r4300i_REGIMM_BLTZ (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + if (state->GPR[state->Opcode.u.b.rs].DW < 0) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_REGIMM_BGEZ (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + if (state->GPR[state->Opcode.u.b.rs].DW >= 0) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_REGIMM_BLTZL (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW < 0) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_REGIMM_BGEZL (usf_state_t * state) { + if (state->GPR[state->Opcode.u.b.rs].DW >= 0) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_REGIMM_BLTZAL (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + if (state->GPR[state->Opcode.u.b.rs].DW < 0) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } + state->GPR[31].DW= (int32_t)(state->PROGRAM_COUNTER + 8); +} + +void r4300i_REGIMM_BGEZAL (usf_state_t * state) { + state->NextInstruction = DELAY_SLOT; + if (state->GPR[state->Opcode.u.b.rs].DW >= 0) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + TestInterpreterJump(state,state->PROGRAM_COUNTER,state->JumpToLocation,state->Opcode.u.b.rs,0); + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } + state->GPR[31].DW = (int32_t)(state->PROGRAM_COUNTER + 8); +} +/************************** COP0 functions **************************/ +void r4300i_COP0_MF (usf_state_t * state) { + state->GPR[state->Opcode.u.b.rt].DW = (int32_t)state->CP0[state->Opcode.u.e.rd]; +} + +void r4300i_COP0_MT (usf_state_t * state) { + switch (state->Opcode.u.e.rd) { + case 0: //Index + case 2: //EntryLo0 + case 3: //EntryLo1 + case 5: //PageMask + case 6: //Wired + case 10: //Entry Hi + case 14: //EPC + case 16: //Config + case 18: //WatchLo + case 19: //WatchHi + case 28: //Tag lo + case 29: //Tag Hi + case 30: //ErrEPC + state->CP0[state->Opcode.u.e.rd] = state->GPR[state->Opcode.u.b.rt].UW[0]; + break; + case 4: //Context + state->CP0[state->Opcode.u.e.rd] = state->GPR[state->Opcode.u.b.rt].UW[0] & 0xFF800000; + break; + case 9: //Count + state->CP0[state->Opcode.u.e.rd]= state->GPR[state->Opcode.u.b.rt].UW[0]; + ChangeCompareTimer(state); + break; + case 11: //Compare + state->CP0[state->Opcode.u.e.rd] = state->GPR[state->Opcode.u.b.rt].UW[0]; + FAKE_CAUSE_REGISTER &= ~CAUSE_IP7; + ChangeCompareTimer(state); + break; + case 12: //Status + if ((state->CP0[state->Opcode.u.e.rd] ^ state->GPR[state->Opcode.u.b.rt].UW[0]) != 0) { + state->CP0[state->Opcode.u.e.rd] = state->GPR[state->Opcode.u.b.rt].UW[0]; + SetFpuLocations(state); + } else { + state->CP0[state->Opcode.u.e.rd] = state->GPR[state->Opcode.u.b.rt].UW[0]; + } + if ((state->CP0[state->Opcode.u.e.rd] & 0x18) != 0) { + } + CheckInterrupts(state); + break; + case 13: //cause + state->CP0[state->Opcode.u.e.rd] &= 0xFFFFCFF; + break; + default: + R4300i_UnknownOpcode(state); + } + +} + +/************************** COP0 CO functions ***********************/ +void r4300i_COP0_CO_TLBR (usf_state_t * state) { + TLB_Read(state); +} + +void r4300i_COP0_CO_TLBWI (usf_state_t * state) { + WriteTLBEntry(state, INDEX_REGISTER & 0x1F); +} + +void r4300i_COP0_CO_TLBWR (usf_state_t * state) { + WriteTLBEntry(state, RANDOM_REGISTER & 0x1F); +} + +void r4300i_COP0_CO_TLBP (usf_state_t * state) { + TLB_Probe(state); +} + +void r4300i_COP0_CO_ERET (usf_state_t * state) { + state->NextInstruction = JUMP; + if ((STATUS_REGISTER & STATUS_ERL) != 0) { + state->JumpToLocation = ERROREPC_REGISTER; + STATUS_REGISTER &= ~STATUS_ERL; + } else { + state->JumpToLocation = EPC_REGISTER; + STATUS_REGISTER &= ~STATUS_EXL; + } + state->LLBit = 0; + CheckInterrupts(state); +} + +/************************** COP1 functions **************************/ +void r4300i_COP1_MF (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + state->GPR[state->Opcode.u.b.rt].DW = *(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fs]; +} + +void r4300i_COP1_DMF (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + state->GPR[state->Opcode.u.b.rt].DW = *(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fs]; +} + +void r4300i_COP1_CF (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + if (state->Opcode.u.f.fs != 31 && state->Opcode.u.f.fs != 0) { + return; + } + state->GPR[state->Opcode.u.b.rt].DW = (int32_t)state->FPCR[state->Opcode.u.f.fs]; +} + +void r4300i_COP1_MT (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fs] = state->GPR[state->Opcode.u.b.rt].W[0]; +} + +void r4300i_COP1_DMT (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fs] = state->GPR[state->Opcode.u.b.rt].DW; +} + +void r4300i_COP1_CT (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + if (state->Opcode.u.f.fs == 31) { + state->FPCR[state->Opcode.u.f.fs] = state->GPR[state->Opcode.u.b.rt].W[0]; + return; + } +} + +/************************* COP1: BC1 functions ***********************/ +void r4300i_COP1_BCF (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + state->NextInstruction = DELAY_SLOT; + if ((state->FPCR[31] & FPCSR_C) == 0) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_COP1_BCT (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + state->NextInstruction = DELAY_SLOT; + if ((state->FPCR[31] & FPCSR_C) != 0) { + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + } else { + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_COP1_BCFL (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + if ((state->FPCR[31] & FPCSR_C) == 0) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + } else { + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} + +void r4300i_COP1_BCTL (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + if ((state->FPCR[31] & FPCSR_C) != 0) { + state->NextInstruction = DELAY_SLOT; + state->JumpToLocation = state->PROGRAM_COUNTER + ((int16_t)state->Opcode.u.b.offset << 2) + 4; + } else { + state->NextInstruction = JUMP; + state->JumpToLocation = state->PROGRAM_COUNTER + 8; + } +} +/************************** COP1: S functions ************************/ +static INLINE void Float_RoundToInteger32( int32_t * Dest, float * Source ) { + *Dest = (int32_t)*Source; +} + +static INLINE void Float_RoundToInteger64( int64_t * Dest, float * Source ) { + *Dest = (int64_t)*Source; +} + +void r4300i_COP1_S_ADD (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs] + *(float *)state->FPRFloatLocation[state->Opcode.u.f.ft]); +} + +void r4300i_COP1_S_SUB (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs] - *(float *)state->FPRFloatLocation[state->Opcode.u.f.ft]); +} + +void r4300i_COP1_S_MUL (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs] * *(float *)state->FPRFloatLocation[state->Opcode.u.f.ft]); +} + +void r4300i_COP1_S_DIV (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs] / *(float *)state->FPRFloatLocation[state->Opcode.u.f.ft]); +} + +void r4300i_COP1_S_SQRT (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (float)sqrt(*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_ABS (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (float)fabs(*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_MOV (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = *(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]; +} + +void r4300i_COP1_S_NEG (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs] * -1.0f); +} + +void r4300i_COP1_S_TRUNC_L (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + //_controlfp(_RC_CHOP,_MCW_RC); + Float_RoundToInteger64(&*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_CEIL_L (usf_state_t * state) { //added by Witten + TEST_COP1_USABLE_EXCEPTION + //_controlfp(_RC_UP,_MCW_RC); + Float_RoundToInteger64(&*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_FLOOR_L (usf_state_t * state) { //added by Witten + TEST_COP1_USABLE_EXCEPTION + Float_RoundToInteger64(&*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_ROUND_W (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + Float_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_TRUNC_W (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + //_controlfp(_RC_CHOP,_MCW_RC); + Float_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_CEIL_W (usf_state_t * state) { //added by Witten + TEST_COP1_USABLE_EXCEPTION + //_controlfp(_RC_UP,_MCW_RC); + Float_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_FLOOR_W (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + Float_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_CVT_D (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = (double)(*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_CVT_W (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + Float_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_CVT_L (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + Float_RoundToInteger64(&*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fd],&*(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_S_CMP (usf_state_t * state) { + int32_t less, equal, unorded, condition; + float Temp0, Temp1; + + TEST_COP1_USABLE_EXCEPTION + + Temp0 = *(float *)state->FPRFloatLocation[state->Opcode.u.f.fs]; + Temp1 = *(float *)state->FPRFloatLocation[state->Opcode.u.f.ft]; + + if(0) { + //if (_isnan(Temp0) || _isnan(Temp1)) { + less = 0; + equal = 0; + unorded = 1; + if ((state->Opcode.u.e.funct & 8) != 0) { + } + } else { + less = Temp0 < Temp1; + equal = Temp0 == Temp1; + unorded = 0; + } + + condition = ((state->Opcode.u.e.funct & 4) && less) | ((state->Opcode.u.e.funct & 2) && equal) | + ((state->Opcode.u.e.funct & 1) && unorded); + + if (condition) { + state->FPCR[31] |= FPCSR_C; + } else { + state->FPCR[31] &= ~FPCSR_C; + } + +} + +/************************** COP1: D functions ************************/ +static INLINE void Double_RoundToInteger32( int32_t * Dest, double * Source ) { + *Dest = (int32_t)*Source; +} + +static INLINE void Double_RoundToInteger64( int64_t * Dest, double * Source ) { + *Dest = (int64_t)*Source; +} + +void r4300i_COP1_D_ADD (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.ft]; +} + +void r4300i_COP1_D_SUB (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] - *(double *)state->FPRDoubleLocation[state->Opcode.u.f.ft]; +} + +void r4300i_COP1_D_MUL (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] * *(double *)state->FPRDoubleLocation[state->Opcode.u.f.ft]; +} + +void r4300i_COP1_D_DIV (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] / *(double *)state->FPRDoubleLocation[state->Opcode.u.f.ft]; +} + +void r4300i_COP1_D_SQRT (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = (double)sqrt(*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_D_ABS (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = fabs(*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_D_MOV (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = *(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fs]; +} + +void r4300i_COP1_D_NEG (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = (*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] * -1.0); +} + +void r4300i_COP1_D_TRUNC_L (usf_state_t * state) { //added by Witten + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger64(&*(int64_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] ); +} + +void r4300i_COP1_D_CEIL_L (usf_state_t * state) { //added by Witten + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger64(&*(int64_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] ); +} + +void r4300i_COP1_D_FLOOR_L (usf_state_t * state) { //added by Witten + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger64(&*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fd],&*(double *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_D_ROUND_W (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] ); +} + +void r4300i_COP1_D_TRUNC_W (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] ); +} + +void r4300i_COP1_D_CEIL_W (usf_state_t * state) { //added by Witten + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] ); +} + +void r4300i_COP1_D_FLOOR_W (usf_state_t * state) { //added by Witten + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger32(&*(int32_t *)state->FPRDoubleLocation[state->Opcode.u.f.fd],&*(double *)state->FPRFloatLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_D_CVT_S (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (float)*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs]; +} + +void r4300i_COP1_D_CVT_W (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger32(&*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fd],&*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs] ); +} + +void r4300i_COP1_D_CVT_L (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + Double_RoundToInteger64(&*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fd],&*(double *)state->FPRDoubleLocation[state->Opcode.u.f.fs]); +} + +void r4300i_COP1_D_CMP (usf_state_t * state) { + int32_t less, equal, unorded, condition; + MIPS_DWORD Temp0, Temp1; + + TEST_COP1_USABLE_EXCEPTION + + Temp0.DW = *(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fs]; + Temp1.DW = *(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.ft]; + + if(0) { + //if (_isnan(Temp0.D) || _isnan(Temp1.D)) { + less = 0; + equal = 0; + unorded = 1; + if ((state->Opcode.u.e.funct & 8) != 0) { + } + } else { + less = Temp0.D < Temp1.D; + equal = Temp0.D == Temp1.D; + unorded = 0; + } + + condition = ((state->Opcode.u.e.funct & 4) && less) | ((state->Opcode.u.e.funct & 2) && equal) | + ((state->Opcode.u.e.funct & 1) && unorded); + + if (condition) { + state->FPCR[31] |= FPCSR_C; + } else { + state->FPCR[31] &= ~FPCSR_C; + } +} + +/************************** COP1: W functions ************************/ +void r4300i_COP1_W_CVT_S (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (float)*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fs]; +} + +void r4300i_COP1_W_CVT_D (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = (double)*(int32_t *)state->FPRFloatLocation[state->Opcode.u.f.fs]; +} + +/************************** COP1: L functions ************************/ +void r4300i_COP1_L_CVT_S (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(float *)state->FPRFloatLocation[state->Opcode.u.f.fd] = (float)*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fs]; +} + +void r4300i_COP1_L_CVT_D (usf_state_t * state) { + TEST_COP1_USABLE_EXCEPTION + *(double *)state->FPRDoubleLocation[state->Opcode.u.f.fd] = (double)*(int64_t *)state->FPRDoubleLocation[state->Opcode.u.f.fs]; +} + +/************************** Other functions **************************/ +void R4300i_UnknownOpcode (usf_state_t * state) { + DisplayError(state, "Unknown R4300i Opcode.\tPC:%08x\tOp:%08x\n", state->PROGRAM_COUNTER,state->Opcode.u.Hex); + StopEmulation(state); +} diff --git a/Frameworks/lazyusf/lazyusf/interpreter_ops.h b/Frameworks/lazyusf/lazyusf/interpreter_ops.h new file mode 100644 index 000000000..d8cc8fcaf --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/interpreter_ops.h @@ -0,0 +1,206 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +/************************* OpCode functions *************************/ +void r4300i_J ( usf_state_t * ); +void r4300i_JAL ( usf_state_t * ); +void r4300i_BNE ( usf_state_t * ); +void r4300i_BEQ ( usf_state_t * ); +void r4300i_BLEZ ( usf_state_t * ); +void r4300i_BGTZ ( usf_state_t * ); +void r4300i_ADDI ( usf_state_t * ); +void r4300i_ADDIU ( usf_state_t * ); +void r4300i_SLTI ( usf_state_t * ); +void r4300i_SLTIU ( usf_state_t * ); +void r4300i_ANDI ( usf_state_t * ); +void r4300i_ORI ( usf_state_t * ); +void r4300i_XORI ( usf_state_t * ); +void r4300i_LUI ( usf_state_t * ); +void r4300i_BEQL ( usf_state_t * ); +void r4300i_BNEL ( usf_state_t * ); +void r4300i_BLEZL ( usf_state_t * ); +void r4300i_BGTZL ( usf_state_t * ); +void r4300i_DADDIU ( usf_state_t * ); +void r4300i_LDL ( usf_state_t * ); +void r4300i_LDR ( usf_state_t * ); +void r4300i_LB ( usf_state_t * ); +void r4300i_LH ( usf_state_t * ); +void r4300i_LWL ( usf_state_t * ); +void r4300i_LW ( usf_state_t * ); +void r4300i_LBU ( usf_state_t * ); +void r4300i_LHU ( usf_state_t * ); +void r4300i_LWR ( usf_state_t * ); +void r4300i_LWU ( usf_state_t * ); +void r4300i_SB ( usf_state_t * ); +void r4300i_SH ( usf_state_t * ); +void r4300i_SWL ( usf_state_t * ); +void r4300i_SW ( usf_state_t * ); +void r4300i_SDL ( usf_state_t * ); +void r4300i_SDR ( usf_state_t * ); +void r4300i_SWR ( usf_state_t * ); +void r4300i_CACHE ( usf_state_t * ); +void r4300i_LL ( usf_state_t * ); +void r4300i_LWC1 ( usf_state_t * ); +void r4300i_LDC1 ( usf_state_t * ); +void r4300i_LD ( usf_state_t * ); +void r4300i_SC ( usf_state_t * ); +void r4300i_SWC1 ( usf_state_t * ); +void r4300i_SDC1 ( usf_state_t * ); +void r4300i_SD ( usf_state_t * ); + +/********************** R4300i OpCodes: Special **********************/ +void r4300i_SPECIAL_SLL ( usf_state_t * ); +void r4300i_SPECIAL_SRL ( usf_state_t * ); +void r4300i_SPECIAL_SRA ( usf_state_t * ); +void r4300i_SPECIAL_SLLV ( usf_state_t * ); +void r4300i_SPECIAL_SRLV ( usf_state_t * ); +void r4300i_SPECIAL_SRAV ( usf_state_t * ); +void r4300i_SPECIAL_JR ( usf_state_t * ); +void r4300i_SPECIAL_JALR ( usf_state_t * ); +void r4300i_SPECIAL_SYSCALL ( usf_state_t * ); +void r4300i_SPECIAL_BREAK ( usf_state_t * ); +void r4300i_SPECIAL_SYNC ( usf_state_t * ); +void r4300i_SPECIAL_MFHI ( usf_state_t * ); +void r4300i_SPECIAL_MTHI ( usf_state_t * ); +void r4300i_SPECIAL_MFLO ( usf_state_t * ); +void r4300i_SPECIAL_MTLO ( usf_state_t * ); +void r4300i_SPECIAL_DSLLV ( usf_state_t * ); +void r4300i_SPECIAL_DSRLV ( usf_state_t * ); +void r4300i_SPECIAL_DSRAV ( usf_state_t * ); +void r4300i_SPECIAL_MULT ( usf_state_t * ); +void r4300i_SPECIAL_MULTU ( usf_state_t * ); +void r4300i_SPECIAL_DIV ( usf_state_t * ); +void r4300i_SPECIAL_DIVU ( usf_state_t * ); +void r4300i_SPECIAL_DMULT ( usf_state_t * ); +void r4300i_SPECIAL_DMULTU ( usf_state_t * ); +void r4300i_SPECIAL_DDIV ( usf_state_t * ); +void r4300i_SPECIAL_DDIVU ( usf_state_t * ); +void r4300i_SPECIAL_ADD ( usf_state_t * ); +void r4300i_SPECIAL_ADDU ( usf_state_t * ); +void r4300i_SPECIAL_SUB ( usf_state_t * ); +void r4300i_SPECIAL_SUBU ( usf_state_t * ); +void r4300i_SPECIAL_AND ( usf_state_t * ); +void r4300i_SPECIAL_OR ( usf_state_t * ); +void r4300i_SPECIAL_XOR ( usf_state_t * ); +void r4300i_SPECIAL_NOR ( usf_state_t * ); +void r4300i_SPECIAL_SLT ( usf_state_t * ); +void r4300i_SPECIAL_SLTU ( usf_state_t * ); +void r4300i_SPECIAL_DADD ( usf_state_t * ); +void r4300i_SPECIAL_DADDU ( usf_state_t * ); +void r4300i_SPECIAL_DSUB ( usf_state_t * ); +void r4300i_SPECIAL_DSUBU ( usf_state_t * ); +void r4300i_SPECIAL_TEQ ( usf_state_t * ); +void r4300i_SPECIAL_DSLL ( usf_state_t * ); +void r4300i_SPECIAL_DSRL ( usf_state_t * ); +void r4300i_SPECIAL_DSRA ( usf_state_t * ); +void r4300i_SPECIAL_DSLL32 ( usf_state_t * ); +void r4300i_SPECIAL_DSRL32 ( usf_state_t * ); +void r4300i_SPECIAL_DSRA32 ( usf_state_t * ); + +/********************** R4300i OpCodes: RegImm **********************/ +void r4300i_REGIMM_BLTZ ( usf_state_t * ); +void r4300i_REGIMM_BGEZ ( usf_state_t * ); +void r4300i_REGIMM_BLTZL ( usf_state_t * ); +void r4300i_REGIMM_BGEZL ( usf_state_t * ); +void r4300i_REGIMM_BLTZAL ( usf_state_t * ); +void r4300i_REGIMM_BGEZAL ( usf_state_t * ); + +/************************** COP0 functions **************************/ +void r4300i_COP0_MF ( usf_state_t * ); +void r4300i_COP0_MT ( usf_state_t * ); + +/************************** COP0 CO functions ***********************/ +void r4300i_COP0_CO_TLBR ( usf_state_t * ); +void r4300i_COP0_CO_TLBWI ( usf_state_t * ); +void r4300i_COP0_CO_TLBWR ( usf_state_t * ); +void r4300i_COP0_CO_TLBP ( usf_state_t * ); +void r4300i_COP0_CO_ERET ( usf_state_t * ); + +/************************** COP1 functions **************************/ +void r4300i_COP1_MF ( usf_state_t * ); +void r4300i_COP1_DMF ( usf_state_t * ); +void r4300i_COP1_CF ( usf_state_t * ); +void r4300i_COP1_MT ( usf_state_t * ); +void r4300i_COP1_DMT ( usf_state_t * ); +void r4300i_COP1_CT ( usf_state_t * ); + +/************************* COP1: BC1 functions ***********************/ +void r4300i_COP1_BCF ( usf_state_t * ); +void r4300i_COP1_BCT ( usf_state_t * ); +void r4300i_COP1_BCFL ( usf_state_t * ); +void r4300i_COP1_BCTL ( usf_state_t * ); + +/************************** COP1: S functions ************************/ +void r4300i_COP1_S_ADD ( usf_state_t * ); +void r4300i_COP1_S_SUB ( usf_state_t * ); +void r4300i_COP1_S_MUL ( usf_state_t * ); +void r4300i_COP1_S_DIV ( usf_state_t * ); +void r4300i_COP1_S_SQRT ( usf_state_t * ); +void r4300i_COP1_S_ABS ( usf_state_t * ); +void r4300i_COP1_S_MOV ( usf_state_t * ); +void r4300i_COP1_S_NEG ( usf_state_t * ); +void r4300i_COP1_S_TRUNC_L ( usf_state_t * ); +void r4300i_COP1_S_CEIL_L ( usf_state_t * ); //added by Witten +void r4300i_COP1_S_FLOOR_L ( usf_state_t * ); //added by Witten +void r4300i_COP1_S_ROUND_W ( usf_state_t * ); +void r4300i_COP1_S_TRUNC_W ( usf_state_t * ); +void r4300i_COP1_S_CEIL_W ( usf_state_t * ); //added by Witten +void r4300i_COP1_S_FLOOR_W ( usf_state_t * ); +void r4300i_COP1_S_CVT_D ( usf_state_t * ); +void r4300i_COP1_S_CVT_W ( usf_state_t * ); +void r4300i_COP1_S_CVT_L ( usf_state_t * ); +void r4300i_COP1_S_CMP ( usf_state_t * ); + +/************************** COP1: D functions ************************/ +void r4300i_COP1_D_ADD ( usf_state_t * ); +void r4300i_COP1_D_SUB ( usf_state_t * ); +void r4300i_COP1_D_MUL ( usf_state_t * ); +void r4300i_COP1_D_DIV ( usf_state_t * ); +void r4300i_COP1_D_SQRT ( usf_state_t * ); +void r4300i_COP1_D_ABS ( usf_state_t * ); +void r4300i_COP1_D_MOV ( usf_state_t * ); +void r4300i_COP1_D_NEG ( usf_state_t * ); +void r4300i_COP1_D_TRUNC_L ( usf_state_t * ); //added by Witten +void r4300i_COP1_D_CEIL_L ( usf_state_t * ); //added by Witten +void r4300i_COP1_D_FLOOR_L ( usf_state_t * ); //added by Witten +void r4300i_COP1_D_ROUND_W ( usf_state_t * ); +void r4300i_COP1_D_TRUNC_W ( usf_state_t * ); +void r4300i_COP1_D_CEIL_W ( usf_state_t * ); //added by Witten +void r4300i_COP1_D_FLOOR_W ( usf_state_t * ); //added by Witten +void r4300i_COP1_D_CVT_S ( usf_state_t * ); +void r4300i_COP1_D_CVT_W ( usf_state_t * ); +void r4300i_COP1_D_CVT_L ( usf_state_t * ); +void r4300i_COP1_D_CMP ( usf_state_t * ); + +/************************** COP1: W functions ************************/ +void r4300i_COP1_W_CVT_S ( usf_state_t * ); +void r4300i_COP1_W_CVT_D ( usf_state_t * ); + +/************************** COP1: L functions ************************/ +void r4300i_COP1_L_CVT_S ( usf_state_t * ); +void r4300i_COP1_L_CVT_D ( usf_state_t * ); + +/************************** Other functions **************************/ +void R4300i_UnknownOpcode ( usf_state_t * ); diff --git a/Frameworks/lazyusf/lazyusf/main.c b/Frameworks/lazyusf/lazyusf/main.c new file mode 100644 index 000000000..bcc55f390 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/main.c @@ -0,0 +1,37 @@ + +#include +#include +#include +#include +#include "usf.h" +#include "cpu.h" +#include "memory.h" + +#include "usf_internal.h" + +void StopEmulation(usf_state_t * state) +{ + //asm("int $3"); + //printf("Arrivederci!\n\n"); + //Release_Memory(); + //exit(0); + state->cpu_running = 0; +} + +void DisplayError (usf_state_t * state, char * Message, ...) { + va_list ap; + + size_t len = strlen( state->error_message ); + + if ( len ) + state->error_message[ len++ ] = '\n'; + + va_start( ap, Message ); + vsprintf( state->error_message + len, Message, ap ); + va_end( ap ); + + state->last_error = state->error_message; + StopEmulation( state ); + + //printf("Error: %s\n", Msg); +} diff --git a/Frameworks/lazyusf/lazyusf/main.h b/Frameworks/lazyusf/lazyusf/main.h new file mode 100644 index 000000000..df5ea9c23 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/main.h @@ -0,0 +1,6 @@ +#include + +#include "usf.h" + +void DisplayError (usf_state_t *, char * Message, ...); +void StopEmulation(usf_state_t *); diff --git a/Frameworks/lazyusf/lazyusf/memory.c b/Frameworks/lazyusf/lazyusf/memory.c new file mode 100644 index 000000000..444e501f8 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/memory.c @@ -0,0 +1,839 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#include +#include +#include + +#include "usf.h" +#include "main.h" +#include "cpu.h" +#include "audio.h" +#include "rsp.h" + +#include "usf_internal.h" + +uint8_t * PageROM(usf_state_t * state, uint32_t addr) { + return (state->ROMPages[addr/0x10000])?state->ROMPages[addr/0x10000]+(addr%0x10000):&state->EmptySpace; +} + +void * large_alloc(size_t); +void large_free(void *, size_t); + +#ifdef _WIN32 +#include + +void * large_alloc(size_t size) +{ + return VirtualAlloc( NULL, size, MEM_RESERVE | MEM_COMMIT, PAGE_READWRITE ); +} + +void large_free(void * p, size_t size) +{ + VirtualFree( p, size, MEM_RELEASE ); +} +#else +#include + +#ifdef __APPLE__ +#define MAP_ANONYMOUS MAP_ANON +#endif + +void * large_alloc(size_t size) +{ + return mmap(NULL, size, PROT_READ | PROT_WRITE, MAP_PRIVATE | MAP_ANONYMOUS, -1, 0); +} + +void large_free(void * p, size_t size) +{ + munmap( p, size ); +} +#endif + +int32_t Allocate_Memory ( void * state ) { + //uint32_t i = 0; + //RdramSize = 0x800000; + + // Allocate the N64MEM and TLB_Map so that they are in each others 4GB range + // Also put the registers there :) + + + // the mmap technique works craptacular when the regions don't overlay + + USF_STATE->MemChunk = (uint8_t *) large_alloc( 0x100000 * sizeof(uintptr_t) + 0x1D000 + USF_STATE->RdramSize ); + + USF_STATE->TLB_Map = (uintptr_t*)USF_STATE->MemChunk; + if (USF_STATE->TLB_Map == NULL) { + return 0; + } + + memset(USF_STATE->TLB_Map, 0, 0x100000 * sizeof(uintptr_t) + 0x10000); + + USF_STATE->N64MEM = USF_STATE->MemChunk + 0x100000 * sizeof(uintptr_t) + 0x10000; + if(USF_STATE->N64MEM == NULL) { + DisplayError(USF_STATE, "Failed to allocate N64MEM"); + return 0; + } + + //memset(state->N64MEM, 0, USF_STATE->RdramSize); + + USF_STATE->NOMEM = USF_STATE->N64MEM + USF_STATE->RdramSize; + + //if(USF_STATE->RdramSize == 0x400000) + //{ + // munmap(N64MEM + 0x400000, 0x400000); + //} + + USF_STATE->Registers = (N64_REGISTERS *)((uintptr_t)USF_STATE->MemChunk + 0x100000 * sizeof(uintptr_t)); + //USF_STATE->TLBLoadAddress = (uint32_t *)((uintptr_t)USF_STATE->Registers + 0x500); + //USF_STATE->Timers = (SYSTEM_TIMERS*)(USF_STATE->TLBLoadAddress + 4); + USF_STATE->Timers = (SYSTEM_TIMERS*)((uintptr_t)USF_STATE->Registers + 0x500); + USF_STATE->WaitMode = (uint32_t *)(USF_STATE->Timers + sizeof(SYSTEM_TIMERS)); + USF_STATE->CPU_Action = (CPU_ACTION *)(USF_STATE->WaitMode + 4); + //USF_STATE->RSP_GPR = (struct RSP_GPR_TYPE *)(USF_STATE->CPU_Action + sizeof(CPU_ACTION)); + //USF_STATE->DMEM = (uint8_t *)(USF_STATE->RSP_GPR + (32 * 16)); + USF_STATE->DMEM = (uint8_t *)(USF_STATE->CPU_Action + sizeof(CPU_ACTION)); + //state->RSP_ACCUM = (struct RSP_ACCUM_TYPE *)(USF_STATE->DMEM + 0x2000); + + USF_STATE->RDRAM = (uint8_t *)(USF_STATE->N64MEM); + USF_STATE->IMEM = USF_STATE->DMEM + 0x1000; + + USF_STATE->MemoryState = 1; + + return 1; +} + +int PreAllocate_Memory(usf_state_t * state) { + int i = 0; + + // Moved the savestate allocation here :) (for better management later) + state->savestatespace = (uint8_t *) malloc(0x80275C); + + if(state->savestatespace == 0) + return 0; + + memset(state->savestatespace, 0, 0x80275C); + + for (i = 0; i < 0x400; i++) { + state->ROMPages[i] = 0; + } + + return 1; +} + +void Release_Memory ( usf_state_t * state ) { + uint32_t i; + + for (i = 0; i < 0x400; i++) { + if (state->ROMPages[i]) { + free(state->ROMPages[i]); state->ROMPages[i] = 0; + } + } + //printf("Freeing memory\n"); + + state->MemoryState = 0; + + if (state->MemChunk != 0) { large_free( state->MemChunk, 0x100000 * sizeof(uintptr_t) + 0x1D000 + state->RdramSize ); state->MemChunk=0; } + + if(state->cpu_hle_entries) + free(state->cpu_hle_entries); + state->cpu_hle_entries = NULL; + + if(state->savestatespace) + free(state->savestatespace); + state->savestatespace = NULL; +} + + +int32_t r4300i_LB_NonMemory ( usf_state_t * state, uint32_t PAddr, uint32_t * Value, uint32_t SignExtend ) { + if (PAddr >= 0x10000000 && PAddr < 0x16000000) { + if (state->WrittenToRom) { return 0; } + if ((PAddr & 2) == 0) { PAddr = (PAddr + 4) ^ 2; } + if ((PAddr - 0x10000000) < state->RomFileSize) { + if (SignExtend) { + *Value = (char)*PageROM(state, (PAddr - 0x10000000)^3); + + } else { + *Value = *PageROM(state, (PAddr - 0x10000000)^3); + } + return 1; + } else { + *Value = 0; + return 0; + } + } + + switch (PAddr & 0xFFF00000) { + default: + * Value = 0; + return 0; + break; + } + return 1; +} + +uint32_t r4300i_LB_VAddr ( usf_state_t * state, uint32_t VAddr, uint8_t * Value ) { + uintptr_t address; + address = state->TLB_Map[VAddr >> 12]; + if (address == 0) { return 0; } + *Value = *(uint8_t *)(address + (VAddr ^ 3)); + return 1; +} + +uint32_t r4300i_LD_VAddr ( usf_state_t * state, uint32_t VAddr, uint64_t * Value ) { + uintptr_t address; + address = state->TLB_Map[VAddr >> 12]; + if (address == 0) { return 0; } + if (address + VAddr + 7 - (uintptr_t)state->N64MEM >= state->RdramSize) + { + *((uint32_t *)(Value) + 1) = 0; + *((uint32_t *)(Value)) = 0; + return 1; + } + *((uint32_t *)(Value) + 1) = *(uint32_t *)(address + VAddr); + *((uint32_t *)(Value)) = *(uint32_t *)(address + VAddr + 4); + return 1; +} + +int32_t r4300i_LH_NonMemory ( usf_state_t * state, uint32_t PAddr, uint32_t * Value, int32_t SignExtend ) { + (void)state; + (void)SignExtend; + switch (PAddr & 0xFFF00000) { + default: + * Value = 0; + return 0; + break; + } + return 1; +} + +uint32_t r4300i_LH_VAddr ( usf_state_t * state, uint32_t VAddr, uint16_t * Value ) { + uintptr_t address; + address = state->TLB_Map[VAddr >> 12]; + if (address == 0) + return 0; + if (address + (VAddr ^ 2) + 1 - (uintptr_t)state->N64MEM >= state->RdramSize) + { + *Value = 0; + return 1; + } + *Value = *(uint16_t *)(address + (VAddr ^ 2)); + return 1; +} + +int32_t r4300i_LW_NonMemory ( usf_state_t * state, uint32_t PAddr, uint32_t * Value ) { + if (PAddr >= 0x10000000 && PAddr < 0x16000000) { + if (state->WrittenToRom) { + *Value = state->WroteToRom; + //LogMessage("%X: Read crap from Rom %X from %X",PROGRAM_COUNTER,*Value,PAddr); + state->WrittenToRom = 0; + return 1; + } + if ((PAddr - 0x10000000) < state->RomFileSize) { + *Value = *(uint32_t *)PageROM(state, (PAddr - 0x10000000)); + return 1; + } else { + *Value = PAddr & 0xFFFF; + *Value = (*Value << 16) | *Value; + return 0; + } + } + + switch (PAddr & 0xFFF00000) { + case 0x03F00000: + switch (PAddr) { + case 0x03F00000: * Value = RDRAM_CONFIG_REG; break; + case 0x03F00004: * Value = RDRAM_DEVICE_ID_REG; break; + case 0x03F00008: * Value = RDRAM_DELAY_REG; break; + case 0x03F0000C: * Value = RDRAM_MODE_REG; break; + case 0x03F00010: * Value = RDRAM_REF_INTERVAL_REG; break; + case 0x03F00014: * Value = RDRAM_REF_ROW_REG; break; + case 0x03F00018: * Value = RDRAM_RAS_INTERVAL_REG; break; + case 0x03F0001C: * Value = RDRAM_MIN_INTERVAL_REG; break; + case 0x03F00020: * Value = RDRAM_ADDR_SELECT_REG; break; + case 0x03F00024: * Value = RDRAM_DEVICE_MANUF_REG; break; + default: + * Value = 0; + return 0; + } + break; + case 0x04000000: + switch (PAddr) { + case 0x04040010: *Value = SP_STATUS_REG; break; + case 0x04040014: *Value = SP_DMA_FULL_REG; break; + case 0x04040018: *Value = SP_DMA_BUSY_REG; break; + case 0x04080000: *Value = SP_PC_REG; break; + default: + * Value = 0; + return 0; + } + break; + case 0x04100000: + switch (PAddr) { + case 0x0410000C: *Value = DPC_STATUS_REG; break; + case 0x04100010: *Value = DPC_CLOCK_REG; break; + case 0x04100014: *Value = DPC_BUFBUSY_REG; break; + case 0x04100018: *Value = DPC_PIPEBUSY_REG; break; + case 0x0410001C: *Value = DPC_TMEM_REG; break; + default: + * Value = 0; + return 0; + } + break; + case 0x04300000: + switch (PAddr) { + case 0x04300000: * Value = MI_MODE_REG; break; + case 0x04300004: * Value = MI_VERSION_REG; break; + case 0x04300008: * Value = MI_INTR_REG; break; + case 0x0430000C: * Value = MI_INTR_MASK_REG; break; + default: + * Value = 0; + return 0; + } + break; + case 0x04400000: + switch (PAddr) { + case 0x04400000: *Value = VI_STATUS_REG; break; + case 0x04400004: *Value = VI_ORIGIN_REG; break; + case 0x04400008: *Value = VI_WIDTH_REG; break; + case 0x0440000C: *Value = VI_INTR_REG; break; + case 0x04400010: + *Value = 0; + break; + case 0x04400014: *Value = VI_BURST_REG; break; + case 0x04400018: *Value = VI_V_SYNC_REG; break; + case 0x0440001C: *Value = VI_H_SYNC_REG; break; + case 0x04400020: *Value = VI_LEAP_REG; break; + case 0x04400024: *Value = VI_H_START_REG; break; + case 0x04400028: *Value = VI_V_START_REG ; break; + case 0x0440002C: *Value = VI_V_BURST_REG; break; + case 0x04400030: *Value = VI_X_SCALE_REG; break; + case 0x04400034: *Value = VI_Y_SCALE_REG; break; + default: + * Value = 0; + return 0; + } + break; + case 0x04500000: + switch (PAddr) { + case 0x04500004: *Value = AiReadLength(state); break; + case 0x0450000C: *Value = AI_STATUS_REG; break; + default: + * Value = 0; + return 0; + } + break; + case 0x04600000: + switch (PAddr) { + case 0x04600010: *Value = PI_STATUS_REG; break; + case 0x04600014: *Value = PI_DOMAIN1_REG; break; + case 0x04600018: *Value = PI_BSD_DOM1_PWD_REG; break; + case 0x0460001C: *Value = PI_BSD_DOM1_PGS_REG; break; + case 0x04600020: *Value = PI_BSD_DOM1_RLS_REG; break; + case 0x04600024: *Value = PI_DOMAIN2_REG; break; + case 0x04600028: *Value = PI_BSD_DOM2_PWD_REG; break; + case 0x0460002C: *Value = PI_BSD_DOM2_PGS_REG; break; + case 0x04600030: *Value = PI_BSD_DOM2_RLS_REG; break; + default: + * Value = 0; + return 0; + } + break; + case 0x04700000: + switch (PAddr) { + case 0x04700000: * Value = RI_MODE_REG; break; + case 0x04700004: * Value = RI_CONFIG_REG; break; + case 0x04700008: * Value = RI_CURRENT_LOAD_REG; break; + case 0x0470000C: * Value = RI_SELECT_REG; break; + case 0x04700010: * Value = RI_REFRESH_REG; break; + case 0x04700014: * Value = RI_LATENCY_REG; break; + case 0x04700018: * Value = RI_RERROR_REG; break; + case 0x0470001C: * Value = RI_WERROR_REG; break; + default: + * Value = 0; + return 0; + } + break; + case 0x04800000: + switch (PAddr) { + case 0x04800018: *Value = SI_STATUS_REG; break; + default: + *Value = 0; + return 0; + } + break; + case 0x05000000: + *Value = PAddr & 0xFFFF; + *Value = (*Value << 16) | *Value; + return 0; + case 0x08000000: + *Value = 0; + break; + default: + *Value = PAddr & 0xFFFF; + *Value = (*Value << 16) | *Value; + return 0; + break; + } + return 1; +} + +void r4300i_LW_PAddr ( usf_state_t * state, uint32_t PAddr, uint32_t * Value ) { + *Value = *(uint32_t *)(state->N64MEM+PAddr); +} + +uint32_t r4300i_LW_VAddr ( usf_state_t * state, uint32_t VAddr, uint32_t * Value ) { + uintptr_t address = state->TLB_Map[VAddr >> 12]; + if (address == 0) + return 0; + + address += VAddr; + + if((address - (uintptr_t)state->RDRAM) > state->RdramSize) { + address = address - (uintptr_t)state->RDRAM; + return r4300i_LW_NonMemory(state, (uint32_t) address, Value); + } + *Value = *(uint32_t *)address; + return 1; +} + +int32_t r4300i_SB_NonMemory ( usf_state_t * state, uint32_t PAddr, uint8_t Value ) { + switch (PAddr & 0xFFF00000) { + case 0x00000000: + case 0x00100000: + case 0x00200000: + case 0x00300000: + case 0x00400000: + case 0x00500000: + case 0x00600000: + case 0x00700000: + if (PAddr < state->RdramSize) { + *(uint8_t *)(state->N64MEM+PAddr) = Value; + } + break; + default: + return 0; + break; + } + return 1; +} + +uint32_t r4300i_SB_VAddr ( usf_state_t * state, uint32_t VAddr, uint8_t Value ) { + uintptr_t address; + address = state->TLB_Map[VAddr >> 12]; + + if (address == 0) { return 0; } + if (address + (VAddr ^ 3) - (uintptr_t)state->N64MEM < state->RdramSize) + *(uint8_t *)(address + (VAddr ^ 3)) = Value; + + return 1; +} + +int32_t r4300i_SH_NonMemory ( usf_state_t * state, uint32_t PAddr, uint16_t Value ) { + switch (PAddr & 0xFFF00000) { + case 0x00000000: + case 0x00100000: + case 0x00200000: + case 0x00300000: + case 0x00400000: + case 0x00500000: + case 0x00600000: + case 0x00700000: + if (PAddr < state->RdramSize) { + *(uint16_t *)(state->N64MEM+PAddr) = Value; + } + break; + default: + return 0; + break; + } + return 1; +} + +uint32_t r4300i_SD_VAddr ( usf_state_t * state, uint32_t VAddr, uint64_t Value ) { + uintptr_t address; + address = state->TLB_Map[VAddr >> 12]; + if (address == 0) { return 0; } + if (address + VAddr + 7 - (uintptr_t)state->N64MEM < state->RdramSize) + { + *(uint32_t *)(address + VAddr) = *((uint32_t *)(&Value) + 1); + *(uint32_t *)(address + VAddr + 4) = *((uint32_t *)(&Value)); + } + return 1; +} + +uint32_t r4300i_SH_VAddr ( usf_state_t * state, uint32_t VAddr, uint16_t Value ) { + uintptr_t address; + address = state->TLB_Map[VAddr >> 12]; + + if (address == 0) { return 0; } + if (address + 1 + (VAddr ^ 2) - (uintptr_t)state->N64MEM < state->RdramSize) + *(uint16_t *)(address + (VAddr ^ 2)) = Value; + return 1; +} + +int32_t r4300i_SW_NonMemory ( usf_state_t * state, uint32_t PAddr, uint32_t Value ) { + if (PAddr >= 0x10000000 && PAddr < 0x16000000) { + if ((PAddr - 0x10000000) < state->RomFileSize) { + state->WrittenToRom = 1; + state->WroteToRom = Value; + } else { + return 0; + } + } + + switch (PAddr & 0xFFF00000) { + case 0x00000000: + case 0x00100000: + case 0x00200000: + case 0x00300000: + case 0x00400000: + case 0x00500000: + case 0x00600000: + case 0x00700000: + if (PAddr < state->RdramSize) { + *(uint32_t *)(state->N64MEM+PAddr) = Value; + } + break; + case 0x03F00000: + switch (PAddr) { + case 0x03F00000: RDRAM_CONFIG_REG = Value; break; + case 0x03F00004: RDRAM_DEVICE_ID_REG = Value; break; + case 0x03F00008: RDRAM_DELAY_REG = Value; break; + case 0x03F0000C: RDRAM_MODE_REG = Value; break; + case 0x03F00010: RDRAM_REF_INTERVAL_REG = Value; break; + case 0x03F00014: RDRAM_REF_ROW_REG = Value; break; + case 0x03F00018: RDRAM_RAS_INTERVAL_REG = Value; break; + case 0x03F0001C: RDRAM_MIN_INTERVAL_REG = Value; break; + case 0x03F00020: RDRAM_ADDR_SELECT_REG = Value; break; + case 0x03F00024: RDRAM_DEVICE_MANUF_REG = Value; break; + case 0x03F04004: break; + case 0x03F08004: break; + case 0x03F80004: break; + case 0x03F80008: break; + case 0x03F8000C: break; + case 0x03F80014: break; + default: + return 0; + } + break; + case 0x04000000: + if (PAddr < 0x04002000) { + *(uint32_t *)(state->N64MEM+PAddr) = Value; + return 1; + } + switch (PAddr) { + case 0x04040000: SP_MEM_ADDR_REG = Value; break; + case 0x04040004: SP_DRAM_ADDR_REG = Value; break; + case 0x04040008: + SP_RD_LEN_REG = Value; + SP_DMA_READ(state); + break; + case 0x0404000C: + SP_WR_LEN_REG = Value; + SP_DMA_WRITE(state); + break; + case 0x04040010: + if ( ( Value & SP_CLR_HALT ) != 0) { SP_STATUS_REG &= ~SP_STATUS_HALT; } + if ( ( Value & SP_SET_HALT ) != 0) { SP_STATUS_REG |= SP_STATUS_HALT; } + if ( ( Value & SP_CLR_BROKE ) != 0) { SP_STATUS_REG &= ~SP_STATUS_BROKE; } + if ( ( Value & SP_CLR_INTR ) != 0) { + MI_INTR_REG &= ~MI_INTR_SP; + CheckInterrupts(state); + } + if ( ( Value & SP_CLR_SSTEP ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SSTEP; } + if ( ( Value & SP_SET_SSTEP ) != 0) { SP_STATUS_REG |= SP_STATUS_SSTEP; } + if ( ( Value & SP_CLR_INTR_BREAK ) != 0) { SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; } + if ( ( Value & SP_SET_INTR_BREAK ) != 0) { SP_STATUS_REG |= SP_STATUS_INTR_BREAK; } + if ( ( Value & SP_CLR_SIG0 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG0; } + if ( ( Value & SP_SET_SIG0 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG0; } + if ( ( Value & SP_CLR_SIG1 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG1; } + if ( ( Value & SP_SET_SIG1 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG1; } + if ( ( Value & SP_CLR_SIG2 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG2; } + if ( ( Value & SP_SET_SIG2 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG2; } + if ( ( Value & SP_CLR_SIG3 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG3; } + if ( ( Value & SP_SET_SIG3 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG3; } + if ( ( Value & SP_CLR_SIG4 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG4; } + if ( ( Value & SP_SET_SIG4 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG4; } + if ( ( Value & SP_CLR_SIG5 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG5; } + if ( ( Value & SP_SET_SIG5 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG5; } + if ( ( Value & SP_CLR_SIG6 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG6; } + if ( ( Value & SP_SET_SIG6 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG6; } + if ( ( Value & SP_CLR_SIG7 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG7; } + if ( ( Value & SP_SET_SIG7 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG7; } + + RunRsp(state); + + break; + case 0x0404001C: SP_SEMAPHORE_REG = 0; break; + case 0x04080000: SP_PC_REG = Value & 0xFFC; break; + default: + return 0; + } + break; + case 0x04100000: + switch (PAddr) { + case 0x04100000: + DPC_START_REG = Value; + DPC_CURRENT_REG = Value; + break; + case 0x04100004: + DPC_END_REG = Value; + break; + case 0x04100008: DPC_CURRENT_REG = Value; break; + case 0x0410000C: + if ( ( Value & DPC_CLR_XBUS_DMEM_DMA ) != 0) { DPC_STATUS_REG &= ~DPC_STATUS_XBUS_DMEM_DMA; } + if ( ( Value & DPC_SET_XBUS_DMEM_DMA ) != 0) { DPC_STATUS_REG |= DPC_STATUS_XBUS_DMEM_DMA; } + if ( ( Value & DPC_CLR_FREEZE ) != 0) { DPC_STATUS_REG &= ~DPC_STATUS_FREEZE; } + if ( ( Value & DPC_SET_FREEZE ) != 0) { DPC_STATUS_REG |= DPC_STATUS_FREEZE; } + if ( ( Value & DPC_CLR_FLUSH ) != 0) { DPC_STATUS_REG &= ~DPC_STATUS_FLUSH; } + if ( ( Value & DPC_SET_FLUSH ) != 0) { DPC_STATUS_REG |= DPC_STATUS_FLUSH; } + if ( ( Value & DPC_CLR_FREEZE ) != 0) + { + if ( ( SP_STATUS_REG & SP_STATUS_HALT ) == 0) + { + if ( ( SP_STATUS_REG & SP_STATUS_BROKE ) == 0 ) + { + RunRsp(state); + } + } + } + break; + default: + return 0; + } + break; + case 0x04300000: + switch (PAddr) { + case 0x04300000: + MI_MODE_REG &= ~0x7F; + MI_MODE_REG |= (Value & 0x7F); + if ( ( Value & MI_CLR_INIT ) != 0 ) { MI_MODE_REG &= ~MI_MODE_INIT; } + if ( ( Value & MI_SET_INIT ) != 0 ) { MI_MODE_REG |= MI_MODE_INIT; } + if ( ( Value & MI_CLR_EBUS ) != 0 ) { MI_MODE_REG &= ~MI_MODE_EBUS; } + if ( ( Value & MI_SET_EBUS ) != 0 ) { MI_MODE_REG |= MI_MODE_EBUS; } + if ( ( Value & MI_CLR_DP_INTR ) != 0 ) { + MI_INTR_REG &= ~MI_INTR_DP; + CheckInterrupts(state); + } + if ( ( Value & MI_CLR_RDRAM ) != 0 ) { MI_MODE_REG &= ~MI_MODE_RDRAM; } + if ( ( Value & MI_SET_RDRAM ) != 0 ) { MI_MODE_REG |= MI_MODE_RDRAM; } + break; + case 0x0430000C: + if ( ( Value & MI_INTR_MASK_CLR_SP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; } + if ( ( Value & MI_INTR_MASK_SET_SP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SP; } + if ( ( Value & MI_INTR_MASK_CLR_SI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; } + if ( ( Value & MI_INTR_MASK_SET_SI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SI; } + if ( ( Value & MI_INTR_MASK_CLR_AI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; } + if ( ( Value & MI_INTR_MASK_SET_AI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_AI; } + if ( ( Value & MI_INTR_MASK_CLR_VI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; } + if ( ( Value & MI_INTR_MASK_SET_VI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_VI; } + if ( ( Value & MI_INTR_MASK_CLR_PI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; } + if ( ( Value & MI_INTR_MASK_SET_PI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_PI; } + if ( ( Value & MI_INTR_MASK_CLR_DP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; } + if ( ( Value & MI_INTR_MASK_SET_DP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_DP; } + break; + default: + return 0; + } + break; + case 0x04400000: + switch (PAddr) { + case 0x04400000: + //if (VI_STATUS_REG != Value) { + VI_STATUS_REG = Value; + // if (ViStatusChanged != NULL ) { ViStatusChanged(); } + //} + break; + case 0x04400004: + + VI_ORIGIN_REG = (Value & 0xFFFFFF); + //if (UpdateScreen != NULL ) { UpdateScreen(); } + break; + case 0x04400008: + //if (VI_WIDTH_REG != Value) { + VI_WIDTH_REG = Value; + // if (ViWidthChanged != NULL ) { ViWidthChanged(); } + //} + break; + case 0x0440000C: VI_INTR_REG = Value; break; + case 0x04400010: + MI_INTR_REG &= ~MI_INTR_VI; + CheckInterrupts(state); + break; + case 0x04400014: VI_BURST_REG = Value; break; + case 0x04400018: VI_V_SYNC_REG = Value; break; + case 0x0440001C: VI_H_SYNC_REG = Value; break; + case 0x04400020: VI_LEAP_REG = Value; break; + case 0x04400024: VI_H_START_REG = Value; break; + case 0x04400028: VI_V_START_REG = Value; break; + case 0x0440002C: VI_V_BURST_REG = Value; break; + case 0x04400030: VI_X_SCALE_REG = Value; break; + case 0x04400034: VI_Y_SCALE_REG = Value; break; + default: + return 0; + } + break; + case 0x04500000: + switch (PAddr) { + case 0x04500000: AI_DRAM_ADDR_REG = Value; break; + case 0x04500004: + AI_LEN_REG = Value; + AiLenChanged(state); + break; + case 0x04500008: AI_CONTROL_REG = (Value & 0x1); break; + case 0x0450000C: + /* Clear Interrupt */; + MI_INTR_REG &= ~MI_INTR_AI; + state->AudioIntrReg &= ~MI_INTR_AI; + CheckInterrupts(state); + break; + case 0x04500010: + AI_DACRATE_REG = Value; + //if (AiDacrateChanged != NULL) { AiDacrateChanged(SYSTEM_NTSC); } + break; + case 0x04500014: AI_BITRATE_REG = Value; break; + default: + return 0; + } + break; + case 0x04600000: + switch (PAddr) { + case 0x04600000: PI_DRAM_ADDR_REG = Value; break; + case 0x04600004: PI_CART_ADDR_REG = Value; break; + case 0x04600008: + PI_RD_LEN_REG = Value; + PI_DMA_READ(state); + break; + case 0x0460000C: + PI_WR_LEN_REG = Value; + PI_DMA_WRITE(state); + break; + case 0x04600010: + //if ((Value & PI_SET_RESET) != 0 ) { DisplayError(state, "reset Controller"); } + if ((Value & PI_CLR_INTR) != 0 ) { + MI_INTR_REG &= ~MI_INTR_PI; + CheckInterrupts(state); + } + break; + case 0x04600014: PI_DOMAIN1_REG = (Value & 0xFF); break; + case 0x04600018: PI_BSD_DOM1_PWD_REG = (Value & 0xFF); break; + case 0x0460001C: PI_BSD_DOM1_PGS_REG = (Value & 0xFF); break; + case 0x04600020: PI_BSD_DOM1_RLS_REG = (Value & 0xFF); break; + default: + return 0; + } + break; + case 0x04700000: + switch (PAddr) { + case 0x04700000: RI_MODE_REG = Value; break; + case 0x04700004: RI_CONFIG_REG = Value; break; + case 0x04700008: RI_CURRENT_LOAD_REG = Value; break; + case 0x0470000C: RI_SELECT_REG = Value; break; + case 0x04700010: RI_REFRESH_REG = Value; break; + case 0x04700014: RI_LATENCY_REG = Value; break; + case 0x04700018: RI_RERROR_REG = Value; break; + case 0x0470001C: RI_WERROR_REG = Value; break; + default: + return 0; + } + break; + case 0x04800000: + switch (PAddr) { + case 0x04800000: SI_DRAM_ADDR_REG = Value; break; + case 0x04800004: + SI_PIF_ADDR_RD64B_REG = Value; + SI_DMA_READ (state); + break; + case 0x04800010: + SI_PIF_ADDR_WR64B_REG = Value; + SI_DMA_WRITE(state); + break; + case 0x04800018: + MI_INTR_REG &= ~MI_INTR_SI; + SI_STATUS_REG &= ~SI_STATUS_INTERRUPT; + CheckInterrupts(state); + break; + default: + return 0; + } + break; + case 0x08000000: + if (PAddr != 0x08010000) { return 0; } + break; + case 0x1FC00000: + if (PAddr < 0x1FC007C0) { + return 0; + } else if (PAddr < 0x1FC00800) { + + if (PAddr == 0x1FC007FC) { + PifRamWrite(state); + } + return 1; + } + return 0; + break; + default: + return 0; + break; + } + return 1; +} + +uint32_t r4300i_SW_VAddr ( usf_state_t * state, uint32_t VAddr, uint32_t Value ) { + + uintptr_t address; + address = state->TLB_Map[VAddr >> 12]; + + if (address == 0) { return 0; } + address = (address + VAddr); + + if((address - (uintptr_t)state->RDRAM) > state->RdramSize) { + address = address - (uintptr_t)state->RDRAM; + return r4300i_SW_NonMemory(state, (uint32_t) address, Value); + } + *(uint32_t *)address = Value; + return 1; +} + +void memcpyn642n64(usf_state_t * state, uint32_t dest, uint32_t src, uint32_t len) +{ + uint32_t i; + uint32_t temp; + + for (i = 0; i < len; i += 4) + { + uintptr_t dstAddr = state->TLB_Map[(dest + i) >> 12]; + uintptr_t srcAddr = state->TLB_Map[(src + i) >> 12]; + + if (srcAddr) + temp = *(uint32_t*)(srcAddr + src + i); + else + temp = 0; + + if (dstAddr) + *(uint32_t*)(dstAddr + dest + i) = temp; + } +} diff --git a/Frameworks/lazyusf/lazyusf/memory.h b/Frameworks/lazyusf/lazyusf/memory.h new file mode 100644 index 000000000..5a2afdebb --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/memory.h @@ -0,0 +1,64 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#define LargeCompileBufferSize 0x03200000 +#define NormalCompileBufferSize 0x01500000 + +#define RSP_RECOMPMEM_SIZE 0x400000 +#define RSP_SECRECOMPMEM_SIZE 0x200000 + +#define ROM_IN_MAPSPACE + +#define PageRAM2(x) (state->N64MEM+(uint32_t)(x)) +#define PageVRAM(x) (state->TLB_Map[((uint32_t)(x))>>12]+(uint32_t)(x)) +#define PageVRAM2(x) (uint32_t)(PageVRAM(x)-(uintptr_t)state->N64MEM) + +/* Memory Control */ +int Allocate_Memory ( void * ); +void Release_Memory ( usf_state_t * ); +int PreAllocate_Memory( usf_state_t * ); + +/* CPU memory functions */ +//int r4300i_Command_MemoryFilter ( uint32_t dwExptCode, LPEXCEPTION_POINTERS lpEP ); +//int r4300i_CPU_MemoryFilter ( uint32_t dwExptCode, LPEXCEPTION_POINTERS lpEP ); +int32_t r4300i_LB_NonMemory ( usf_state_t *, uint32_t PAddr, uint32_t * Value, uint32_t SignExtend ); +uint32_t r4300i_LB_VAddr ( usf_state_t *, uint32_t VAddr, uint8_t * Value ); +uint32_t r4300i_LD_VAddr ( usf_state_t *, uint32_t VAddr, uint64_t * Value ); +int32_t r4300i_LH_NonMemory ( usf_state_t *, uint32_t PAddr, uint32_t * Value, int32_t SignExtend ); +uint32_t r4300i_LH_VAddr ( usf_state_t *, uint32_t VAddr, uint16_t * Value ); +int32_t r4300i_LW_NonMemory ( usf_state_t *, uint32_t PAddr, uint32_t * Value ); +void r4300i_LW_PAddr ( usf_state_t *, uint32_t PAddr, uint32_t * Value ); +uint32_t r4300i_LW_VAddr ( usf_state_t *, uint32_t VAddr, uint32_t * Value ); +int32_t r4300i_SB_NonMemory ( usf_state_t *, uint32_t PAddr, uint8_t Value ); +uint32_t r4300i_SB_VAddr ( usf_state_t *, uint32_t VAddr, uint8_t Value ); +uint32_t r4300i_SD_VAddr ( usf_state_t *, uint32_t VAddr, uint64_t Value ); +int32_t r4300i_SH_NonMemory ( usf_state_t *, uint32_t PAddr, uint16_t Value ); +uint32_t r4300i_SH_VAddr ( usf_state_t *, uint32_t VAddr, uint16_t Value ); +int32_t r4300i_SW_NonMemory ( usf_state_t *, uint32_t PAddr, uint32_t Value ); +uint32_t r4300i_SW_VAddr ( usf_state_t *, uint32_t VAddr, uint32_t Value ); + +uint8_t * PageROM(usf_state_t *, uint32_t addr); + +void memcpyn642n64(usf_state_t *, uint32_t dest, uint32_t src, uint32_t len); diff --git a/Frameworks/lazyusf/lazyusf/opcode.h b/Frameworks/lazyusf/lazyusf/opcode.h new file mode 100644 index 000000000..636f32374 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/opcode.h @@ -0,0 +1,274 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#ifndef __OpCode +#define __OpCode + +#include "types.h" + +typedef struct { + union { + + uint32_t Hex; + uint8_t Ascii[4]; + + struct { + unsigned offset : 16; + unsigned rt : 5; + unsigned rs : 5; + unsigned op : 6; + } b; + + struct { + unsigned immediate : 16; + unsigned : 5; + unsigned base : 5; + unsigned : 6; + } c; + + struct { + unsigned target : 26; + unsigned : 6; + } d; + + struct { + unsigned funct : 6; + unsigned sa : 5; + unsigned rd : 5; + unsigned : 5; + unsigned : 5; + unsigned : 6; + } e; + + struct { + unsigned : 6; + unsigned fd : 5; + unsigned fs : 5; + unsigned ft : 5; + unsigned fmt : 5; + unsigned : 6; + } f; + } u; + +} OPCODE; + +//R4300i OpCodes +#define R4300i_SPECIAL 0 +#define R4300i_REGIMM 1 +#define R4300i_J 2 +#define R4300i_JAL 3 +#define R4300i_BEQ 4 +#define R4300i_BNE 5 +#define R4300i_BLEZ 6 +#define R4300i_BGTZ 7 +#define R4300i_ADDI 8 +#define R4300i_ADDIU 9 +#define R4300i_SLTI 10 +#define R4300i_SLTIU 11 +#define R4300i_ANDI 12 +#define R4300i_ORI 13 +#define R4300i_XORI 14 +#define R4300i_LUI 15 +#define R4300i_CP0 16 +#define R4300i_CP1 17 +#define R4300i_BEQL 20 +#define R4300i_BNEL 21 +#define R4300i_BLEZL 22 +#define R4300i_BGTZL 23 +#define R4300i_DADDI 24 +#define R4300i_DADDIU 25 +#define R4300i_LDL 26 +#define R4300i_LDR 27 +#define R4300i_LB 32 +#define R4300i_LH 33 +#define R4300i_LWL 34 +#define R4300i_LW 35 +#define R4300i_LBU 36 +#define R4300i_LHU 37 +#define R4300i_LWR 38 +#define R4300i_LWU 39 +#define R4300i_SB 40 +#define R4300i_SH 41 +#define R4300i_SWL 42 +#define R4300i_SW 43 +#define R4300i_SDL 44 +#define R4300i_SDR 45 +#define R4300i_SWR 46 +#define R4300i_CACHE 47 +#define R4300i_LL 48 +#define R4300i_LWC1 49 +#define R4300i_LWC2 0x32 +#define R4300i_LLD 0x34 +#define R4300i_LDC1 53 +#define R4300i_LDC2 0x36 +#define R4300i_LD 55 +#define R4300i_SC 0x38 +#define R4300i_SWC1 57 +#define R4300i_SWC2 0x3A +#define R4300i_SCD 0x3C +#define R4300i_SDC1 61 +#define R4300i_SDC2 62 +#define R4300i_SD 63 + +/* R4300i Special opcodes */ +#define R4300i_SPECIAL_SLL 0 +#define R4300i_SPECIAL_SRL 2 +#define R4300i_SPECIAL_SRA 3 +#define R4300i_SPECIAL_SLLV 4 +#define R4300i_SPECIAL_SRLV 6 +#define R4300i_SPECIAL_SRAV 7 +#define R4300i_SPECIAL_JR 8 +#define R4300i_SPECIAL_JALR 9 +#define R4300i_SPECIAL_SYSCALL 12 +#define R4300i_SPECIAL_BREAK 13 +#define R4300i_SPECIAL_SYNC 15 +#define R4300i_SPECIAL_MFHI 16 +#define R4300i_SPECIAL_MTHI 17 +#define R4300i_SPECIAL_MFLO 18 +#define R4300i_SPECIAL_MTLO 19 +#define R4300i_SPECIAL_DSLLV 20 +#define R4300i_SPECIAL_DSRLV 22 +#define R4300i_SPECIAL_DSRAV 23 +#define R4300i_SPECIAL_MULT 24 +#define R4300i_SPECIAL_MULTU 25 +#define R4300i_SPECIAL_DIV 26 +#define R4300i_SPECIAL_DIVU 27 +#define R4300i_SPECIAL_DMULT 28 +#define R4300i_SPECIAL_DMULTU 29 +#define R4300i_SPECIAL_DDIV 30 +#define R4300i_SPECIAL_DDIVU 31 +#define R4300i_SPECIAL_ADD 32 +#define R4300i_SPECIAL_ADDU 33 +#define R4300i_SPECIAL_SUB 34 +#define R4300i_SPECIAL_SUBU 35 +#define R4300i_SPECIAL_AND 36 +#define R4300i_SPECIAL_OR 37 +#define R4300i_SPECIAL_XOR 38 +#define R4300i_SPECIAL_NOR 39 +#define R4300i_SPECIAL_SLT 42 +#define R4300i_SPECIAL_SLTU 43 +#define R4300i_SPECIAL_DADD 44 +#define R4300i_SPECIAL_DADDU 45 +#define R4300i_SPECIAL_DSUB 46 +#define R4300i_SPECIAL_DSUBU 47 +#define R4300i_SPECIAL_TGE 48 +#define R4300i_SPECIAL_TGEU 49 +#define R4300i_SPECIAL_TLT 50 +#define R4300i_SPECIAL_TLTU 51 +#define R4300i_SPECIAL_TEQ 52 +#define R4300i_SPECIAL_TNE 54 +#define R4300i_SPECIAL_DSLL 56 +#define R4300i_SPECIAL_DSRL 58 +#define R4300i_SPECIAL_DSRA 59 +#define R4300i_SPECIAL_DSLL32 60 +#define R4300i_SPECIAL_DSRL32 62 +#define R4300i_SPECIAL_DSRA32 63 + +/* R4300i RegImm opcodes */ +#define R4300i_REGIMM_BLTZ 0 +#define R4300i_REGIMM_BGEZ 1 +#define R4300i_REGIMM_BLTZL 2 +#define R4300i_REGIMM_BGEZL 3 +#define R4300i_REGIMM_TGEI 0x08 +#define R4300i_REGIMM_TGEIU 0x09 +#define R4300i_REGIMM_TLTI 0x0A +#define R4300i_REGIMM_TLTIU 0x0B +#define R4300i_REGIMM_TEQI 0x0C +#define R4300i_REGIMM_TNEI 0x0E +#define R4300i_REGIMM_BLTZAL 0x10 +#define R4300i_REGIMM_BGEZAL 17 +#define R4300i_REGIMM_BLTZALL 0x12 +#define R4300i_REGIMM_BGEZALL 0x13 + +/* R4300i COP0 opcodes */ +#define R4300i_COP0_MF 0 +#define R4300i_COP0_MT 4 + +/* R4300i COP0 CO opcodes */ +#define R4300i_COP0_CO_TLBR 1 +#define R4300i_COP0_CO_TLBWI 2 +#define R4300i_COP0_CO_TLBWR 6 +#define R4300i_COP0_CO_TLBP 8 +#define R4300i_COP0_CO_ERET 24 + +/* R4300i COP1 opcodes */ +#define R4300i_COP1_MF 0 +#define R4300i_COP1_DMF 1 +#define R4300i_COP1_CF 2 +#define R4300i_COP1_MT 4 +#define R4300i_COP1_DMT 5 +#define R4300i_COP1_CT 6 +#define R4300i_COP1_BC 8 +#define R4300i_COP1_S 16 +#define R4300i_COP1_D 17 +#define R4300i_COP1_W 20 +#define R4300i_COP1_L 21 + +/* R4300i COP1 BC opcodes */ +#define R4300i_COP1_BC_BCF 0 +#define R4300i_COP1_BC_BCT 1 +#define R4300i_COP1_BC_BCFL 2 +#define R4300i_COP1_BC_BCTL 3 + +#define R4300i_COP1_FUNCT_ADD 0 +#define R4300i_COP1_FUNCT_SUB 1 +#define R4300i_COP1_FUNCT_MUL 2 +#define R4300i_COP1_FUNCT_DIV 3 +#define R4300i_COP1_FUNCT_SQRT 4 +#define R4300i_COP1_FUNCT_ABS 5 +#define R4300i_COP1_FUNCT_MOV 6 +#define R4300i_COP1_FUNCT_NEG 7 +#define R4300i_COP1_FUNCT_ROUND_L 8 +#define R4300i_COP1_FUNCT_TRUNC_L 9 +#define R4300i_COP1_FUNCT_CEIL_L 10 +#define R4300i_COP1_FUNCT_FLOOR_L 11 +#define R4300i_COP1_FUNCT_ROUND_W 12 +#define R4300i_COP1_FUNCT_TRUNC_W 13 +#define R4300i_COP1_FUNCT_CEIL_W 14 +#define R4300i_COP1_FUNCT_FLOOR_W 15 +#define R4300i_COP1_FUNCT_CVT_S 32 +#define R4300i_COP1_FUNCT_CVT_D 33 +#define R4300i_COP1_FUNCT_CVT_W 36 +#define R4300i_COP1_FUNCT_CVT_L 37 +#define R4300i_COP1_FUNCT_C_F 48 +#define R4300i_COP1_FUNCT_C_UN 49 +#define R4300i_COP1_FUNCT_C_EQ 50 +#define R4300i_COP1_FUNCT_C_UEQ 51 +#define R4300i_COP1_FUNCT_C_OLT 52 +#define R4300i_COP1_FUNCT_C_ULT 53 +#define R4300i_COP1_FUNCT_C_OLE 54 +#define R4300i_COP1_FUNCT_C_ULE 55 +#define R4300i_COP1_FUNCT_C_SF 56 +#define R4300i_COP1_FUNCT_C_NGLE 57 +#define R4300i_COP1_FUNCT_C_SEQ 58 +#define R4300i_COP1_FUNCT_C_NGL 59 +#define R4300i_COP1_FUNCT_C_LT 60 +#define R4300i_COP1_FUNCT_C_NGE 61 +#define R4300i_COP1_FUNCT_C_LE 62 +#define R4300i_COP1_FUNCT_C_NGT 63 + +#endif + + diff --git a/Frameworks/lazyusf/lazyusf/os.c b/Frameworks/lazyusf/lazyusf/os.c new file mode 100644 index 000000000..9e1c7d267 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/os.c @@ -0,0 +1,285 @@ +#include + +#include "usf.h" +#include "usf_internal.h" + +#include "os.h" +#include "cpu_hle.h" + +#include "audio.h" +#include "interpreter_cpu.h" +#include "main.h" +#include "memory.h" + + +#define N64WORD(x) (*(uint32_t*)PageVRAM((x))) +#define N64HALF(x) (*(uint16_t*)PageVRAM((x))) +#define N64BYTE(x) (*(uint8_t*)PageVRAM((x^3))) + +#define N64DWORD(addr) (((long long)N64WORD((addr))) << 32) + N64WORD((addr)+4); + + + +int __osRestoreInt(usf_state_t * state, int n) +{ + STATUS_REGISTER |= state->GPR[0x4].UW[0]; + return 1; +} + +int __osDisableInt(usf_state_t * state, int n) +{ + state->GPR[0x2].UW[0] = STATUS_REGISTER & 1; + STATUS_REGISTER &= 0xFFFFFFFE; + return 1; +} + + +void osEnqueueThread(usf_state_t * state, uint32_t osThreadQueueAddr, uint32_t threadVAddr) +{ + + OSThread *thread = (OSThread*) PageVRAM(threadVAddr); + OSThread *oldThread = (OSThread*) PageVRAM(osThreadQueueAddr); + OSThread *curThread = (OSThread*) PageVRAM(oldThread->next); + + while((int32_t)curThread->priority >= (int32_t)thread->priority) { + oldThread = curThread; + curThread = (OSThread*) PageVRAM(curThread->next); + } + + thread->next = oldThread->next; + oldThread->next = threadVAddr; + thread->queue = osThreadQueueAddr; +} + +int __osEnqueueThread(usf_state_t * state, int n) { + osEnqueueThread(state, state->GPR[4].UW[0],state->GPR[5].UW[0]); + return 1; +} + +int osStartThread(usf_state_t * state, int n) +{ + OSMesgQueue *osThreadQueue = NULL; + uint32_t osThreadQueueAddr = 0; + uint32_t oldStatus = STATUS_REGISTER & 1; + uint32_t osActiveThreadAddr = 0; + uint32_t osActiveThread = 0; + + OSThread *thread = (OSThread*)PageVRAM(state->GPR[4].UW[0]); + + STATUS_REGISTER &= 0xFFFFFFFE; + + osThreadQueueAddr = ((*(uint32_t*)PageRAM2(n + 0x40)) & 0xFFFF) << 16; + osThreadQueueAddr += *(int16_t*)PageRAM2(n + 0x50); + + osThreadQueue = (OSMesgQueue*) PageVRAM(osThreadQueueAddr); + + if(thread->state != 8 ) { + DisplayError(state, "OMG, thread state is not OS_STATE_WAITING!\n"); + return 0; + } + + thread->state = OS_STATE_RUNNABLE; + osEnqueueThread(state,osThreadQueueAddr,state->GPR[4].UW[0]); + + osActiveThreadAddr = ((*(uint32_t*)PageRAM2(n + 0xDC)) & 0xFFFF) << 16; + osActiveThreadAddr += *(int16_t*)PageRAM2(n + 0xE0); + + osActiveThread = *(uint32_t*)PageVRAM(osActiveThreadAddr); + + if(osActiveThread==0) { + DisplayError(state,"OMG, active thread is NULL!\n"); + return 0; + } + + STATUS_REGISTER |= oldStatus; +// CheckInterrupts(); + + return 1; +} + + +int osRecvMesg(usf_state_t * state, int n) +{ + //unsigned long devAddr = state->GPR[7].UW[0]; + //unsigned long vAddr = state->GPR[0x11].UW[0]; + //unsigned long nbytes = state->GPR[0x10].UW[0]; + + //unsigned long oldStatus = STATUS_REGISTER & 1; + + RunFunction(state, n | (state->PROGRAM_COUNTER & 0xF0000000)); + + //DisplayError("%08x\n%08x\n%08x",devAddr, vAddr, nbytes); + + return 1; +} + +// doesnt even use? +int osSetIntMask(usf_state_t * state, int paddr) { +#if 0 + uint32_t globalIntMask = 0; + uint32_t mask = STATUS_REGISTER & 0xFF01; + uint32_t interrupts = 0; + uint32_t intAddress = 0, newMask = 0, workMask = 0; + + uint32_t baseAddress = 0; + + globalIntMask = ((*(uint16_t*)PageRAM2(paddr + 0x8)) & 0xFFFF) << 16; + globalIntMask += *(uint16_t*)PageRAM2(paddr + 0xc); + globalIntMask = *(uint32_t*)PageVRAM(globalIntMask); + + interrupts = (globalIntMask ^ 0xffffffff) & 0xff00; + mask |= interrupts; + newMask = MI_INTR_MASK_REG; + + if(!newMask) + newMask = ((globalIntMask >> 16) ^ 0xFFFFFFFF) & 0x3F; + + mask |= (newMask << 16); + + baseAddress = ((*(uint16_t*)PageRAM2(paddr + 0x5C)) & 0xFFFF) << 16; + baseAddress += *(int16_t*)PageRAM2(paddr + 0x64); + baseAddress += ((state->GPR[4].UW[0] & 0x3F0000) & globalIntMask) >> 15;; + + MI_INTR_MASK_REG = *(uint16_t*)PageVRAM(baseAddress); + + state->STATUS_REGISTER = ((state->GPR[4].UW[0] & 0xff01) & (globalIntMask & 0xff00)) | (STATUS_REGISTER & 0xFFFF00FF); + +#endif + return 1; +} + + +int osVirtualToPhysical(usf_state_t * state, int paddr) { + uintptr_t address = 0; + uintptr_t vaddr = state->GPR[4].UW[0]; + + address = (state->TLB_Map[vaddr >> 12] + vaddr) - (uintptr_t)state->N64MEM; + + if(address < 0x800000) { + state->GPR[2].UW[0] = (uint32_t)address; + } else + state->GPR[2].UW[0] = 0xFFFFFFFF; + + return 1; +} + +int osAiSetNextBuffer(usf_state_t * state, int paddr) { + uint32_t var = 0, var2 = 0; + var = ((*(int16_t*)PageRAM2(paddr + 0x4)) & 0xFFFF) << 16; + var += *(int16_t*)PageRAM2(paddr + 0x8); + + var2 = N64WORD(var); + if(AI_CONTROL_REG & 0x80000000) + state->GPR[2].UW[0] = -1; + + AI_DRAM_ADDR_REG = state->GPR[4].UW[0]; + AI_LEN_REG = state->GPR[5].UW[0]&0x3FFF; + AiLenChanged(state); + state->GPR[2].UW[0] = 0; + return 1; +} + +int saveThreadContext(usf_state_t * state, int paddr) { +#if 0 + uint32_t OSThreadContextAddr = 0; + + OSThreadContextAddr = ((*(int16_t*)PageRAM2(paddr)) & 0xFFFF) << 16; + OSThreadContextAddr += *(int16_t*)PageRAM2(paddr + 0x4); + + OSThreadContextAddr = N64WORD(OSThreadContextAddr); + + if((PageVRAM2(OSThreadContextAddr) & 0xffff) > 0xFF00) { + DisplayError(state,"OMG! Too high!"); + return 0; + } +#endif + return 0; +} + +int loadThreadContext(usf_state_t * state, int paddr) { +#if 0 + uint32_t i = 0, OSThreadContextAddr = 0, T9 = 0, osOSThread = 0, Addr2 = 0, GlobalBitMask = 0, Tmp = 0; + uint32_t K0 = 0, K1 = 0, T0 = 0, R1 = 0, RCP = 0, intrList = 0; + OSThread t; + OSThreadContextAddr = ((*(int16_t*)PageRAM2(paddr)) & 0xFFFF) << 16; + OSThreadContextAddr += *(int16_t*)PageRAM2(paddr + 0x8); + + Addr2 = ((*(int16_t*)PageRAM2(paddr + 0xC)) & 0xFFFF) << 16; + Addr2 += *(int16_t*)PageRAM2(paddr + 0x10); + + GlobalBitMask = ((*(int16_t*)PageRAM2(paddr + 0x20)) & 0xFFFF) << 16; + GlobalBitMask += *(int16_t*)PageRAM2(paddr + 0x28); + GlobalBitMask = N64WORD(GlobalBitMask); + + intrList = ((*(int16_t*)PageRAM2(paddr + 0x14C + 0x0)) & 0xFFFF) << 16; + intrList += *(int16_t*)PageRAM2(paddr + 0x150 + 0x0); + + return 0; + + if((PageVRAM2(OSThreadContextAddr) & 0xffff) > 0xFE80) { + DisplayError(state, "OMG this number is too high!!!!\n"); + } + + osOSThread = N64WORD(OSThreadContextAddr); + T9 = N64WORD(osOSThread); + + N64WORD(OSThreadContextAddr) = T9; + N64WORD(Addr2) = osOSThread; + + N64WORD(osOSThread + 0x10) = OS_STATE_RUNNING; //T0 is globalbitmask + + K1 = N64WORD(osOSThread + 0x118); //osOSThread.context.k0 + + STATUS_REGISTER = (K1 & 0xFFFF00FF) | (GlobalBitMask & 0xFF00); + + for(i = 1; i <= 0x19; i++) { + state->GPR[i].DW = N64DWORD(osOSThread + 0x18 + (i * 8)); + } + + for(i = 0x1C; i <= 0x1F; i++) { + state->GPR[i].DW = N64DWORD(osOSThread + 0x8 + (i * 8)); + } + + state->LO.DW = N64DWORD(osOSThread + 0x108); + state->HI.DW = N64DWORD(osOSThread + 0x110); + + EPC_REGISTER = (uint32_t) N64WORD(osOSThread + 0x11C); + + state->FPCR[31] = (uint32_t) N64WORD(osOSThread + 0x12C); + + if(N64WORD(osOSThread + 0x18)) { + for(i = 0; i <= 30; i+=2) { + (*(uint64_t *)state->FPRDoubleLocation[i]) = N64DWORD(osOSThread + 0x130 + (i * 4)); + } + } else { + } + + state->GPR[0x1A].UW[0] = (uint32_t) osOSThread; + + RCP = N64WORD(osOSThread + 0x128); + + K0 = (intrList + ((RCP & (GlobalBitMask >> 16)) << 1)); + K1 = 0; + + r4300i_LH_VAddr(state, K0, &K1); + + // cheap hack? + //K1 = 0xAAA; + + SW_Register(0x0430000C, K1); + + NextInstruction = JUMP; + + if ((STATUS_REGISTER & STATUS_ERL) != 0) { + JumpToLocation = ERROREPC_REGISTER; + STATUS_REGISTER &= ~STATUS_ERL; + } else { + JumpToLocation = EPC_REGISTER; + STATUS_REGISTER &= ~STATUS_EXL; + } + + LLBit = 0; + CheckInterrupts(); +#endif + return 0; +} diff --git a/Frameworks/lazyusf/lazyusf/os.h b/Frameworks/lazyusf/lazyusf/os.h new file mode 100644 index 000000000..8ff0a697c --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/os.h @@ -0,0 +1,89 @@ +#ifndef _CPU_HLE_OS_ +#define _CPU_HLE_OS_ + +#include "cpu_hle.h" + + +#pragma pack(1) + + +#define OS_STATE_STOPPED 1 +#define OS_STATE_RUNNABLE 2 +#define OS_STATE_RUNNING 4 +#define OS_STATE_WAITING 8 + +typedef uint32_t OSPri; +typedef uint32_t OSId; +typedef + union + { + struct + { + float f_odd; + float f_even; + } f; + double d; + } +__OSfp; + +typedef struct { + uint64_t at, v0, v1, a0, a1, a2, a3; + uint64_t t0, t1, t2, t3, t4, t5, t6, t7; + uint64_t s0, s1, s2, s3, s4, s5, s6, s7; + uint64_t t8, t9, gp, sp, s8, ra; + uint64_t lo, hi; + uint32_t sr, pc, cause, badvaddr, rcp; + uint32_t fpcsr; + __OSfp fp0, fp2, fp4, fp6, fp8, fp10, fp12, fp14; + __OSfp fp16, fp18, fp20, fp22, fp24, fp26, fp28, fp30; +} __OSThreadContext; + +typedef struct OSThread_s +{ + uint32_t next; // run/mesg queue link + OSPri priority; // run/mesg queue priority + uint32_t queue; // queue thread is on + uint32_t tlnext; // all threads queue link +#if 0 + uint16_t state; // OS_STATE_* + uint16_t flags; // flags for rmon +#endif + //swap these because of byteswapping + uint16_t flags; // flags for rmon + uint16_t state; // OS_STATE_* + OSId id; // id for debugging + int fp; // thread has used fp unit + __OSThreadContext context; // register/interrupt mask +} OSThread; + +typedef void * OSMesg; + +// +// Structure for message queue +// +typedef struct OSMesgQueue_s +{ + OSThread *mtqueue; // Queue to store threads blocked + // on empty mailboxes (receive) + OSThread *fullqueue; // Queue to store threads blocked + // on full mailboxes (send) + int32_t validCount; // Contains number of valid message + int32_t first; // Points to first valid message + int32_t msgCount; // Contains total # of messages + OSMesg *msg; // Points to message buffer array +} OSMesgQueue; + + +int __osRestoreInt(usf_state_t *, int n); +int __osDisableInt(usf_state_t *, int n); +int __osEnqueueThread(usf_state_t *, int n) ; + +int osStartThread(usf_state_t *, int n); +int osRecvMesg(usf_state_t *, int n); +int osSetIntMask(usf_state_t *, int paddr) ; +int osVirtualToPhysical(usf_state_t *, int paddr); +int osAiSetNextBuffer(usf_state_t *, int paddr); + +int saveThreadContext(usf_state_t *, int paddr); +int loadThreadContext(usf_state_t *, int paddr); +#endif diff --git a/Frameworks/lazyusf/lazyusf/pif.c b/Frameworks/lazyusf/lazyusf/pif.c new file mode 100644 index 000000000..6f60210f3 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/pif.c @@ -0,0 +1,99 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#include "usf.h" +#include "main.h" +#include "cpu.h" + +#include "usf_internal.h" + +// Skeletal support so USFs that read the controller won't fail (bad practice, though) + +void ProcessControllerCommand ( usf_state_t * state, int32_t Control, uint8_t * Command); + +void PifRamRead (usf_state_t * state) { + int32_t Channel, CurPos; + + Channel = 0; + CurPos = 0; + + do { + switch(state->PIF_Ram[CurPos]) { + case 0x00: + Channel += 1; + if (Channel > 6) { CurPos = 0x40; } + break; + case 0xFE: CurPos = 0x40; break; + case 0xFF: break; + case 0xB4: case 0x56: case 0xB8: break; /* ??? */ + default: + if ((state->PIF_Ram[CurPos] & 0xC0) == 0) { + CurPos += state->PIF_Ram[CurPos] + (state->PIF_Ram[CurPos + 1] & 0x3F) + 1; + Channel += 1; + } else { + CurPos = 0x40; + } + break; + } + CurPos += 1; + } while( CurPos < 0x40 ); +} + +void PifRamWrite (usf_state_t * state) { + int Channel, CurPos; + + Channel = 0; + + for (CurPos = 0; CurPos < 0x40; CurPos++){ + switch(state->PIF_Ram[CurPos]) { + case 0x00: + Channel += 1; + if (Channel > 6) { CurPos = 0x40; } + break; + case 0xFE: CurPos = 0x40; break; + case 0xFF: break; + case 0xB4: case 0x56: case 0xB8: break; /* ??? */ + default: + if ((state->PIF_Ram[CurPos] & 0xC0) == 0) { + if (Channel < 4) { + ProcessControllerCommand(state,Channel,&state->PIF_Ram[CurPos]); + } + CurPos += state->PIF_Ram[CurPos] + (state->PIF_Ram[CurPos + 1] & 0x3F) + 1; + Channel += 1; + } else + CurPos = 0x40; + + break; + } + } + state->PIF_Ram[0x3F] = 0; +} + +// always return failure +void ProcessControllerCommand ( usf_state_t * state, int32_t Control, uint8_t * Command) { + (void)state; + (void)Control; + Command[1] |= 0x80; +} diff --git a/Frameworks/lazyusf/lazyusf/pif.h b/Frameworks/lazyusf/lazyusf/pif.h new file mode 100644 index 000000000..d46ec4de6 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/pif.h @@ -0,0 +1,29 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +extern uint8_t *PIF_Ram; + +void PifRamWrite ( usf_state_t * ); +void PifRamRead ( usf_state_t * ); diff --git a/Frameworks/lazyusf/lazyusf/registers.c b/Frameworks/lazyusf/lazyusf/registers.c new file mode 100644 index 000000000..8f7db882c --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/registers.c @@ -0,0 +1,145 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ + +// #ifdef EXT_REGS + +#include "usf.h" + +#include "main.h" +#include "cpu.h" +#include "types.h" + +#include "usf_internal.h" + +void SetupRegisters(usf_state_t * state, N64_REGISTERS * n64_Registers) { + state->PROGRAM_COUNTER = n64_Registers->PROGRAM_COUNTER; + state->HI.DW = n64_Registers->HI.DW; + state->LO.DW = n64_Registers->LO.DW; + state->CP0 = n64_Registers->CP0; + state->GPR = n64_Registers->GPR; + state->FPR = n64_Registers->FPR; + state->FPCR = n64_Registers->FPCR; + state->RegRDRAM = n64_Registers->RDRAM; + state->RegSP = n64_Registers->SP; + state->RegDPC = n64_Registers->DPC; + state->RegMI = n64_Registers->MI; + state->RegVI = n64_Registers->VI; + state->RegAI = n64_Registers->AI; + state->RegPI = n64_Registers->PI; + state->RegRI = n64_Registers->RI; + state->RegSI = n64_Registers->SI; + state->PIF_Ram = (uint8_t *) n64_Registers->PIF_Ram; +} + +void ChangeMiIntrMask (usf_state_t * state) { + if ( ( state->RegModValue & MI_INTR_MASK_CLR_SP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SP; } + if ( ( state->RegModValue & MI_INTR_MASK_SET_SP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SP; } + if ( ( state->RegModValue & MI_INTR_MASK_CLR_SI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_SI; } + if ( ( state->RegModValue & MI_INTR_MASK_SET_SI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_SI; } + if ( ( state->RegModValue & MI_INTR_MASK_CLR_AI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_AI; } + if ( ( state->RegModValue & MI_INTR_MASK_SET_AI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_AI; } + if ( ( state->RegModValue & MI_INTR_MASK_CLR_VI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_VI; } + if ( ( state->RegModValue & MI_INTR_MASK_SET_VI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_VI; } + if ( ( state->RegModValue & MI_INTR_MASK_CLR_PI ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_PI; } + if ( ( state->RegModValue & MI_INTR_MASK_SET_PI ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_PI; } + if ( ( state->RegModValue & MI_INTR_MASK_CLR_DP ) != 0 ) { MI_INTR_MASK_REG &= ~MI_INTR_MASK_DP; } + if ( ( state->RegModValue & MI_INTR_MASK_SET_DP ) != 0 ) { MI_INTR_MASK_REG |= MI_INTR_MASK_DP; } +} + +void ChangeMiModeReg (usf_state_t * state) { + MI_MODE_REG &= ~0x7F; + MI_MODE_REG |= (state->RegModValue & 0x7F); + if ( ( state->RegModValue & MI_CLR_INIT ) != 0 ) { MI_MODE_REG &= ~MI_MODE_INIT; } + if ( ( state->RegModValue & MI_SET_INIT ) != 0 ) { MI_MODE_REG |= MI_MODE_INIT; } + if ( ( state->RegModValue & MI_CLR_EBUS ) != 0 ) { MI_MODE_REG &= ~MI_MODE_EBUS; } + if ( ( state->RegModValue & MI_SET_EBUS ) != 0 ) { MI_MODE_REG |= MI_MODE_EBUS; } + if ( ( state->RegModValue & MI_CLR_DP_INTR ) != 0 ) { MI_INTR_REG &= ~MI_INTR_DP; } + if ( ( state->RegModValue & MI_CLR_RDRAM ) != 0 ) { MI_MODE_REG &= ~MI_MODE_RDRAM; } + if ( ( state->RegModValue & MI_SET_RDRAM ) != 0 ) { MI_MODE_REG |= MI_MODE_RDRAM; } +} + +void ChangeSpStatus (usf_state_t * state) { + if ( ( state->RegModValue & SP_CLR_HALT ) != 0) { SP_STATUS_REG &= ~SP_STATUS_HALT; } + if ( ( state->RegModValue & SP_SET_HALT ) != 0) { SP_STATUS_REG |= SP_STATUS_HALT; } + if ( ( state->RegModValue & SP_CLR_BROKE ) != 0) { SP_STATUS_REG &= ~SP_STATUS_BROKE; } + if ( ( state->RegModValue & SP_CLR_INTR ) != 0) { + MI_INTR_REG &= ~MI_INTR_SP; + CheckInterrupts(state); + } + + if ( ( state->RegModValue & SP_CLR_SSTEP ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SSTEP; } + if ( ( state->RegModValue & SP_SET_SSTEP ) != 0) { SP_STATUS_REG |= SP_STATUS_SSTEP; } + if ( ( state->RegModValue & SP_CLR_INTR_BREAK ) != 0) { SP_STATUS_REG &= ~SP_STATUS_INTR_BREAK; } + if ( ( state->RegModValue & SP_SET_INTR_BREAK ) != 0) { SP_STATUS_REG |= SP_STATUS_INTR_BREAK; } + if ( ( state->RegModValue & SP_CLR_SIG0 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG0; } + if ( ( state->RegModValue & SP_SET_SIG0 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG0; } + if ( ( state->RegModValue & SP_CLR_SIG1 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG1; } + if ( ( state->RegModValue & SP_SET_SIG1 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG1; } + if ( ( state->RegModValue & SP_CLR_SIG2 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG2; } + if ( ( state->RegModValue & SP_SET_SIG2 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG2; } + if ( ( state->RegModValue & SP_CLR_SIG3 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG3; } + if ( ( state->RegModValue & SP_SET_SIG3 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG3; } + if ( ( state->RegModValue & SP_CLR_SIG4 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG4; } + if ( ( state->RegModValue & SP_SET_SIG4 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG4; } + if ( ( state->RegModValue & SP_CLR_SIG5 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG5; } + if ( ( state->RegModValue & SP_SET_SIG5 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG5; } + if ( ( state->RegModValue & SP_CLR_SIG6 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG6; } + if ( ( state->RegModValue & SP_SET_SIG6 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG6; } + if ( ( state->RegModValue & SP_CLR_SIG7 ) != 0) { SP_STATUS_REG &= ~SP_STATUS_SIG7; } + if ( ( state->RegModValue & SP_SET_SIG7 ) != 0) { SP_STATUS_REG |= SP_STATUS_SIG7; } + + RunRsp(state); + +} + +void UpdateCurrentHalfLine (usf_state_t * state) { + if (state->Timers->Timer < 0) { + state->HalfLine = 0; + return; + } + state->HalfLine = (state->Timers->Timer / 1500); + state->HalfLine &= ~1; + state->HalfLine += state->ViFieldNumber; +} + +void SetFpuLocations (usf_state_t * state) { + int count; + + if ((STATUS_REGISTER & STATUS_FR) == 0) { + for (count = 0; count < 32; count ++) { + state->FPRFloatLocation[count] = (void *)(&state->FPR[count >> 1].W[count & 1]); + //state->FPRDoubleLocation[count] = state->FPRFloatLocation[count]; + state->FPRDoubleLocation[count] = (void *)(&state->FPR[count >> 1].DW); + } + } else { + for (count = 0; count < 32; count ++) { + state->FPRFloatLocation[count] = (void *)(&state->FPR[count].W[1]); + //state->FPRFloatLocation[count] = (void *)(&state->FPR[count].W[1]); + //state->FPRDoubleLocation[count] = state->FPRFloatLocation[count]; + state->FPRDoubleLocation[count] = (void *)(&state->FPR[count].DW); + } + } +} diff --git a/Frameworks/lazyusf/lazyusf/registers.h b/Frameworks/lazyusf/lazyusf/registers.h new file mode 100644 index 000000000..6f4f205b4 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/registers.h @@ -0,0 +1,378 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ + +#ifndef REGISTERS_H +#define REGISTERS_H + +#include "types.h" + +#define INDEX_REGISTER state->CP0[0] +#define RANDOM_REGISTER state->CP0[1] +#define ENTRYLO0_REGISTER state->CP0[2] +#define ENTRYLO1_REGISTER state->CP0[3] +#define CONTEXT_REGISTER state->CP0[4] +#define PAGE_MASK_REGISTER state->CP0[5] +#define WIRED_REGISTER state->CP0[6] +#define BAD_VADDR_REGISTER state->CP0[8] +#define COUNT_REGISTER state->CP0[9] +#define ENTRYHI_REGISTER state->CP0[10] +#define COMPARE_REGISTER state->CP0[11] +#define STATUS_REGISTER state->CP0[12] +#define CAUSE_REGISTER state->CP0[13] +#define EPC_REGISTER state->CP0[14] +#define CONFIG_REGISTER state->CP0[16] +#define TAGLO_REGISTER state->CP0[28] +#define TAGHI_REGISTER state->CP0[29] +#define ERROREPC_REGISTER state->CP0[30] +#define FAKE_CAUSE_REGISTER state->CP0[32] + +#define COMPARE_REGISTER_NO 11 +#define STATUS_REGISTER_NO 12 +#define CAUSE_REGISTER_NO 13 + +#define REVISION_REGISTER state->FPCR[0] +#define FSTATUS_REGISTER state->FPCR[31] + +#define GPR_S0 state->GPR[16] +#define GPR_S1 state->GPR[17] +#define GPR_S2 state->GPR[18] +#define GPR_S3 state->GPR[19] +#define GPR_S4 state->GPR[20] +#define GPR_S5 state->GPR[21] +#define GPR_S6 state->GPR[22] +#define GPR_S7 state->GPR[23] +#define GPR_SP state->GPR[29] +#define GPR_RA state->GPR[31] + +#define RDRAM_CONFIG_REG state->RegRDRAM[0] +#define RDRAM_DEVICE_TYPE_REG state->RegRDRAM[0] +#define RDRAM_DEVICE_ID_REG state->RegRDRAM[1] +#define RDRAM_DELAY_REG state->RegRDRAM[2] +#define RDRAM_MODE_REG state->RegRDRAM[3] +#define RDRAM_REF_INTERVAL_REG state->RegRDRAM[4] +#define RDRAM_REF_ROW_REG state->RegRDRAM[5] +#define RDRAM_RAS_INTERVAL_REG state->RegRDRAM[6] +#define RDRAM_MIN_INTERVAL_REG state->RegRDRAM[7] +#define RDRAM_ADDR_SELECT_REG state->RegRDRAM[8] +#define RDRAM_DEVICE_MANUF_REG state->RegRDRAM[9] + +#define SP_MEM_ADDR_REG state->RegSP[0] +#define SP_DRAM_ADDR_REG state->RegSP[1] +#define SP_RD_LEN_REG state->RegSP[2] +#define SP_WR_LEN_REG state->RegSP[3] +#define SP_STATUS_REG state->RegSP[4] +#define SP_DMA_FULL_REG state->RegSP[5] +#define SP_DMA_BUSY_REG state->RegSP[6] +#define SP_SEMAPHORE_REG state->RegSP[7] +#define SP_PC_REG state->RegSP[8] +#define SP_IBIST_REG state->RegSP[9] + +#define DPC_START_REG state->RegDPC[0] +#define DPC_END_REG state->RegDPC[1] +#define DPC_CURRENT_REG state->RegDPC[2] +#define DPC_STATUS_REG state->RegDPC[3] +#define DPC_CLOCK_REG state->RegDPC[4] +#define DPC_BUFBUSY_REG state->RegDPC[5] +#define DPC_PIPEBUSY_REG state->RegDPC[6] +#define DPC_TMEM_REG state->RegDPC[7] + +#define MI_INIT_MODE_REG state->RegMI[0] +#define MI_MODE_REG state->RegMI[0] +#define MI_VERSION_REG state->RegMI[1] +#define MI_NOOP_REG state->RegMI[1] +#define MI_INTR_REG state->RegMI[2] +#define MI_INTR_MASK_REG state->RegMI[3] + +#define VI_STATUS_REG state->RegVI[0] +#define VI_CONTROL_REG state->RegVI[0] +#define VI_ORIGIN_REG state->RegVI[1] +#define VI_DRAM_ADDR_REG state->RegVI[1] +#define VI_WIDTH_REG state->RegVI[2] +#define VI_H_WIDTH_REG state->RegVI[2] +#define VI_INTR_REG state->RegVI[3] +#define VI_V_INTR_REG state->RegVI[3] +#define VI_CURRENT_REG state->RegVI[4] +#define VI_V_CURRENT_LINE_REG state->RegVI[4] +#define VI_BURST_REG state->RegVI[5] +#define VI_TIMING_REG state->RegVI[5] +#define VI_V_SYNC_REG state->RegVI[6] +#define VI_H_SYNC_REG state->RegVI[7] +#define VI_LEAP_REG state->RegVI[8] +#define VI_H_SYNC_LEAP_REG state->RegVI[8] +#define VI_H_START_REG state->RegVI[9] +#define VI_H_VIDEO_REG state->RegVI[9] +#define VI_V_START_REG state->RegVI[10] +#define VI_V_VIDEO_REG state->RegVI[10] +#define VI_V_BURST_REG state->RegVI[11] +#define VI_X_SCALE_REG state->RegVI[12] +#define VI_Y_SCALE_REG state->RegVI[13] + +#define AI_DRAM_ADDR_REG state->RegAI[0] +#define AI_LEN_REG state->RegAI[1] +#define AI_CONTROL_REG state->RegAI[2] +#define AI_STATUS_REG state->RegAI[3] +#define AI_DACRATE_REG state->RegAI[4] +#define AI_BITRATE_REG state->RegAI[5] + +#define PI_DRAM_ADDR_REG state->RegPI[0] +#define PI_CART_ADDR_REG state->RegPI[1] +#define PI_RD_LEN_REG state->RegPI[2] +#define PI_WR_LEN_REG state->RegPI[3] +#define PI_STATUS_REG state->RegPI[4] +#define PI_BSD_DOM1_LAT_REG state->RegPI[5] +#define PI_DOMAIN1_REG state->RegPI[5] +#define PI_BSD_DOM1_PWD_REG state->RegPI[6] +#define PI_BSD_DOM1_PGS_REG state->RegPI[7] +#define PI_BSD_DOM1_RLS_REG state->RegPI[8] +#define PI_BSD_DOM2_LAT_REG state->RegPI[9] +#define PI_DOMAIN2_REG state->RegPI[9] +#define PI_BSD_DOM2_PWD_REG state->RegPI[10] +#define PI_BSD_DOM2_PGS_REG state->RegPI[11] +#define PI_BSD_DOM2_RLS_REG state->RegPI[12] + +#define RI_MODE_REG state->RegRI[0] +#define RI_CONFIG_REG state->RegRI[1] +#define RI_CURRENT_LOAD_REG state->RegRI[2] +#define RI_SELECT_REG state->RegRI[3] +#define RI_COUNT_REG state->RegRI[4] +#define RI_REFRESH_REG state->RegRI[4] +#define RI_LATENCY_REG state->RegRI[5] +#define RI_RERROR_REG state->RegRI[6] +#define RI_WERROR_REG state->RegRI[7] + +#define SI_DRAM_ADDR_REG state->RegSI[0] +#define SI_PIF_ADDR_RD64B_REG state->RegSI[1] +#define SI_PIF_ADDR_WR64B_REG state->RegSI[2] +#define SI_STATUS_REG state->RegSI[3] + +#define STATUS_IE 0x00000001 +#define STATUS_EXL 0x00000002 +#define STATUS_ERL 0x00000004 +#define STATUS_IP0 0x00000100 +#define STATUS_IP1 0x00000200 +#define STATUS_IP2 0x00000400 +#define STATUS_IP3 0x00000800 +#define STATUS_IP4 0x00001000 +#define STATUS_IP5 0x00002000 +#define STATUS_IP6 0x00004000 +#define STATUS_IP7 0x00008000 +#define STATUS_BEV 0x00400000 +#define STATUS_FR 0x04000000 +#define STATUS_CU0 0x10000000 +#define STATUS_CU1 0x20000000 + +#define CAUSE_EXC_CODE 0xFF +#define CAUSE_IP0 0x100 +#define CAUSE_IP1 0x200 +#define CAUSE_IP2 0x400 +#define CAUSE_IP3 0x800 +#define CAUSE_IP4 0x1000 +#define CAUSE_IP5 0x2000 +#define CAUSE_IP6 0x4000 +#define CAUSE_IP7 0x8000 +#define CAUSE_BD 0x80000000 + +#define SP_CLR_HALT 0x00001 /* Bit 0: clear halt */ +#define SP_SET_HALT 0x00002 /* Bit 1: set halt */ +#define SP_CLR_BROKE 0x00004 /* Bit 2: clear broke */ +#define SP_CLR_INTR 0x00008 /* Bit 3: clear intr */ +#define SP_SET_INTR 0x00010 /* Bit 4: set intr */ +#define SP_CLR_SSTEP 0x00020 /* Bit 5: clear sstep */ +#define SP_SET_SSTEP 0x00040 /* Bit 6: set sstep */ +#define SP_CLR_INTR_BREAK 0x00080 /* Bit 7: clear intr on break */ +#define SP_SET_INTR_BREAK 0x00100 /* Bit 8: set intr on break */ +#define SP_CLR_SIG0 0x00200 /* Bit 9: clear signal 0 */ +#define SP_SET_SIG0 0x00400 /* Bit 10: set signal 0 */ +#define SP_CLR_SIG1 0x00800 /* Bit 11: clear signal 1 */ +#define SP_SET_SIG1 0x01000 /* Bit 12: set signal 1 */ +#define SP_CLR_SIG2 0x02000 /* Bit 13: clear signal 2 */ +#define SP_SET_SIG2 0x04000 /* Bit 14: set signal 2 */ +#define SP_CLR_SIG3 0x08000 /* Bit 15: clear signal 3 */ +#define SP_SET_SIG3 0x10000 /* Bit 16: set signal 3 */ +#define SP_CLR_SIG4 0x20000 /* Bit 17: clear signal 4 */ +#define SP_SET_SIG4 0x40000 /* Bit 18: set signal 4 */ +#define SP_CLR_SIG5 0x80000 /* Bit 19: clear signal 5 */ +#define SP_SET_SIG5 0x100000 /* Bit 20: set signal 5 */ +#define SP_CLR_SIG6 0x200000 /* Bit 21: clear signal 6 */ +#define SP_SET_SIG6 0x400000 /* Bit 22: set signal 6 */ +#define SP_CLR_SIG7 0x800000 /* Bit 23: clear signal 7 */ +#define SP_SET_SIG7 0x1000000 /* Bit 24: set signal 7 */ + +#define SP_STATUS_HALT 0x001 /* Bit 0: halt */ +#define SP_STATUS_BROKE 0x002 /* Bit 1: broke */ +#define SP_STATUS_DMA_BUSY 0x004 /* Bit 2: dma busy */ +#define SP_STATUS_DMA_FULL 0x008 /* Bit 3: dma full */ +#define SP_STATUS_IO_FULL 0x010 /* Bit 4: io full */ +#define SP_STATUS_SSTEP 0x020 /* Bit 5: single step */ +#define SP_STATUS_INTR_BREAK 0x040 /* Bit 6: interrupt on break */ +#define SP_STATUS_SIG0 0x080 /* Bit 7: signal 0 set */ +#define SP_STATUS_SIG1 0x100 /* Bit 8: signal 1 set */ +#define SP_STATUS_SIG2 0x200 /* Bit 9: signal 2 set */ +#define SP_STATUS_SIG3 0x400 /* Bit 10: signal 3 set */ +#define SP_STATUS_SIG4 0x800 /* Bit 11: signal 4 set */ +#define SP_STATUS_SIG5 0x1000 /* Bit 12: signal 5 set */ +#define SP_STATUS_SIG6 0x2000 /* Bit 13: signal 6 set */ +#define SP_STATUS_SIG7 0x4000 /* Bit 14: signal 7 set */ + +#define DPC_CLR_XBUS_DMEM_DMA 0x0001 /* Bit 0: clear xbus_dmem_dma */ +#define DPC_SET_XBUS_DMEM_DMA 0x0002 /* Bit 1: set xbus_dmem_dma */ +#define DPC_CLR_FREEZE 0x0004 /* Bit 2: clear freeze */ +#define DPC_SET_FREEZE 0x0008 /* Bit 3: set freeze */ +#define DPC_CLR_FLUSH 0x0010 /* Bit 4: clear flush */ +#define DPC_SET_FLUSH 0x0020 /* Bit 5: set flush */ +#define DPC_CLR_TMEM_CTR 0x0040 /* Bit 6: clear tmem ctr */ +#define DPC_CLR_PIPE_CTR 0x0080 /* Bit 7: clear pipe ctr */ +#define DPC_CLR_CMD_CTR 0x0100 /* Bit 8: clear cmd ctr */ +#define DPC_CLR_CLOCK_CTR 0x0200 /* Bit 9: clear clock ctr */ + +#define DPC_STATUS_XBUS_DMEM_DMA 0x001 /* Bit 0: xbus_dmem_dma */ +#define DPC_STATUS_FREEZE 0x002 /* Bit 1: freeze */ +#define DPC_STATUS_FLUSH 0x004 /* Bit 2: flush */ +#define DPC_STATUS_START_GCLK 0x008 /* Bit 3: start gclk */ +#define DPC_STATUS_TMEM_BUSY 0x010 /* Bit 4: tmem busy */ +#define DPC_STATUS_PIPE_BUSY 0x020 /* Bit 5: pipe busy */ +#define DPC_STATUS_CMD_BUSY 0x040 /* Bit 6: cmd busy */ +#define DPC_STATUS_CBUF_READY 0x080 /* Bit 7: cbuf ready */ +#define DPC_STATUS_DMA_BUSY 0x100 /* Bit 8: dma busy */ +#define DPC_STATUS_END_VALID 0x200 /* Bit 9: end valid */ +#define DPC_STATUS_START_VALID 0x400 /* Bit 10: start valid */ + +#define MI_CLR_INIT 0x0080 /* Bit 7: clear init mode */ +#define MI_SET_INIT 0x0100 /* Bit 8: set init mode */ +#define MI_CLR_EBUS 0x0200 /* Bit 9: clear ebus test */ +#define MI_SET_EBUS 0x0400 /* Bit 10: set ebus test mode */ +#define MI_CLR_DP_INTR 0x0800 /* Bit 11: clear dp interrupt */ +#define MI_CLR_RDRAM 0x1000 /* Bit 12: clear RDRAM reg */ +#define MI_SET_RDRAM 0x2000 /* Bit 13: set RDRAM reg mode */ + +#define MI_MODE_INIT 0x0080 /* Bit 7: init mode */ +#define MI_MODE_EBUS 0x0100 /* Bit 8: ebus test mode */ +#define MI_MODE_RDRAM 0x0200 /* Bit 9: RDRAM reg mode */ + +#define MI_INTR_MASK_CLR_SP 0x0001 /* Bit 0: clear SP mask */ +#define MI_INTR_MASK_SET_SP 0x0002 /* Bit 1: set SP mask */ +#define MI_INTR_MASK_CLR_SI 0x0004 /* Bit 2: clear SI mask */ +#define MI_INTR_MASK_SET_SI 0x0008 /* Bit 3: set SI mask */ +#define MI_INTR_MASK_CLR_AI 0x0010 /* Bit 4: clear AI mask */ +#define MI_INTR_MASK_SET_AI 0x0020 /* Bit 5: set AI mask */ +#define MI_INTR_MASK_CLR_VI 0x0040 /* Bit 6: clear VI mask */ +#define MI_INTR_MASK_SET_VI 0x0080 /* Bit 7: set VI mask */ +#define MI_INTR_MASK_CLR_PI 0x0100 /* Bit 8: clear PI mask */ +#define MI_INTR_MASK_SET_PI 0x0200 /* Bit 9: set PI mask */ +#define MI_INTR_MASK_CLR_DP 0x0400 /* Bit 10: clear DP mask */ +#define MI_INTR_MASK_SET_DP 0x0800 /* Bit 11: set DP mask */ + +#define MI_INTR_MASK_SP 0x01 /* Bit 0: SP intr mask */ +#define MI_INTR_MASK_SI 0x02 /* Bit 1: SI intr mask */ +#define MI_INTR_MASK_AI 0x04 /* Bit 2: AI intr mask */ +#define MI_INTR_MASK_VI 0x08 /* Bit 3: VI intr mask */ +#define MI_INTR_MASK_PI 0x10 /* Bit 4: PI intr mask */ +#define MI_INTR_MASK_DP 0x20 /* Bit 5: DP intr mask */ + +#define MI_INTR_SP 0x01 /* Bit 0: SP intr */ +#define MI_INTR_SI 0x02 /* Bit 1: SI intr */ +#define MI_INTR_AI 0x04 /* Bit 2: AI intr */ +#define MI_INTR_VI 0x08 /* Bit 3: VI intr */ +#define MI_INTR_PI 0x10 /* Bit 4: PI intr */ +#define MI_INTR_DP 0x20 /* Bit 5: DP intr */ + +#define PI_STATUS_DMA_BUSY 0x01 +#define PI_STATUS_IO_BUSY 0x02 +#define PI_STATUS_ERROR 0x04 + +#define PI_SET_RESET 0x01 +#define PI_CLR_INTR 0x02 + +#define SI_STATUS_DMA_BUSY 0x0001 +#define SI_STATUS_RD_BUSY 0x0002 +#define SI_STATUS_DMA_ERROR 0x0008 +#define SI_STATUS_INTERRUPT 0x1000 + +#define FPCSR_FS 0x01000000 /* flush denorm to zero */ +#define FPCSR_C 0x00800000 /* condition bit */ +#define FPCSR_CE 0x00020000 /* cause: unimplemented operation */ +#define FPCSR_CV 0x00010000 /* cause: invalid operation */ +#define FPCSR_CZ 0x00008000 /* cause: division by zero */ +#define FPCSR_CO 0x00004000 /* cause: overflow */ +#define FPCSR_CU 0x00002000 /* cause: underflow */ +#define FPCSR_CI 0x00001000 /* cause: inexact operation */ +#define FPCSR_EV 0x00000800 /* enable: invalid operation */ +#define FPCSR_EZ 0x00000400 /* enable: division by zero */ +#define FPCSR_EO 0x00000200 /* enable: overflow */ +#define FPCSR_EU 0x00000100 /* enable: underflow */ +#define FPCSR_EI 0x00000080 /* enable: inexact operation */ +#define FPCSR_FV 0x00000040 /* flag: invalid operation */ +#define FPCSR_FZ 0x00000020 /* flag: division by zero */ +#define FPCSR_FO 0x00000010 /* flag: overflow */ +#define FPCSR_FU 0x00000008 /* flag: underflow */ +#define FPCSR_FI 0x00000004 /* flag: inexact operation */ +#define FPCSR_RM_MASK 0x00000003 /* rounding mode mask */ +#define FPCSR_RM_RN 0x00000000 /* round to nearest */ +#define FPCSR_RM_RZ 0x00000001 /* round to zero */ +#define FPCSR_RM_RP 0x00000002 /* round to positive infinity */ +#define FPCSR_RM_RM 0x00000003 /* round to negative infinity */ + +#define FPR_Type(Reg) (Reg) == R4300i_COP1_S ? "S" : (Reg) == R4300i_COP1_D ? "D" :\ + (Reg) == R4300i_COP1_W ? "W" : "L" + +typedef struct { + uint32_t PROGRAM_COUNTER; + MIPS_DWORD GPR[32]; + MIPS_DWORD FPR[32]; + uint32_t CP0[33]; + uint32_t FPCR[32]; + MIPS_DWORD HI; + MIPS_DWORD LO; + uint32_t RDRAM[10]; + uint32_t SP[10]; + uint32_t DPC[10]; + uint32_t MI[4]; + uint32_t VI[14]; + uint32_t AI[6]; + uint32_t PI[13]; + uint32_t RI[8]; + uint32_t SI[4]; + int8_t PIF_Ram[0x40]; +} N64_REGISTERS; + +enum FPU_Format { + FPU_Unkown,FPU_Dword, FPU_Qword, FPU_Float, FPU_Double +}; + +enum FPU_RoundingModel { + RoundUnknown, RoundDefault, RoundTruncate, RoundNearest, RoundDown, RoundUp +}; + +void ChangeMiIntrMask ( usf_state_t * ); +void ChangeMiModeReg ( usf_state_t * ); +void ChangeSpStatus ( usf_state_t * ); +void InitalizeR4300iRegisters ( usf_state_t * ); +void UpdateCurrentHalfLine ( usf_state_t * ); +void SetFpuLocations ( usf_state_t * ); + +void SetupRegisters(usf_state_t *, N64_REGISTERS * n64_Registers); + +#endif diff --git a/Frameworks/lazyusf/lazyusf/resampler.c b/Frameworks/lazyusf/lazyusf/resampler.c new file mode 100644 index 000000000..95968f8f1 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/resampler.c @@ -0,0 +1,270 @@ +#include +#include +#define _USE_MATH_DEFINES +#include + +#ifndef M_PI +#define M_PI 3.14159265358979323846 +#endif + +#include "resampler.h" + +#include "rsp_hle/audio.h" + +enum { RESAMPLER_SHIFT = 16 }; +enum { RESAMPLER_RESOLUTION = 1 << RESAMPLER_SHIFT }; + +enum { resampler_buffer_size = 64 * 4 }; + +typedef struct resampler +{ + int write_pos, write_filled; + int read_pos, read_filled; + int phase; + int phase_inc; + signed char delay_added; + signed char delay_removed; + short buffer_in[2][resampler_buffer_size * 2]; + short buffer_out[resampler_buffer_size * 2]; +} resampler; + +void * resampler_create(void) +{ + resampler * r = ( resampler * ) malloc( sizeof(resampler) ); + if ( !r ) return 0; + + r->write_pos = 1; + r->write_filled = 0; + r->read_pos = 0; + r->read_filled = 0; + r->phase = 0; + r->phase_inc = 0; + r->delay_added = -1; + r->delay_removed = -1; + memset( r->buffer_in, 0, sizeof(r->buffer_in) ); + memset( r->buffer_out, 0, sizeof(r->buffer_out) ); + + return r; +} + +void resampler_delete(void * _r) +{ + free( _r ); +} + +void * resampler_dup(const void * _r) +{ + void * r_out = malloc( sizeof(resampler) ); + if ( !r_out ) return 0; + + resampler_dup_inplace(r_out, _r); + + return r_out; +} + +void resampler_dup_inplace(void *_d, const void *_s) +{ + const resampler * r_in = ( const resampler * ) _s; + resampler * r_out = ( resampler * ) _d; + + r_out->write_pos = r_in->write_pos; + r_out->write_filled = r_in->write_filled; + r_out->read_pos = r_in->read_pos; + r_out->read_filled = r_in->read_filled; + r_out->phase = r_in->phase; + r_out->phase_inc = r_in->phase_inc; + r_out->delay_added = r_in->delay_added; + r_out->delay_removed = r_in->delay_removed; + memcpy( r_out->buffer_in, r_in->buffer_in, sizeof(r_in->buffer_in) ); + memcpy( r_out->buffer_out, r_in->buffer_out, sizeof(r_in->buffer_out) ); +} + +int resampler_get_free_count(void *_r) +{ + resampler * r = ( resampler * ) _r; + return resampler_buffer_size - r->write_filled; +} + +static int resampler_min_filled(resampler *r) +{ + return 4; +} + +static int resampler_input_delay(resampler *r) +{ + return 1; +} + +static int resampler_output_delay(resampler *r) +{ + return 0; +} + +int resampler_ready(void *_r) +{ + resampler * r = ( resampler * ) _r; + return r->write_filled > resampler_min_filled(r); +} + +void resampler_clear(void *_r) +{ + resampler * r = ( resampler * ) _r; + r->write_pos = 1; + r->write_filled = 0; + r->read_pos = 0; + r->read_filled = 0; + r->phase = 0; + r->delay_added = -1; + r->delay_removed = -1; +} + +void resampler_set_rate(void *_r, double new_factor) +{ + resampler * r = ( resampler * ) _r; + r->phase_inc = new_factor * RESAMPLER_RESOLUTION; +} + +void resampler_write_sample(void *_r, short ls, short rs) +{ + resampler * r = ( resampler * ) _r; + + if ( r->delay_added < 0 ) + { + r->delay_added = 0; + r->write_filled = resampler_input_delay( r ); + } + + if ( r->write_filled < resampler_buffer_size ) + { + r->buffer_in[ 0 ][ r->write_pos ] = ls; + r->buffer_in[ 0 ][ r->write_pos + resampler_buffer_size ] = ls; + + r->buffer_in[ 1 ][ r->write_pos ] = rs; + r->buffer_in[ 1 ][ r->write_pos + resampler_buffer_size ] = rs; + + ++r->write_filled; + + r->write_pos = ( r->write_pos + 1 ) % resampler_buffer_size; + } +} + +static int resampler_run_cubic(resampler * r, short ** out_, short * out_end) +{ + int in_size = r->write_filled; + int in_offset = resampler_buffer_size + r->write_pos - r->write_filled; + short const* inl_ = r->buffer_in[0] + in_offset; + short const* inr_ = r->buffer_in[1] + in_offset; + int used = 0; + in_size -= 4; + if ( in_size > 0 ) + { + short* out = *out_; + short const* inl = inl_; + short const* inr = inr_; + short const* const in_end = inl + in_size; + int phase = r->phase; + int phase_inc = r->phase_inc; + + do + { + int samplel, sampler; + const int16_t* lut; + + if ( out >= out_end ) + break; + + lut = RESAMPLE_LUT + ((phase & 0xfc00) >> 8); + + samplel = ((inl[0] * lut[0]) + (inl[1] * lut[1]) + + (inl[2] * lut[2]) + (inl[3] * lut[3])) >> 15; + sampler = ((inr[0] * lut[0]) + (inr[1] * lut[1]) + + (inr[2] * lut[2]) + (inr[3] * lut[3])) >> 15; + + if ((samplel + 0x8000) & 0xffff0000) samplel = 0x7fff ^ (samplel >> 31); + if ((sampler + 0x8000) & 0xffff0000) sampler = 0x7fff ^ (sampler >> 31); + + *out++ = (short)samplel; + *out++ = (short)sampler; + + phase += phase_inc; + + inl += (phase >> 16); + inr += (phase >> 16); + + phase &= 0xFFFF; + } + while ( inl < in_end ); + + r->phase = phase; + *out_ = out; + + used = (int)(inl - inl_); + + r->write_filled -= used; + } + + return used; +} + +static void resampler_fill(resampler * r) +{ + int min_filled = resampler_min_filled(r); + while ( r->write_filled > min_filled && + r->read_filled < resampler_buffer_size ) + { + int write_pos = ( r->read_pos + r->read_filled ) % resampler_buffer_size; + int write_size = resampler_buffer_size - write_pos; + short * out = r->buffer_out + write_pos * 2; + if ( write_size > ( resampler_buffer_size - r->read_filled ) ) + write_size = resampler_buffer_size - r->read_filled; + resampler_run_cubic( r, &out, out + write_size * 2 ); + r->read_filled += ( out - r->buffer_out - write_pos * 2 ) / 2; + } +} + +static void resampler_fill_and_remove_delay(resampler * r) +{ + resampler_fill( r ); + if ( r->delay_removed < 0 ) + { + int delay = resampler_output_delay( r ); + r->delay_removed = 0; + while ( delay-- ) + resampler_remove_sample( r ); + } +} + +int resampler_get_sample_count(void *_r) +{ + resampler * r = ( resampler * ) _r; + if ( r->read_filled < 1 ) + resampler_fill_and_remove_delay( r ); + return r->read_filled; +} + +void resampler_get_sample(void *_r, short * ls, short * rs) +{ + resampler * r = ( resampler * ) _r; + if ( r->read_filled < 1 && r->phase_inc ) + resampler_fill_and_remove_delay( r ); + if ( r->read_filled < 1 ) + { + *ls = 0; + *rs = 0; + } + else + { + *ls = r->buffer_out[ r->read_pos * 2 + 0 ]; + *rs = r->buffer_out[ r->read_pos * 2 + 1 ]; + } +} + +void resampler_remove_sample(void *_r) +{ + resampler * r = ( resampler * ) _r; + if ( r->read_filled > 0 ) + { + --r->read_filled; + r->read_pos = ( r->read_pos + 1 ) % resampler_buffer_size; + } +} diff --git a/Frameworks/lazyusf/lazyusf/resampler.h b/Frameworks/lazyusf/lazyusf/resampler.h new file mode 100644 index 000000000..b5a19b929 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/resampler.h @@ -0,0 +1,40 @@ +#ifndef _RESAMPLER_H_ +#define _RESAMPLER_H_ + +#define RESAMPLER_DECORATE USF + +#ifdef RESAMPLER_DECORATE +#define PASTE(a,b) a ## b +#define EVALUATE(a,b) PASTE(a,b) +#define resampler_create EVALUATE(RESAMPLER_DECORATE,_resampler_create) +#define resampler_delete EVALUATE(RESAMPLER_DECORATE,_resampler_delete) +#define resampler_dup EVALUATE(RESAMPLER_DECORATE,_resampler_dup) +#define resampler_dup_inplace EVALUATE(RESAMPLER_DECORATE,_resampler_dup_inplace) +#define resampler_set_quality EVALUATE(RESAMPLER_DECORATE,_resampler_set_quality) +#define resampler_get_free_count EVALUATE(RESAMPLER_DECORATE,_resampler_get_free_count) +#define resampler_write_sample EVALUATE(RESAMPLER_DECORATE,_resampler_write_sample) +#define resampler_write_sample_fixed EVALUATE(RESAMPLER_DECORATE,_resampler_write_sample_fixed) +#define resampler_set_rate EVALUATE(RESAMPLER_DECORATE,_resampler_set_rate) +#define resampler_ready EVALUATE(RESAMPLER_DECORATE,_resampler_ready) +#define resampler_clear EVALUATE(RESAMPLER_DECORATE,_resampler_clear) +#define resampler_get_sample_count EVALUATE(RESAMPLER_DECORATE,_resampler_get_sample_count) +#define resampler_get_sample EVALUATE(RESAMPLER_DECORATE,_resampler_get_sample) +#define resampler_get_sample_float EVALUATE(RESAMPLER_DECORATE,_resampler_get_sample_float) +#define resampler_remove_sample EVALUATE(RESAMPLER_DECORATE,_resampler_remove_sample) +#endif + +void * resampler_create(void); +void resampler_delete(void *); +void * resampler_dup(const void *); +void resampler_dup_inplace(void *, const void *); + +int resampler_get_free_count(void *); +void resampler_write_sample(void *, short sample_l, short sample_r); +void resampler_set_rate( void *, double new_factor ); +int resampler_ready(void *); +void resampler_clear(void *); +int resampler_get_sample_count(void *); +void resampler_get_sample(void *, short * sample_l, short * sample_r); +void resampler_remove_sample(void *); + +#endif diff --git a/Frameworks/lazyusf/lazyusf/rsp.h b/Frameworks/lazyusf/lazyusf/rsp.h new file mode 100644 index 000000000..7dce5e512 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/rsp.h @@ -0,0 +1,11 @@ +#ifndef RSP_H +#define RSP_H + +#include "usf.h" +#include "usf_internal.h" + +void real_run_rsp(usf_state_t *, uint32_t cycles); + +int32_t init_rsp(usf_state_t *); + +#endif diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/bench.c b/Frameworks/lazyusf/lazyusf/rsp/bench.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/bench.c rename to Frameworks/lazyusf/lazyusf/rsp/bench.c diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/config.h b/Frameworks/lazyusf/lazyusf/rsp/config.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/config.h rename to Frameworks/lazyusf/lazyusf/rsp/config.h diff --git a/Frameworks/lazyusf/lazyusf/rsp/execute.h b/Frameworks/lazyusf/lazyusf/rsp/execute.h new file mode 100644 index 000000000..01801242b --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/rsp/execute.h @@ -0,0 +1,495 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.12.11 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "rsp.h" + +#include "su.h" +#include "vu/vu.h" + +#define FIT_IMEM(PC) (PC & 0xFFF & 0xFFC) + +NOINLINE void run_task(usf_state_t * state) +{ + register int PC; + int wrap_count = 0; +#ifdef SP_EXECUTE_LOG + int last_PC; +#endif + + if (CFG_WAIT_FOR_CPU_HOST != 0) + { + register int i; + + for (i = 0; i < 32; i++) + state->MFC0_count[i] = 0; + } + PC = FIT_IMEM(SP_PC_REG); + while ((SP_STATUS_REG & 0x00000001) == 0x00000000) + { + register uint32_t inst; + + inst = *(uint32_t *)(state->IMEM + FIT_IMEM(PC)); +#ifdef SP_EXECUTE_LOG + last_PC = PC; +#endif +#ifdef EMULATE_STATIC_PC + PC = (PC + 0x004); + if ( FIT_IMEM(PC) == 0 && ++wrap_count == 32 ) + { + message( state, "RSP execution presumably caught in an infinite loop", 3 ); + break; + } +EX: +#endif +#ifdef SP_EXECUTE_LOG + step_SP_commands(state, last_PC, inst); +#endif + if (inst >> 25 == 0x25) /* is a VU instruction */ + { + const int opcode = inst % 64; /* inst.R.func */ + const int vd = (inst & 0x000007FF) >> 6; /* inst.R.sa */ + const int vs = (unsigned short)(inst) >> 11; /* inst.R.rd */ + const int vt = (inst >> 16) & 31; /* inst.R.rt */ + const int e = (inst >> 21) & 0xF; /* rs & 0xF */ + + COP2_C2[opcode](state, vd, vs, vt, e); + } + else + { + const int op = inst >> 26; + const int rs = inst >> 21; /* &= 31 */ + const int rt = (inst >> 16) & 31; + const int rd = (unsigned short)(inst) >> 11; + const int element = (inst & 0x000007FF) >> 7; + const int base = (inst >> 21) & 31; + +#if (0) + state->SR[0] = 0x00000000; /* already handled on per-instruction basis */ +#endif + switch (op) + { + signed int offset; + register uint32_t addr; + + case 000: /* SPECIAL */ + switch (inst % 64) + { + case 000: /* SLL */ + state->SR[rd] = state->SR[rt] << MASK_SA(inst >> 6); + state->SR[0] = 0x00000000; + CONTINUE + case 002: /* SRL */ + state->SR[rd] = (unsigned)(state->SR[rt]) >> MASK_SA(inst >> 6); + state->SR[0] = 0x00000000; + CONTINUE + case 003: /* SRA */ + state->SR[rd] = (signed)(state->SR[rt]) >> MASK_SA(inst >> 6); + state->SR[0] = 0x00000000; + CONTINUE + case 004: /* SLLV */ + state->SR[rd] = state->SR[rt] << MASK_SA(state->SR[rs]); + state->SR[0] = 0x00000000; + CONTINUE + case 006: /* SRLV */ + state->SR[rd] = (unsigned)(state->SR[rt]) >> MASK_SA(state->SR[rs]); + state->SR[0] = 0x00000000; + CONTINUE + case 007: /* SRAV */ + state->SR[rd] = (signed)(state->SR[rt]) >> MASK_SA(state->SR[rs]); + state->SR[0] = 0x00000000; + CONTINUE + case 011: /* JALR */ + state->SR[rd] = (PC + LINK_OFF) & 0x00000FFC; + state->SR[0] = 0x00000000; + case 010: /* JR */ + set_PC(state, state->SR[rs]); + JUMP + case 015: /* BREAK */ + SP_STATUS_REG |= 0x00000003; /* BROKE | HALT */ + if (SP_STATUS_REG & 0x00000040) + { /* SP_STATUS_INTR_BREAK */ + MI_INTR_REG |= 0x00000001; + CheckInterrupts(state); + } + CONTINUE + case 040: /* ADD */ + case 041: /* ADDU */ + state->SR[rd] = state->SR[rs] + state->SR[rt]; + state->SR[0] = 0x00000000; /* needed for Rareware ucodes */ + CONTINUE + case 042: /* SUB */ + case 043: /* SUBU */ + state->SR[rd] = state->SR[rs] - state->SR[rt]; + state->SR[0] = 0x00000000; + CONTINUE + case 044: /* AND */ + state->SR[rd] = state->SR[rs] & state->SR[rt]; + state->SR[0] = 0x00000000; /* needed for Rareware ucodes */ + CONTINUE + case 045: /* OR */ + state->SR[rd] = state->SR[rs] | state->SR[rt]; + state->SR[0] = 0x00000000; + CONTINUE + case 046: /* XOR */ + state->SR[rd] = state->SR[rs] ^ state->SR[rt]; + state->SR[0] = 0x00000000; + CONTINUE + case 047: /* NOR */ + state->SR[rd] = ~(state->SR[rs] | state->SR[rt]); + state->SR[0] = 0x00000000; + CONTINUE + case 052: /* SLT */ + state->SR[rd] = ((signed)(state->SR[rs]) < (signed)(state->SR[rt])); + state->SR[0] = 0x00000000; + CONTINUE + case 053: /* SLTU */ + state->SR[rd] = ((unsigned)(state->SR[rs]) < (unsigned)(state->SR[rt])); + state->SR[0] = 0x00000000; + CONTINUE + default: + res_S(state); + CONTINUE + } + CONTINUE + case 001: /* REGIMM */ + switch (rt) + { + case 020: /* BLTZAL */ + state->SR[31] = (PC + LINK_OFF) & 0x00000FFC; + case 000: /* BLTZ */ + if (!(state->SR[base] < 0)) + CONTINUE + set_PC(state, PC + 4*inst + SLOT_OFF); + JUMP + case 021: /* BGEZAL */ + state->SR[31] = (PC + LINK_OFF) & 0x00000FFC; + case 001: /* BGEZ */ + if (!(state->SR[base] >= 0)) + CONTINUE + set_PC(state, PC + 4*inst + SLOT_OFF); + JUMP + default: + res_S(state); + CONTINUE + } + CONTINUE + case 003: /* JAL */ + state->SR[31] = (PC + LINK_OFF) & 0x00000FFC; + case 002: /* J */ + set_PC(state, 4*inst); + JUMP + case 004: /* BEQ */ + if (!(state->SR[base] == state->SR[rt])) + CONTINUE + set_PC(state, PC + 4*inst + SLOT_OFF); + JUMP + case 005: /* BNE */ + if (!(state->SR[base] != state->SR[rt])) + CONTINUE + set_PC(state, PC + 4*inst + SLOT_OFF); + JUMP + case 006: /* BLEZ */ + if (!((signed)state->SR[base] <= 0x00000000)) + CONTINUE + set_PC(state, PC + 4*inst + SLOT_OFF); + JUMP + case 007: /* BGTZ */ + if (!((signed)state->SR[base] > 0x00000000)) + CONTINUE + set_PC(state, PC + 4*inst + SLOT_OFF); + JUMP + case 010: /* ADDI */ + case 011: /* ADDIU */ + state->SR[rt] = state->SR[base] + (signed short)(inst); + state->SR[0] = 0x00000000; + CONTINUE + case 012: /* SLTI */ + state->SR[rt] = ((signed)(state->SR[base]) < (signed short)(inst)); + state->SR[0] = 0x00000000; + CONTINUE + case 013: /* SLTIU */ + state->SR[rt] = ((unsigned)(state->SR[base]) < (unsigned short)(inst)); + state->SR[0] = 0x00000000; + CONTINUE + case 014: /* ANDI */ + state->SR[rt] = state->SR[base] & (unsigned short)(inst); + state->SR[0] = 0x00000000; + CONTINUE + case 015: /* ORI */ + state->SR[rt] = state->SR[base] | (unsigned short)(inst); + state->SR[0] = 0x00000000; + CONTINUE + case 016: /* XORI */ + state->SR[rt] = state->SR[base] ^ (unsigned short)(inst); + state->SR[0] = 0x00000000; + CONTINUE + case 017: /* LUI */ + state->SR[rt] = inst << 16; + state->SR[0] = 0x00000000; + CONTINUE + case 020: /* COP0 */ + switch (base) + { + case 000: /* MFC0 */ + MFC0(state, rt, rd & 0xF); + CONTINUE + case 004: /* MTC0 */ + MTC0[rd & 0xF](state, rt); + CONTINUE + default: + res_S(state); + CONTINUE + } + CONTINUE + case 022: /* COP2 */ + switch (base) + { + case 000: /* MFC2 */ + MFC2(state, rt, rd, element); + CONTINUE + case 002: /* CFC2 */ + CFC2(state, rt, rd); + CONTINUE + case 004: /* MTC2 */ + MTC2(state, rt, rd, element); + CONTINUE + case 006: /* CTC2 */ + CTC2(state, rt, rd); + CONTINUE + default: + res_S(state); + CONTINUE + } + CONTINUE + case 040: /* LB */ + offset = (signed short)(inst); + addr = (state->SR[base] + offset) & 0x00000FFF; + state->SR[rt] = state->DMEM[BES(addr)]; + state->SR[rt] = (signed char)(state->SR[rt]); + state->SR[0] = 0x00000000; + CONTINUE + case 041: /* LH */ + offset = (signed short)(inst); + addr = (state->SR[base] + offset) & 0x00000FFF; + if (addr%0x004 == 0x003) + { + SR_B(rt, 2) = state->DMEM[addr - BES(0x000)]; + addr = (addr + 0x00000001) & 0x00000FFF; + SR_B(rt, 3) = state->DMEM[addr + BES(0x000)]; + state->SR[rt] = (signed short)(state->SR[rt]); + } + else + { + addr -= HES(0x000)*(addr%0x004 - 1); + state->SR[rt] = *(signed short *)(state->DMEM + addr); + } + state->SR[0] = 0x00000000; + CONTINUE + case 043: /* LW */ + offset = (signed short)(inst); + addr = (state->SR[base] + offset) & 0x00000FFF; + if (addr%0x004 != 0x000) + ULW(state, rt, addr); + else + state->SR[rt] = *(int32_t *)(state->DMEM + addr); + state->SR[0] = 0x00000000; + CONTINUE + case 044: /* LBU */ + offset = (signed short)(inst); + addr = (state->SR[base] + offset) & 0x00000FFF; + state->SR[rt] = state->DMEM[BES(addr)]; + state->SR[rt] = (unsigned char)(state->SR[rt]); + state->SR[0] = 0x00000000; + CONTINUE + case 045: /* LHU */ + offset = (signed short)(inst); + addr = (state->SR[base] + offset) & 0x00000FFF; + if (addr%0x004 == 0x003) + { + SR_B(rt, 2) = state->DMEM[addr - BES(0x000)]; + addr = (addr + 0x00000001) & 0x00000FFF; + SR_B(rt, 3) = state->DMEM[addr + BES(0x000)]; + state->SR[rt] = (unsigned short)(state->SR[rt]); + } + else + { + addr -= HES(0x000)*(addr%0x004 - 1); + state->SR[rt] = *(unsigned short *)(state->DMEM + addr); + } + state->SR[0] = 0x00000000; + CONTINUE + case 050: /* SB */ + offset = (signed short)(inst); + addr = (state->SR[base] + offset) & 0x00000FFF; + state->DMEM[BES(addr)] = (unsigned char)(state->SR[rt]); + CONTINUE + case 051: /* SH */ + offset = (signed short)(inst); + addr = (state->SR[base] + offset) & 0x00000FFF; + if (addr%0x004 == 0x003) + { + state->DMEM[addr - BES(0x000)] = SR_B(rt, 2); + addr = (addr + 0x00000001) & 0x00000FFF; + state->DMEM[addr + BES(0x000)] = SR_B(rt, 3); + CONTINUE + } + addr -= HES(0x000)*(addr%0x004 - 1); + *(short *)(state->DMEM + addr) = (short)(state->SR[rt]); + CONTINUE + case 053: /* SW */ + offset = (signed short)(inst); + addr = (state->SR[base] + offset) & 0x00000FFF; + if (addr%0x004 != 0x000) + USW(state, rt, addr); + else + *(int32_t *)(state->DMEM + addr) = state->SR[rt]; + CONTINUE + case 062: /* LWC2 */ + offset = SE(inst, 6); + switch (rd) + { + case 000: /* LBV */ + LBV(state, rt, element, offset, base); + CONTINUE + case 001: /* LSV */ + LSV(state, rt, element, offset, base); + CONTINUE + case 002: /* LLV */ + LLV(state, rt, element, offset, base); + CONTINUE + case 003: /* LDV */ + LDV(state, rt, element, offset, base); + CONTINUE + case 004: /* LQV */ + LQV(state, rt, element, offset, base); + CONTINUE + case 005: /* LRV */ + LRV(state, rt, element, offset, base); + CONTINUE + case 006: /* LPV */ + LPV(state, rt, element, offset, base); + CONTINUE + case 007: /* LUV */ + LUV(state, rt, element, offset, base); + CONTINUE + case 010: /* LHV */ + LHV(state, rt, element, offset, base); + CONTINUE + case 011: /* LFV */ + LFV(state, rt, element, offset, base); + CONTINUE + case 013: /* LTV */ + LTV(state, rt, element, offset, base); + CONTINUE + default: + res_S(state); + CONTINUE + } + CONTINUE + case 072: /* SWC2 */ + offset = SE(inst, 6); + switch (rd) + { + case 000: /* SBV */ + SBV(state, rt, element, offset, base); + CONTINUE + case 001: /* SSV */ + SSV(state, rt, element, offset, base); + CONTINUE + case 002: /* SLV */ + SLV(state, rt, element, offset, base); + CONTINUE + case 003: /* SDV */ + SDV(state, rt, element, offset, base); + CONTINUE + case 004: /* SQV */ + SQV(state, rt, element, offset, base); + CONTINUE + case 005: /* SRV */ + SRV(state, rt, element, offset, base); + CONTINUE + case 006: /* SPV */ + SPV(state, rt, element, offset, base); + CONTINUE + case 007: /* SUV */ + SUV(state, rt, element, offset, base); + CONTINUE + case 010: /* SHV */ + SHV(state, rt, element, offset, base); + CONTINUE + case 011: /* SFV */ + SFV(state, rt, element, offset, base); + CONTINUE + case 012: /* SWV */ + SWV(state, rt, element, offset, base); + CONTINUE + case 013: /* STV */ + STV(state, rt, element, offset, base); + CONTINUE + default: + res_S(state); + CONTINUE + } + CONTINUE + default: + res_S(state); + CONTINUE + } + } +#ifndef EMULATE_STATIC_PC + if (state->stage == 2) /* branch phase of scheduler */ + { + state->stage = 0*stage; + PC = state->temp_PC & 0x00000FFC; + SP_PC_REG = state->temp_PC; + } + else + { + state->stage = 2*state->stage; /* next IW in branch delay slot? */ + PC = (PC + 0x004) & 0xFFC; + if ( FIT_IMEM(PC) == 0 && ++wrap_count == 32 ) + { + message( state, "RSP execution presumably caught in an infinite loop", 3 ); + break; + } + SP_PC_REG = 0x04001000 + PC; + } + continue; +#else + continue; +BRANCH: + inst = *(uint32_t *)(state->IMEM + FIT_IMEM(PC)); +#ifdef SP_EXECUTE_LOG + last_PC = PC; +#endif + PC = state->temp_PC & 0x00000FFC; + goto EX; +#endif + } + SP_PC_REG = 0x04001000 | FIT_IMEM(PC); + if (SP_STATUS_REG & 0x00000002) /* normal exit, from executing BREAK */ + return; + else if (MI_INTR_REG & 0x00000001) /* interrupt set by MTC0 to break */ + CheckInterrupts(state); + else if (CFG_WAIT_FOR_CPU_HOST != 0) /* plugin system hack to re-sync */ + {} + else if (SP_SEMAPHORE_REG != 0x00000000) /* semaphore lock fixes */ + {} + else /* ??? unknown, possibly external intervention from CPU memory map */ + { + message(state, "SP_SET_HALT", 3); + return; + } + SP_STATUS_REG &= ~0x00000001; /* CPU restarts with the correct SIGs. */ + return; +} diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/matrix.h b/Frameworks/lazyusf/lazyusf/rsp/matrix.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/matrix.h rename to Frameworks/lazyusf/lazyusf/rsp/matrix.h diff --git a/Frameworks/lazyusf/lazyusf/rsp/rsp.c b/Frameworks/lazyusf/lazyusf/rsp/rsp.c new file mode 100644 index 000000000..780122b8a --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/rsp/rsp.c @@ -0,0 +1,109 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.12.12 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ + +#include +#include +#include +#include + +#include "../usf.h" + +#include "../dma.h" +#include "../exception.h" +#include "../main.h" +#include "../memory.h" +#include "../registers.h" + +#include "../usf_internal.h" + +#undef JUMP + +#include "config.h" + +#include "rsp.h" + +#include "../rsp_hle/hle.h" + +void real_run_rsp(usf_state_t * state, uint32_t cycles) +{ + (void)cycles; + + if (SP_STATUS_REG & 0x00000003) + { + message(state, "SP_STATUS_HALT", 3); + return; + } + switch (*(unsigned int *)(state->DMEM + 0xFC0)) + { /* Simulation barrier to redirect processing externally. */ + case 0x00000002: /* OSTask.type == M_AUDTASK */ + if (state->enable_hle_audio == 0) + break; + hle_execute(&state->hle); + SP_STATUS_REG |= 0x00000203; + if (SP_STATUS_REG & 0x00000040) /* SP_STATUS_INTR_BREAK */ + { + MI_INTR_REG |= 0x00000001; /* VR4300 SP interrupt */ + CheckInterrupts(state); + } + return; + } + run_task(state); + return; +} + +int32_t init_rsp(usf_state_t * state) +{ + state->CR[0x0] = &SP_MEM_ADDR_REG; + state->CR[0x1] = &SP_DRAM_ADDR_REG; + state->CR[0x2] = &SP_RD_LEN_REG; + state->CR[0x3] = &SP_WR_LEN_REG; + state->CR[0x4] = &SP_STATUS_REG; + state->CR[0x5] = &SP_DMA_FULL_REG; + state->CR[0x6] = &SP_DMA_BUSY_REG; + state->CR[0x7] = &SP_SEMAPHORE_REG; + state->CR[0x8] = &DPC_START_REG; + state->CR[0x9] = &DPC_END_REG; + state->CR[0xA] = &DPC_CURRENT_REG; + state->CR[0xB] = &DPC_STATUS_REG; + state->CR[0xC] = &DPC_CLOCK_REG; + state->CR[0xD] = &DPC_BUFBUSY_REG; + state->CR[0xE] = &DPC_PIPEBUSY_REG; + state->CR[0xF] = &DPC_TMEM_REG; + + hle_init(&state->hle, + state->N64MEM, + state->DMEM, + state->IMEM, + &MI_INTR_REG, + &SP_MEM_ADDR_REG, + &SP_DRAM_ADDR_REG, + &SP_RD_LEN_REG, + &SP_WR_LEN_REG, + &SP_STATUS_REG, + &SP_DMA_FULL_REG, + &SP_DMA_BUSY_REG, + &SP_PC_REG, + &SP_SEMAPHORE_REG, + &DPC_START_REG, + &DPC_END_REG, + &DPC_CURRENT_REG, + &DPC_STATUS_REG, + &DPC_CLOCK_REG, + &DPC_BUFBUSY_REG, + &DPC_PIPEBUSY_REG, + &DPC_TMEM_REG, + state); + + return 0; +} diff --git a/Frameworks/lazyusf/lazyusf/rsp/rsp.h b/Frameworks/lazyusf/lazyusf/rsp/rsp.h new file mode 100644 index 000000000..0b40ccc91 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/rsp/rsp.h @@ -0,0 +1,118 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.12.12 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#ifndef _RSP_H_ +#define _RSP_H_ + +#ifdef _MSC_VER +#define INLINE __forceinline +#define NOINLINE __declspec(noinline) +#define ALIGNED _declspec(align(16)) +#else +#define INLINE inline __attribute__((always_inline)) +#define NOINLINE __attribute__((noinline)) +#define ALIGNED __attribute__((aligned(16))) +#endif + +/* + * Streaming SIMD Extensions version import management + */ +#ifdef ARCH_MIN_SSSE3 +#define ARCH_MIN_SSE2 +#include +#endif +#ifdef ARCH_MIN_SSE2 +#include +#endif +#ifdef ARCH_MIN_ARM_NEON +#include +#endif + +typedef unsigned char byte; + +#ifndef RCPREG_DEFINED +#define RCPREG_DEFINED +typedef uint32_t RCPREG; +#endif + +NOINLINE static void message(usf_state_t * state, const char* body, int priority) +{ + (void)body; + (void)priority; + if ( priority > 1 ) + DisplayError( state, "%s", body ); +} + +/* + * Update RSP configuration memory from local file resource. + */ +#define CHARACTERS_PER_LINE (80) +/* typical standard DOS text file limit per line */ +NOINLINE static void update_conf(const char* source) +{ + (void)source; +} + +#ifdef SP_EXECUTE_LOG +extern void step_SP_commands(usf_state_t * state, int PC, uint32_t inst); +#endif + +#include "su.h" +#include "vu/vu.h" + +/* Allocate the RSP CPU loop to its own functional space. */ +NOINLINE static void run_task(usf_state_t * state); +#include "execute.h" + +#ifdef SP_EXECUTE_LOG +#include "matrix.h" + +void step_SP_commands(usf_state_t * state, int PC, uint32_t inst) +{ + const char digits[16] = { + '0','1','2','3','4','5','6','7','8','9','A','B','C','D','E','F' + }; + char text[256]; + char offset[4] = ""; + char code[9] = ""; + char disasm[24]; + unsigned char endian_swap[4]; + + endian_swap[00] = (unsigned char)(inst >> 24); + endian_swap[01] = (unsigned char)(inst >> 16); + endian_swap[02] = (unsigned char)(inst >> 8); + endian_swap[03] = (unsigned char)inst; + offset[00] = digits[(PC & 0xF00) >> 8]; + offset[01] = digits[(PC & 0x0F0) >> 4]; + offset[02] = digits[(PC & 0x00F) >> 0]; + code[00] = digits[(inst & 0xF0000000) >> 28]; + code[01] = digits[(inst & 0x0F000000) >> 24]; + code[02] = digits[(inst & 0x00F00000) >> 20]; + code[03] = digits[(inst & 0x000F0000) >> 16]; + code[04] = digits[(inst & 0x0000F000) >> 12]; + code[05] = digits[(inst & 0x00000F00) >> 8]; + code[06] = digits[(inst & 0x000000F0) >> 4]; + code[07] = digits[(inst & 0x0000000F) >> 0]; + strcpy(text, "RSP:\t"); + strcat(text, offset); + strcat(text, ":\t"); + strcat(text, code); + strcat(text, "\t"); + disassemble(disasm, inst); + strcat(text, disasm); + strcat(text, "\n"); + fputs(text, stdout); +} +#endif + +#endif diff --git a/Frameworks/lazyusf/lazyusf/rsp/su.h b/Frameworks/lazyusf/lazyusf/rsp/su.h new file mode 100644 index 000000000..248422e1a --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/rsp/su.h @@ -0,0 +1,1558 @@ +/******************************************************************************\ +* Project: MSP Emulation Table for Scalar Unit Operations * +* Authors: Iconoclast * +* Release: 2013.12.10 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#ifndef _SU_H +#define _SU_H + +/* + * RSP virtual registers (of scalar unit) + * The most important are the 32 general-purpose scalar registers. + * We have the convenience of using a 32-bit machine (Win32) to emulate + * another 32-bit machine (MIPS/N64), so the most natural way to accurately + * emulate the scalar GPRs is to use the standard `int` type. Situations + * specifically requiring sign-extension or lack thereof are forcibly + * applied as defined in the MIPS quick reference card and user manuals. + * Remember that these are not the same "GPRs" as in the MIPS ISA and totally + * abandon their designated purposes on the master CPU host (the VR4300), + * hence most of the MIPS names "k0, k1, t0, t1, v0, v1 ..." no longer apply. + */ + +#include "rsp.h" + +NOINLINE static void res_S(usf_state_t * state) +{ + (void)state; + return; +} + +#ifdef EMULATE_STATIC_PC +#define BASE_OFF 0x000 +#else +#define BASE_OFF 0x004 +#endif + +#define SLOT_OFF (BASE_OFF + 0x000) +#define LINK_OFF (BASE_OFF + 0x004) +static void set_PC(usf_state_t * state, int address) +{ + state->temp_PC = 0x04001000 + (address & 0xFFC); +#ifndef EMULATE_STATIC_PC + state->stage = 1; +#endif + return; +} + +#if ANDROID +#define MASK_SA(sa) (sa & 31) +/* Force masking in software. */ +#else +#define MASK_SA(sa) (sa) +/* Let hardware architecture do the mask for us. */ +#endif + +#if (0) +#define ENDIAN 0 +#else +#define ENDIAN ~0 +#endif +#define BES(address) ((address) ^ ((ENDIAN) & 03)) +#define HES(address) ((address) ^ ((ENDIAN) & 02)) +#define MES(address) ((address) ^ ((ENDIAN) & 01)) +#define WES(address) ((address) ^ ((ENDIAN) & 00)) +#define SR_B(s, i) (*(byte *)(((byte *)(state->SR + s)) + BES(i))) +#define SR_S(s, i) (*(short *)(((byte *)(state->SR + s)) + HES(i))) +#define SE(x, b) (-((signed int)x & (1 << b)) | (x & ~(~0 << b))) +#define ZE(x, b) (+(x & (1 << b)) | (x & ~(~0 << b))) + +static void ULW(usf_state_t *, int rd, uint32_t addr); +static void USW(usf_state_t *, int rs, uint32_t addr); + +/* + * All other behaviors defined below this point in the file are specific to + * the SGI N64 extension to the MIPS R4000 and are not entirely implemented. + */ + +/*** Scalar, Coprocessor Operations (system control) ***/ + +static void MFC0(usf_state_t * state, int rt, int rd) +{ + state->SR[rt] = *(state->CR[rd]); + state->SR[0] = 0x00000000; + if (rd == 0x7) /* SP_SEMAPHORE_REG */ + { + if (CFG_MEND_SEMAPHORE_LOCK == 0) + return; + SP_SEMAPHORE_REG = 0x00000001; + SP_STATUS_REG |= 0x00000001; /* temporary bit to break CPU */ + return; + } + if (rd == 0x4) /* SP_STATUS_REG */ + { + if (CFG_WAIT_FOR_CPU_HOST == 0) + return; +#ifdef WAIT_FOR_CPU_HOST + ++state->MFC0_count[rt]; + if (state->MFC0_count[rt] > 07) + SP_STATUS_REG |= 0x00000001; /* Let OS restart the task. */ +#endif + } + return; +} + +static void MT_DMA_CACHE(usf_state_t * state, int rt) +{ + SP_MEM_ADDR_REG = state->SR[rt] & 0xFFFFFFF8; /* & 0x00001FF8 */ + return; /* Reserved upper bits are ignored during DMA R/W. */ +} +static void MT_DMA_DRAM(usf_state_t * state, int rt) +{ + SP_DRAM_ADDR_REG = state->SR[rt] & 0xFFFFFFF8; /* & 0x00FFFFF8 */ + return; /* Let the reserved bits get sent, but the pointer is 24-bit. */ +} +static void MT_DMA_READ_LENGTH(usf_state_t * state, int rt) +{ + SP_RD_LEN_REG = state->SR[rt] | 07; + SP_DMA_READ(state); + return; +} +static void MT_DMA_WRITE_LENGTH(usf_state_t * state, int rt) +{ + SP_WR_LEN_REG = state->SR[rt] | 07; + SP_DMA_WRITE(state); + return; +} +static void MT_SP_STATUS(usf_state_t * state, int rt) +{ + if (state->SR[rt] & 0xFE000040) + message(state, "MTC0\nSP_STATUS", 2); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000001) << 0); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00000002) << 0); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000004) << 1); + MI_INTR_REG &= ~((state->SR[rt] & 0x00000008) >> 3); /* SP_CLR_INTR */ + MI_INTR_REG |= ((state->SR[rt] & 0x00000010) >> 4); /* SP_SET_INTR */ + SP_STATUS_REG |= (state->SR[rt] & 0x00000010) >> 4; /* int set halt */ + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000020) << 5); + /* SP_STATUS_REG |= (!!(state->SR[rt] & 0x00000040) << 5); */ + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000080) << 6); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00000100) << 6); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000200) << 7); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00000400) << 7); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000800) << 8); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00001000) << 8); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00002000) << 9); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00004000) << 9); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00008000) << 10); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00010000) << 10); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00020000) << 11); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00040000) << 11); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00080000) << 12); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00100000) << 12); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00200000) << 13); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x00400000) << 13); + SP_STATUS_REG &= ~(!!(state->SR[rt] & 0x00800000) << 14); + SP_STATUS_REG |= (!!(state->SR[rt] & 0x01000000) << 14); + return; +} +static void MT_SP_RESERVED(usf_state_t * state, int rt) +{ + const uint32_t source = state->SR[rt] & 0x00000000; /* forced (zilmar, dox) */ + + SP_SEMAPHORE_REG = source; + return; +} +static void MT_CMD_START(usf_state_t * state, int rt) +{ + const uint32_t source = state->SR[rt] & 0xFFFFFFF8; /* Funnelcube demo */ + + if (DPC_BUFBUSY_REG) /* lock hazards not implemented */ + message(state, "MTC0\nCMD_START", 0); + DPC_END_REG = DPC_CURRENT_REG = DPC_START_REG = source; + return; +} +static void MT_CMD_END(usf_state_t * state, int rt) +{ + if (DPC_BUFBUSY_REG) + message(state, "MTC0\nCMD_END", 0); /* This is just CA-related. */ + DPC_END_REG = state->SR[rt] & 0xFFFFFFF8; + return; +} +static void MT_CMD_STATUS(usf_state_t * state, int rt) +{ + if (state->SR[rt] & 0xFFFFFD80) /* unsupported or reserved bits */ + message(state, "MTC0\nCMD_STATUS", 2); + DPC_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000001) << 0); + DPC_STATUS_REG |= (!!(state->SR[rt] & 0x00000002) << 0); + DPC_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000004) << 1); + DPC_STATUS_REG |= (!!(state->SR[rt] & 0x00000008) << 1); + DPC_STATUS_REG &= ~(!!(state->SR[rt] & 0x00000010) << 2); + DPC_STATUS_REG |= (!!(state->SR[rt] & 0x00000020) << 2); +/* Some NUS-CIC-6105 SP tasks try to clear some zeroed DPC registers. */ + DPC_TMEM_REG &= !(state->SR[rt] & 0x00000040) * -1; + /* DPC_PIPEBUSY_REG &= !(state->SR[rt] & 0x00000080) * -1; */ + /* DPC_BUFBUSY_REG &= !(state->SR[rt] & 0x00000100) * -1; */ + DPC_CLOCK_REG &= !(state->SR[rt] & 0x00000200) * -1; + return; +} +static void MT_CMD_CLOCK(usf_state_t * state, int rt) +{ + message(state, "MTC0\nCMD_CLOCK", 1); /* read-only?? */ + DPC_CLOCK_REG = state->SR[rt]; + return; /* Appendix says this is RW; elsewhere it says R. */ +} +static void MT_READ_ONLY(usf_state_t * state, int rt) +{ + (void)state; + (void)rt; + //char text[64]; + + //sprintf(text, "MTC0\nInvalid write attempt.\nstate->SR[%i] = 0x%08X", rt, state->SR[rt]); + //message(state, text, 2); + return; +} + +static void (*MTC0[16])(usf_state_t *, int) = { +MT_DMA_CACHE ,MT_DMA_DRAM ,MT_DMA_READ_LENGTH ,MT_DMA_WRITE_LENGTH, +MT_SP_STATUS ,MT_READ_ONLY ,MT_READ_ONLY ,MT_SP_RESERVED, +MT_CMD_START ,MT_CMD_END ,MT_READ_ONLY ,MT_CMD_STATUS, +MT_CMD_CLOCK ,MT_READ_ONLY ,MT_READ_ONLY ,MT_READ_ONLY +}; +#if 0 +void SP_DMA_READ(usf_state_t * state) +{ + register unsigned int length; + register unsigned int count; + register unsigned int skip; + + length = (SP_RD_LEN_REG & 0x00000FFF) >> 0; + count = (SP_RD_LEN_REG & 0x000FF000) >> 12; + skip = (SP_RD_LEN_REG & 0xFFF00000) >> 20; + /* length |= 07; // already corrected by mtc0 */ + ++length; + ++count; + skip += length; + do + { /* `count` always starts > 0, so we begin with `do` instead of `while`. */ + unsigned int offC, offD; /* SP cache and dynamic DMA pointers */ + register unsigned int i = 0; + + --count; + do + { + offC = (count*length + SP_MEM_ADDR_REG + i) & 0x00001FF8; + offD = (count*skip + SP_DRAM_ADDR_REG + i) & 0x00FFFFF8; + memcpy(state->DMEM + offC, state->RDRAM + offD, 8); + i += 0x008; + } while (i < length); + } while (count); + SP_DMA_BUSY_REG = 0x00000000; + SP_STATUS_REG &= ~0x00000004; /* SP_STATUS_DMABUSY */ +} +void SP_DMA_WRITE(usf_state_t * state) +{ + register unsigned int length; + register unsigned int count; + register unsigned int skip; + + length = (SP_WR_LEN_REG & 0x00000FFF) >> 0; + count = (SP_WR_LEN_REG & 0x000FF000) >> 12; + skip = (SP_WR_LEN_REG & 0xFFF00000) >> 20; + /* length |= 07; // already corrected by mtc0 */ + ++length; + ++count; + skip += length; + do + { /* `count` always starts > 0, so we begin with `do` instead of `while`. */ + unsigned int offC, offD; /* SP cache and dynamic DMA pointers */ + register unsigned int i = 0; + + --count; + do + { + offC = (count*length + SP_MEM_ADDR_REG + i) & 0x00001FF8; + offD = (count*skip + SP_DRAM_ADDR_REG + i) & 0x00FFFFF8; + memcpy(state->RDRAM + offD, state->DMEM + offC, 8); + i += 0x000008; + } while (i < length); + } while (count); + SP_DMA_BUSY_REG = 0x00000000; + SP_STATUS_REG &= ~0x00000004; /* SP_STATUS_DMABUSY */ +} +#endif + +/*** Scalar, Coprocessor Operations (vector unit) ***/ + +/* + * Since RSP vectors are stored 100% accurately as big-endian arrays for the + * proper vector operation math to be done, LWC2 and SWC2 emulation code will + * have to look a little different. zilmar's method is to distort the endian + * using an array of unions, permitting hacked byte- and halfword-precision. + */ + +/* + * Universal byte-access macro for 16*8 halfword vectors. + * Use this macro if you are not sure whether the element is odd or even. + */ +#define VR_B(vt,element) (*(byte *)((byte *)(state->VR[vt]) + MES(element))) + +/* + * Optimized byte-access macros for the vector registers. + * Use these ONLY if you know the element is even (or odd in the second). + */ +#define VR_A(vt,element) (*(byte *)((byte *)(state->VR[vt]) + element + MES(0x0))) +#define VR_U(vt,element) (*(byte *)((byte *)(state->VR[vt]) + element - MES(0x0))) + +/* + * Optimized halfword-access macro for indexing eight-element vectors. + * Use this ONLY if you know the element is even, not odd. + * + * If the four-bit element is odd, then there is no solution in one hit. + */ +#define VR_S(vt,element) (*(short *)((byte *)(state->VR[vt]) + element)) + +static unsigned short get_VCO(usf_state_t * state); +static unsigned short get_VCC(usf_state_t * state); +static unsigned char get_VCE(usf_state_t * state); +static void set_VCO(usf_state_t * state, unsigned short VCO); +static void set_VCC(usf_state_t * state, unsigned short VCC); +static void set_VCE(usf_state_t * state, unsigned char VCE); + +static unsigned short rwR_VCE(usf_state_t * state) +{ /* never saw a game try to read VCE out to a scalar GPR yet */ + register unsigned short ret_slot; + + ret_slot = 0x00 | (unsigned short)get_VCE(state); + return (ret_slot); +} +static void rwW_VCE(usf_state_t * state, unsigned short VCE) +{ /* never saw a game try to write VCE using a scalar GPR yet */ + register int i; + + VCE = 0x00 | (VCE & 0xFF); + for (i = 0; i < 8; i++) + state->vce[i] = (VCE >> i) & 1; + return; +} + +static unsigned short (*R_VCF[32])(usf_state_t *) = { + get_VCO,get_VCC,rwR_VCE,rwR_VCE, +/* Hazard reaction barrier: RD = (UINT16)(inst) >> 11, without &= 3. */ + get_VCO,get_VCC,rwR_VCE,rwR_VCE, + get_VCO,get_VCC,rwR_VCE,rwR_VCE, + get_VCO,get_VCC,rwR_VCE,rwR_VCE, + get_VCO,get_VCC,rwR_VCE,rwR_VCE, + get_VCO,get_VCC,rwR_VCE,rwR_VCE, + get_VCO,get_VCC,rwR_VCE,rwR_VCE, + get_VCO,get_VCC,rwR_VCE,rwR_VCE +}; +static void (*W_VCF[32])(usf_state_t *, unsigned short) = { + set_VCO,set_VCC,rwW_VCE,rwW_VCE, +/* Hazard reaction barrier: RD = (UINT16)(inst) >> 11, without &= 3. */ + set_VCO,set_VCC,rwW_VCE,rwW_VCE, + set_VCO,set_VCC,rwW_VCE,rwW_VCE, + set_VCO,set_VCC,rwW_VCE,rwW_VCE, + set_VCO,set_VCC,rwW_VCE,rwW_VCE, + set_VCO,set_VCC,rwW_VCE,rwW_VCE, + set_VCO,set_VCC,rwW_VCE,rwW_VCE, + set_VCO,set_VCC,rwW_VCE,rwW_VCE +}; +static void MFC2(usf_state_t * state, int rt, int vs, int e) +{ + SR_B(rt, 2) = VR_B(vs, e); + e = (e + 0x1) & 0xF; + SR_B(rt, 3) = VR_B(vs, e); + state->SR[rt] = (signed short)(state->SR[rt]); + state->SR[0] = 0x00000000; + return; +} +static void MTC2(usf_state_t * state, int rt, int vd, int e) +{ + VR_B(vd, e+0x0) = SR_B(rt, 2); + VR_B(vd, e+0x1) = SR_B(rt, 3); + return; /* If element == 0xF, it does not matter; loads do not wrap over. */ +} +static void CFC2(usf_state_t * state, int rt, int rd) +{ + state->SR[rt] = (signed short)R_VCF[rd](state); + state->SR[0] = 0x00000000; + return; +} +static void CTC2(usf_state_t * state, int rt, int rd) +{ + W_VCF[rd](state, state->SR[rt] & 0x0000FFFF); + return; +} + +/*** Scalar, Coprocessor Operations (vector unit, scalar cache transfers) ***/ +INLINE static void LBV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + const int e = element; + + addr = (state->SR[base] + 1*offset) & 0x00000FFF; + VR_B(vt, e) = state->DMEM[BES(addr)]; + return; +} +INLINE static void LSV(usf_state_t * state, int vt, int element, int offset, int base) +{ + int correction; + register uint32_t addr; + const int e = element; + + if (e & 0x1) + { + message(state, "LSV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 2*offset) & 0x00000FFF; + correction = addr % 0x004; + if (correction == 0x003) + { + message(state, "LSV\nWeird addr.", 3); + return; + } + VR_S(vt, e) = *(short *)(state->DMEM + addr - HES(0x000)*(correction - 1)); + return; +} +INLINE static void LLV(usf_state_t * state, int vt, int element, int offset, int base) +{ + int correction; + register uint32_t addr; + const int e = element; + + if (e & 0x1) + { + message(state, "LLV\nOdd element.", 3); + return; + } /* Illegal (but still even) elements are used by Boss Game Studios. */ + addr = (state->SR[base] + 4*offset) & 0x00000FFF; + if (addr & 0x00000001) + { + message(state, "LLV\nOdd addr.", 3); + return; + } + correction = HES(0x000)*(addr%0x004 - 1); + VR_S(vt, e+0x0) = *(short *)(state->DMEM + addr - correction); + addr = (addr + 0x00000002) & 0x00000FFF; /* F3DLX 1.23: addr%4 is 0x002. */ + VR_S(vt, e+0x2) = *(short *)(state->DMEM + addr + correction); + return; +} +INLINE static void LDV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + const int e = element; + + if (e & 0x1) + { + message(state, "LDV\nOdd element.", 3); + return; + } /* Illegal (but still even) elements are used by Boss Game Studios. */ + addr = (state->SR[base] + 8*offset) & 0x00000FFF; + switch (addr & 07) + { + case 00: + VR_S(vt, e+0x0) = *(short *)(state->DMEM + addr + HES(0x000)); + VR_S(vt, e+0x2) = *(short *)(state->DMEM + addr + HES(0x002)); + VR_S(vt, e+0x4) = *(short *)(state->DMEM + addr + HES(0x004)); + VR_S(vt, e+0x6) = *(short *)(state->DMEM + addr + HES(0x006)); + return; + case 01: /* standard ABI ucodes (unlike e.g. MusyX w/ even addresses) */ + VR_S(vt, e+0x0) = *(short *)(state->DMEM + addr + 0x000); + VR_A(vt, e+0x2) = state->DMEM[addr + 0x002 - BES(0x000)]; + VR_U(vt, e+0x3) = state->DMEM[addr + 0x003 + BES(0x000)]; + VR_S(vt, e+0x4) = *(short *)(state->DMEM + addr + 0x004); + VR_A(vt, e+0x6) = state->DMEM[addr + 0x006 - BES(0x000)]; + addr += 0x007 + BES(00); + addr &= 0x00000FFF; + VR_U(vt, e+0x7) = state->DMEM[addr]; + return; + case 02: + VR_S(vt, e+0x0) = *(short *)(state->DMEM + addr + 0x000 - HES(0x000)); + VR_S(vt, e+0x2) = *(short *)(state->DMEM + addr + 0x002 + HES(0x000)); + VR_S(vt, e+0x4) = *(short *)(state->DMEM + addr + 0x004 - HES(0x000)); + addr += 0x006 + HES(00); + addr &= 0x00000FFF; + VR_S(vt, e+0x6) = *(short *)(state->DMEM + addr); + return; + case 03: /* standard ABI ucodes (unlike e.g. MusyX w/ even addresses) */ + VR_A(vt, e+0x0) = state->DMEM[addr + 0x000 - BES(0x000)]; + VR_U(vt, e+0x1) = state->DMEM[addr + 0x001 + BES(0x000)]; + VR_S(vt, e+0x2) = *(short *)(state->DMEM + addr + 0x002); + VR_A(vt, e+0x4) = state->DMEM[addr + 0x004 - BES(0x000)]; + addr += 0x005 + BES(00); + addr &= 0x00000FFF; + VR_U(vt, e+0x5) = state->DMEM[addr]; + VR_S(vt, e+0x6) = *(short *)(state->DMEM + addr + 0x001 - BES(0x000)); + return; + case 04: + VR_S(vt, e+0x0) = *(short *)(state->DMEM + addr + HES(0x000)); + VR_S(vt, e+0x2) = *(short *)(state->DMEM + addr + HES(0x002)); + addr += 0x004 + WES(00); + addr &= 0x00000FFF; + VR_S(vt, e+0x4) = *(short *)(state->DMEM + addr + HES(0x000)); + VR_S(vt, e+0x6) = *(short *)(state->DMEM + addr + HES(0x002)); + return; + case 05: /* standard ABI ucodes (unlike e.g. MusyX w/ even addresses) */ + VR_S(vt, e+0x0) = *(short *)(state->DMEM + addr + 0x000); + VR_A(vt, e+0x2) = state->DMEM[addr + 0x002 - BES(0x000)]; + addr += 0x003; + addr &= 0x00000FFF; + VR_U(vt, e+0x3) = state->DMEM[addr + BES(0x000)]; + VR_S(vt, e+0x4) = *(short *)(state->DMEM + addr + 0x001); + VR_A(vt, e+0x6) = state->DMEM[addr + BES(0x003)]; + VR_U(vt, e+0x7) = state->DMEM[addr + BES(0x004)]; + return; + case 06: + VR_S(vt, e+0x0) = *(short *)(state->DMEM + addr - HES(0x000)); + addr += 0x002; + addr &= 0x00000FFF; + VR_S(vt, e+0x2) = *(short *)(state->DMEM + addr + HES(0x000)); + VR_S(vt, e+0x4) = *(short *)(state->DMEM + addr + HES(0x002)); + VR_S(vt, e+0x6) = *(short *)(state->DMEM + addr + HES(0x004)); + return; + case 07: /* standard ABI ucodes (unlike e.g. MusyX w/ even addresses) */ + VR_A(vt, e+0x0) = state->DMEM[addr - BES(0x000)]; + addr += 0x001; + addr &= 0x00000FFF; + VR_U(vt, e+0x1) = state->DMEM[addr + BES(0x000)]; + VR_S(vt, e+0x2) = *(short *)(state->DMEM + addr + 0x001); + VR_A(vt, e+0x4) = state->DMEM[addr + BES(0x003)]; + VR_U(vt, e+0x5) = state->DMEM[addr + BES(0x004)]; + VR_S(vt, e+0x6) = *(short *)(state->DMEM + addr + 0x005); + return; + } +} +INLINE static void SBV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + const int e = element; + + addr = (state->SR[base] + 1*offset) & 0x00000FFF; + state->DMEM[BES(addr)] = VR_B(vt, e); + return; +} +INLINE static void SSV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + const int e = element; + + addr = (state->SR[base] + 2*offset) & 0x00000FFF; + state->DMEM[BES(addr)] = VR_B(vt, (e + 0x0)); + addr = (addr + 0x00000001) & 0x00000FFF; + state->DMEM[BES(addr)] = VR_B(vt, (e + 0x1) & 0xF); + return; +} +INLINE static void SLV(usf_state_t * state, int vt, int element, int offset, int base) +{ + int correction; + register uint32_t addr; + const int e = element; + + if ((e & 0x1) || e > 0xC) /* must support illegal even elements in F3DEX2 */ + { + message(state, "SLV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 4*offset) & 0x00000FFF; + if (addr & 0x00000001) + { + message(state, "SLV\nOdd addr.", 3); + return; + } + correction = HES(0x000)*(addr%0x004 - 1); + *(short *)(state->DMEM + addr - correction) = VR_S(vt, e+0x0); + addr = (addr + 0x00000002) & 0x00000FFF; /* F3DLX 0.95: "Mario Kart 64" */ + *(short *)(state->DMEM + addr + correction) = VR_S(vt, e+0x2); + return; +} +INLINE static void SDV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + const int e = element; + + addr = (state->SR[base] + 8*offset) & 0x00000FFF; + if (e > 0x8 || (e & 0x1)) + { /* Illegal elements with Boss Game Studios publications. */ + register int i; + + for (i = 0; i < 8; i++) + state->DMEM[BES(addr &= 0x00000FFF)] = VR_B(vt, (e+i)&0xF); + return; + } + switch (addr & 07) + { + case 00: + *(short *)(state->DMEM + addr + HES(0x000)) = VR_S(vt, e+0x0); + *(short *)(state->DMEM + addr + HES(0x002)) = VR_S(vt, e+0x2); + *(short *)(state->DMEM + addr + HES(0x004)) = VR_S(vt, e+0x4); + *(short *)(state->DMEM + addr + HES(0x006)) = VR_S(vt, e+0x6); + return; + case 01: /* "Tetrisphere" audio ucode */ + *(short *)(state->DMEM + addr + 0x000) = VR_S(vt, e+0x0); + state->DMEM[addr + 0x002 - BES(0x000)] = VR_A(vt, e+0x2); + state->DMEM[addr + 0x003 + BES(0x000)] = VR_U(vt, e+0x3); + *(short *)(state->DMEM + addr + 0x004) = VR_S(vt, e+0x4); + state->DMEM[addr + 0x006 - BES(0x000)] = VR_A(vt, e+0x6); + addr += 0x007 + BES(0x000); + addr &= 0x00000FFF; + state->DMEM[addr] = VR_U(vt, e+0x7); + return; + case 02: + *(short *)(state->DMEM + addr + 0x000 - HES(0x000)) = VR_S(vt, e+0x0); + *(short *)(state->DMEM + addr + 0x002 + HES(0x000)) = VR_S(vt, e+0x2); + *(short *)(state->DMEM + addr + 0x004 - HES(0x000)) = VR_S(vt, e+0x4); + addr += 0x006 + HES(0x000); + addr &= 0x00000FFF; + *(short *)(state->DMEM + addr) = VR_S(vt, e+0x6); + return; + case 03: /* "Tetrisphere" audio ucode */ + state->DMEM[addr + 0x000 - BES(0x000)] = VR_A(vt, e+0x0); + state->DMEM[addr + 0x001 + BES(0x000)] = VR_U(vt, e+0x1); + *(short *)(state->DMEM + addr + 0x002) = VR_S(vt, e+0x2); + state->DMEM[addr + 0x004 - BES(0x000)] = VR_A(vt, e+0x4); + addr += 0x005 + BES(0x000); + addr &= 0x00000FFF; + state->DMEM[addr] = VR_U(vt, e+0x5); + *(short *)(state->DMEM + addr + 0x001 - BES(0x000)) = VR_S(vt, 0x6); + return; + case 04: + *(short *)(state->DMEM + addr + HES(0x000)) = VR_S(vt, e+0x0); + *(short *)(state->DMEM + addr + HES(0x002)) = VR_S(vt, e+0x2); + addr = (addr + 0x004) & 0x00000FFF; + *(short *)(state->DMEM + addr + HES(0x000)) = VR_S(vt, e+0x4); + *(short *)(state->DMEM + addr + HES(0x002)) = VR_S(vt, e+0x6); + return; + case 05: /* "Tetrisphere" audio ucode */ + *(short *)(state->DMEM + addr + 0x000) = VR_S(vt, e+0x0); + state->DMEM[addr + 0x002 - BES(0x000)] = VR_A(vt, e+0x2); + addr = (addr + 0x003) & 0x00000FFF; + state->DMEM[addr + BES(0x000)] = VR_U(vt, e+0x3); + *(short *)(state->DMEM + addr + 0x001) = VR_S(vt, e+0x4); + state->DMEM[addr + BES(0x003)] = VR_A(vt, e+0x6); + state->DMEM[addr + BES(0x004)] = VR_U(vt, e+0x7); + return; + case 06: + *(short *)(state->DMEM + addr - HES(0x000)) = VR_S(vt, e+0x0); + addr = (addr + 0x002) & 0x00000FFF; + *(short *)(state->DMEM + addr + HES(0x000)) = VR_S(vt, e+0x2); + *(short *)(state->DMEM + addr + HES(0x002)) = VR_S(vt, e+0x4); + *(short *)(state->DMEM + addr + HES(0x004)) = VR_S(vt, e+0x6); + return; + case 07: /* "Tetrisphere" audio ucode */ + state->DMEM[addr - BES(0x000)] = VR_A(vt, e+0x0); + addr = (addr + 0x001) & 0x00000FFF; + state->DMEM[addr + BES(0x000)] = VR_U(vt, e+0x1); + *(short *)(state->DMEM + addr + 0x001) = VR_S(vt, e+0x2); + state->DMEM[addr + BES(0x003)] = VR_A(vt, e+0x4); + state->DMEM[addr + BES(0x004)] = VR_U(vt, e+0x5); + *(short *)(state->DMEM + addr + 0x005) = VR_S(vt, e+0x6); + return; + } +} + +/* + * Group II vector loads and stores: + * PV and UV (As of RCP implementation, XV and ZV are reserved opcodes.) + */ +INLINE static void LPV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + register int b; + const int e = element; + + if (e != 0x0) + { + message(state, "LPV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 8*offset) & 0x00000FFF; + b = addr & 07; + addr &= ~07; + switch (b) + { + case 00: + state->VR[vt][07] = state->DMEM[addr + BES(0x007)] << 8; + state->VR[vt][06] = state->DMEM[addr + BES(0x006)] << 8; + state->VR[vt][05] = state->DMEM[addr + BES(0x005)] << 8; + state->VR[vt][04] = state->DMEM[addr + BES(0x004)] << 8; + state->VR[vt][03] = state->DMEM[addr + BES(0x003)] << 8; + state->VR[vt][02] = state->DMEM[addr + BES(0x002)] << 8; + state->VR[vt][01] = state->DMEM[addr + BES(0x001)] << 8; + state->VR[vt][00] = state->DMEM[addr + BES(0x000)] << 8; + return; + case 01: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->VR[vt][00] = state->DMEM[addr + BES(0x001)] << 8; + state->VR[vt][01] = state->DMEM[addr + BES(0x002)] << 8; + state->VR[vt][02] = state->DMEM[addr + BES(0x003)] << 8; + state->VR[vt][03] = state->DMEM[addr + BES(0x004)] << 8; + state->VR[vt][04] = state->DMEM[addr + BES(0x005)] << 8; + state->VR[vt][05] = state->DMEM[addr + BES(0x006)] << 8; + state->VR[vt][06] = state->DMEM[addr + BES(0x007)] << 8; + addr += BES(0x008); + addr &= 0x00000FFF; + state->VR[vt][07] = state->DMEM[addr] << 8; + return; + case 02: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->VR[vt][00] = state->DMEM[addr + BES(0x002)] << 8; + state->VR[vt][01] = state->DMEM[addr + BES(0x003)] << 8; + state->VR[vt][02] = state->DMEM[addr + BES(0x004)] << 8; + state->VR[vt][03] = state->DMEM[addr + BES(0x005)] << 8; + state->VR[vt][04] = state->DMEM[addr + BES(0x006)] << 8; + state->VR[vt][05] = state->DMEM[addr + BES(0x007)] << 8; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][06] = state->DMEM[addr + BES(0x000)] << 8; + state->VR[vt][07] = state->DMEM[addr + BES(0x001)] << 8; + return; + case 03: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->VR[vt][00] = state->DMEM[addr + BES(0x003)] << 8; + state->VR[vt][01] = state->DMEM[addr + BES(0x004)] << 8; + state->VR[vt][02] = state->DMEM[addr + BES(0x005)] << 8; + state->VR[vt][03] = state->DMEM[addr + BES(0x006)] << 8; + state->VR[vt][04] = state->DMEM[addr + BES(0x007)] << 8; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][05] = state->DMEM[addr + BES(0x000)] << 8; + state->VR[vt][06] = state->DMEM[addr + BES(0x001)] << 8; + state->VR[vt][07] = state->DMEM[addr + BES(0x002)] << 8; + return; + case 04: /* "Resident Evil 2" in-game 3-D, F3DLX 2.08--"WWF No Mercy" */ + state->VR[vt][00] = state->DMEM[addr + BES(0x004)] << 8; + state->VR[vt][01] = state->DMEM[addr + BES(0x005)] << 8; + state->VR[vt][02] = state->DMEM[addr + BES(0x006)] << 8; + state->VR[vt][03] = state->DMEM[addr + BES(0x007)] << 8; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][04] = state->DMEM[addr + BES(0x000)] << 8; + state->VR[vt][05] = state->DMEM[addr + BES(0x001)] << 8; + state->VR[vt][06] = state->DMEM[addr + BES(0x002)] << 8; + state->VR[vt][07] = state->DMEM[addr + BES(0x003)] << 8; + return; + case 05: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->VR[vt][00] = state->DMEM[addr + BES(0x005)] << 8; + state->VR[vt][01] = state->DMEM[addr + BES(0x006)] << 8; + state->VR[vt][02] = state->DMEM[addr + BES(0x007)] << 8; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][03] = state->DMEM[addr + BES(0x000)] << 8; + state->VR[vt][04] = state->DMEM[addr + BES(0x001)] << 8; + state->VR[vt][05] = state->DMEM[addr + BES(0x002)] << 8; + state->VR[vt][06] = state->DMEM[addr + BES(0x003)] << 8; + state->VR[vt][07] = state->DMEM[addr + BES(0x004)] << 8; + return; + case 06: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->VR[vt][00] = state->DMEM[addr + BES(0x006)] << 8; + state->VR[vt][01] = state->DMEM[addr + BES(0x007)] << 8; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][02] = state->DMEM[addr + BES(0x000)] << 8; + state->VR[vt][03] = state->DMEM[addr + BES(0x001)] << 8; + state->VR[vt][04] = state->DMEM[addr + BES(0x002)] << 8; + state->VR[vt][05] = state->DMEM[addr + BES(0x003)] << 8; + state->VR[vt][06] = state->DMEM[addr + BES(0x004)] << 8; + state->VR[vt][07] = state->DMEM[addr + BES(0x005)] << 8; + return; + case 07: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->VR[vt][00] = state->DMEM[addr + BES(0x007)] << 8; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][01] = state->DMEM[addr + BES(0x000)] << 8; + state->VR[vt][02] = state->DMEM[addr + BES(0x001)] << 8; + state->VR[vt][03] = state->DMEM[addr + BES(0x002)] << 8; + state->VR[vt][04] = state->DMEM[addr + BES(0x003)] << 8; + state->VR[vt][05] = state->DMEM[addr + BES(0x004)] << 8; + state->VR[vt][06] = state->DMEM[addr + BES(0x005)] << 8; + state->VR[vt][07] = state->DMEM[addr + BES(0x006)] << 8; + return; + } +} +INLINE static void LUV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + register int b; + int e = element; + + addr = (state->SR[base] + 8*offset) & 0x00000FFF; + if (e != 0x0) + { /* "Mia Hamm Soccer 64" SP exception override (zilmar) */ + addr += -e & 0xF; + for (b = 0; b < 8; b++) + { + state->VR[vt][b] = state->DMEM[BES(addr &= 0x00000FFF)] << 7; + --e; + addr -= 16 * (e == 0x0); + ++addr; + } + return; + } + b = addr & 07; + addr &= ~07; + switch (b) + { + case 00: + state->VR[vt][07] = state->DMEM[addr + BES(0x007)] << 7; + state->VR[vt][06] = state->DMEM[addr + BES(0x006)] << 7; + state->VR[vt][05] = state->DMEM[addr + BES(0x005)] << 7; + state->VR[vt][04] = state->DMEM[addr + BES(0x004)] << 7; + state->VR[vt][03] = state->DMEM[addr + BES(0x003)] << 7; + state->VR[vt][02] = state->DMEM[addr + BES(0x002)] << 7; + state->VR[vt][01] = state->DMEM[addr + BES(0x001)] << 7; + state->VR[vt][00] = state->DMEM[addr + BES(0x000)] << 7; + return; + case 01: /* PKMN Puzzle League HVQM decoder */ + state->VR[vt][00] = state->DMEM[addr + BES(0x001)] << 7; + state->VR[vt][01] = state->DMEM[addr + BES(0x002)] << 7; + state->VR[vt][02] = state->DMEM[addr + BES(0x003)] << 7; + state->VR[vt][03] = state->DMEM[addr + BES(0x004)] << 7; + state->VR[vt][04] = state->DMEM[addr + BES(0x005)] << 7; + state->VR[vt][05] = state->DMEM[addr + BES(0x006)] << 7; + state->VR[vt][06] = state->DMEM[addr + BES(0x007)] << 7; + addr += BES(0x008); + addr &= 0x00000FFF; + state->VR[vt][07] = state->DMEM[addr] << 7; + return; + case 02: /* PKMN Puzzle League HVQM decoder */ + state->VR[vt][00] = state->DMEM[addr + BES(0x002)] << 7; + state->VR[vt][01] = state->DMEM[addr + BES(0x003)] << 7; + state->VR[vt][02] = state->DMEM[addr + BES(0x004)] << 7; + state->VR[vt][03] = state->DMEM[addr + BES(0x005)] << 7; + state->VR[vt][04] = state->DMEM[addr + BES(0x006)] << 7; + state->VR[vt][05] = state->DMEM[addr + BES(0x007)] << 7; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][06] = state->DMEM[addr + BES(0x000)] << 7; + state->VR[vt][07] = state->DMEM[addr + BES(0x001)] << 7; + return; + case 03: /* PKMN Puzzle League HVQM decoder */ + state->VR[vt][00] = state->DMEM[addr + BES(0x003)] << 7; + state->VR[vt][01] = state->DMEM[addr + BES(0x004)] << 7; + state->VR[vt][02] = state->DMEM[addr + BES(0x005)] << 7; + state->VR[vt][03] = state->DMEM[addr + BES(0x006)] << 7; + state->VR[vt][04] = state->DMEM[addr + BES(0x007)] << 7; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][05] = state->DMEM[addr + BES(0x000)] << 7; + state->VR[vt][06] = state->DMEM[addr + BES(0x001)] << 7; + state->VR[vt][07] = state->DMEM[addr + BES(0x002)] << 7; + return; + case 04: /* PKMN Puzzle League HVQM decoder */ + state->VR[vt][00] = state->DMEM[addr + BES(0x004)] << 7; + state->VR[vt][01] = state->DMEM[addr + BES(0x005)] << 7; + state->VR[vt][02] = state->DMEM[addr + BES(0x006)] << 7; + state->VR[vt][03] = state->DMEM[addr + BES(0x007)] << 7; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][04] = state->DMEM[addr + BES(0x000)] << 7; + state->VR[vt][05] = state->DMEM[addr + BES(0x001)] << 7; + state->VR[vt][06] = state->DMEM[addr + BES(0x002)] << 7; + state->VR[vt][07] = state->DMEM[addr + BES(0x003)] << 7; + return; + case 05: /* PKMN Puzzle League HVQM decoder */ + state->VR[vt][00] = state->DMEM[addr + BES(0x005)] << 7; + state->VR[vt][01] = state->DMEM[addr + BES(0x006)] << 7; + state->VR[vt][02] = state->DMEM[addr + BES(0x007)] << 7; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][03] = state->DMEM[addr + BES(0x000)] << 7; + state->VR[vt][04] = state->DMEM[addr + BES(0x001)] << 7; + state->VR[vt][05] = state->DMEM[addr + BES(0x002)] << 7; + state->VR[vt][06] = state->DMEM[addr + BES(0x003)] << 7; + state->VR[vt][07] = state->DMEM[addr + BES(0x004)] << 7; + return; + case 06: /* PKMN Puzzle League HVQM decoder */ + state->VR[vt][00] = state->DMEM[addr + BES(0x006)] << 7; + state->VR[vt][01] = state->DMEM[addr + BES(0x007)] << 7; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][02] = state->DMEM[addr + BES(0x000)] << 7; + state->VR[vt][03] = state->DMEM[addr + BES(0x001)] << 7; + state->VR[vt][04] = state->DMEM[addr + BES(0x002)] << 7; + state->VR[vt][05] = state->DMEM[addr + BES(0x003)] << 7; + state->VR[vt][06] = state->DMEM[addr + BES(0x004)] << 7; + state->VR[vt][07] = state->DMEM[addr + BES(0x005)] << 7; + return; + case 07: /* PKMN Puzzle League HVQM decoder */ + state->VR[vt][00] = state->DMEM[addr + BES(0x007)] << 7; + addr += 0x008; + addr &= 0x00000FFF; + state->VR[vt][01] = state->DMEM[addr + BES(0x000)] << 7; + state->VR[vt][02] = state->DMEM[addr + BES(0x001)] << 7; + state->VR[vt][03] = state->DMEM[addr + BES(0x002)] << 7; + state->VR[vt][04] = state->DMEM[addr + BES(0x003)] << 7; + state->VR[vt][05] = state->DMEM[addr + BES(0x004)] << 7; + state->VR[vt][06] = state->DMEM[addr + BES(0x005)] << 7; + state->VR[vt][07] = state->DMEM[addr + BES(0x006)] << 7; + return; + } +} +INLINE static void SPV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register int b; + register uint32_t addr; + const int e = element; + + if (e != 0x0) + { + message(state, "SPV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 8*offset) & 0x00000FFF; + b = addr & 07; + addr &= ~07; + switch (b) + { + case 00: + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][07] >> 8); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][06] >> 8); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][05] >> 8); + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][04] >> 8); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][03] >> 8); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][02] >> 8); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][01] >> 8); + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][00] >> 8); + return; + case 01: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][00] >> 8); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][01] >> 8); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][02] >> 8); + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][03] >> 8); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][04] >> 8); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][05] >> 8); + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][06] >> 8); + addr += BES(0x008); + addr &= 0x00000FFF; + state->DMEM[addr] = (unsigned char)(state->VR[vt][07] >> 8); + return; + case 02: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][00] >> 8); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][01] >> 8); + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][02] >> 8); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][03] >> 8); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][04] >> 8); + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][05] >> 8); + addr += 0x008; + addr &= 0x00000FFF; + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][06] >> 8); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][07] >> 8); + return; + case 03: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][00] >> 8); + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][01] >> 8); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][02] >> 8); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][03] >> 8); + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][04] >> 8); + addr += 0x008; + addr &= 0x00000FFF; + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][05] >> 8); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][06] >> 8); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][07] >> 8); + return; + case 04: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][00] >> 8); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][01] >> 8); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][02] >> 8); + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][03] >> 8); + addr += 0x008; + addr &= 0x00000FFF; + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][04] >> 8); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][05] >> 8); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][06] >> 8); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][07] >> 8); + return; + case 05: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][00] >> 8); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][01] >> 8); + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][02] >> 8); + addr += 0x008; + addr &= 0x00000FFF; + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][03] >> 8); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][04] >> 8); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][05] >> 8); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][06] >> 8); + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][07] >> 8); + return; + case 06: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][00] >> 8); + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][01] >> 8); + addr += 0x008; + addr &= 0x00000FFF; + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][02] >> 8); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][03] >> 8); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][04] >> 8); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][05] >> 8); + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][06] >> 8); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][07] >> 8); + return; + case 07: /* F3DZEX 2.08J "Doubutsu no Mori" (Animal Forest) CFB layer */ + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][00] >> 8); + addr += 0x008; + addr &= 0x00000FFF; + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][01] >> 8); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][02] >> 8); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][03] >> 8); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][04] >> 8); + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][05] >> 8); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][06] >> 8); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][07] >> 8); + return; + } +} +INLINE static void SUV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register int b; + register uint32_t addr; + const int e = element; + + if (e != 0x0) + { + message(state, "SUV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 8*offset) & 0x00000FFF; + b = addr & 07; + addr &= ~07; + switch (b) + { + case 00: + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][07] >> 7); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][06] >> 7); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][05] >> 7); + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][04] >> 7); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][03] >> 7); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][02] >> 7); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][01] >> 7); + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][00] >> 7); + return; + case 04: /* "Indiana Jones and the Infernal Machine" in-game */ + state->DMEM[addr + BES(0x004)] = (unsigned char)(state->VR[vt][00] >> 7); + state->DMEM[addr + BES(0x005)] = (unsigned char)(state->VR[vt][01] >> 7); + state->DMEM[addr + BES(0x006)] = (unsigned char)(state->VR[vt][02] >> 7); + state->DMEM[addr + BES(0x007)] = (unsigned char)(state->VR[vt][03] >> 7); + addr += 0x008; + addr &= 0x00000FFF; + state->DMEM[addr + BES(0x000)] = (unsigned char)(state->VR[vt][04] >> 7); + state->DMEM[addr + BES(0x001)] = (unsigned char)(state->VR[vt][05] >> 7); + state->DMEM[addr + BES(0x002)] = (unsigned char)(state->VR[vt][06] >> 7); + state->DMEM[addr + BES(0x003)] = (unsigned char)(state->VR[vt][07] >> 7); + return; + default: /* Completely legal, just never seen it be done. */ + message(state, "SUV\nWeird addr.", 3); + return; + } +} + +/* + * Group III vector loads and stores: + * HV, FV, and AV (As of RCP implementation, AV opcodes are reserved.) + */ +static void LHV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + const int e = element; + + if (e != 0x0) + { + message(state, "LHV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + if (addr & 0x0000000E) + { + message(state, "LHV\nIllegal addr.", 3); + return; + } + addr ^= MES(00); + state->VR[vt][07] = state->DMEM[addr + HES(0x00E)] << 7; + state->VR[vt][06] = state->DMEM[addr + HES(0x00C)] << 7; + state->VR[vt][05] = state->DMEM[addr + HES(0x00A)] << 7; + state->VR[vt][04] = state->DMEM[addr + HES(0x008)] << 7; + state->VR[vt][03] = state->DMEM[addr + HES(0x006)] << 7; + state->VR[vt][02] = state->DMEM[addr + HES(0x004)] << 7; + state->VR[vt][01] = state->DMEM[addr + HES(0x002)] << 7; + state->VR[vt][00] = state->DMEM[addr + HES(0x000)] << 7; + return; +} +NOINLINE static void LFV(usf_state_t * state, int vt, int element, int offset, int base) +{ + (void)state; + (void)vt; + (void)element; + (void)offset; + (void)base; + /* Dummy implementation only: Do any games execute this? */ + /*char debugger[32]; + + sprintf(debugger, "%s $v%i[0x%X], 0x%03X($%i)", "LFV", + vt, element, offset & 0xFFF, base); + message(state, debugger, 3);*/ + return; +} +static void SHV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + const int e = element; + + if (e != 0x0) + { + message(state, "SHV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + if (addr & 0x0000000E) + { + message(state, "SHV\nIllegal addr.", 3); + return; + } + addr ^= MES(00); + state->DMEM[addr + HES(0x00E)] = (unsigned char)(state->VR[vt][07] >> 7); + state->DMEM[addr + HES(0x00C)] = (unsigned char)(state->VR[vt][06] >> 7); + state->DMEM[addr + HES(0x00A)] = (unsigned char)(state->VR[vt][05] >> 7); + state->DMEM[addr + HES(0x008)] = (unsigned char)(state->VR[vt][04] >> 7); + state->DMEM[addr + HES(0x006)] = (unsigned char)(state->VR[vt][03] >> 7); + state->DMEM[addr + HES(0x004)] = (unsigned char)(state->VR[vt][02] >> 7); + state->DMEM[addr + HES(0x002)] = (unsigned char)(state->VR[vt][01] >> 7); + state->DMEM[addr + HES(0x000)] = (unsigned char)(state->VR[vt][00] >> 7); + return; +} +static void SFV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + const int e = element; + + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + addr &= 0x00000FF3; + addr ^= BES(00); + switch (e) + { + case 0x0: + state->DMEM[addr + 0x000] = (unsigned char)(state->VR[vt][00] >> 7); + state->DMEM[addr + 0x004] = (unsigned char)(state->VR[vt][01] >> 7); + state->DMEM[addr + 0x008] = (unsigned char)(state->VR[vt][02] >> 7); + state->DMEM[addr + 0x00C] = (unsigned char)(state->VR[vt][03] >> 7); + return; + case 0x8: + state->DMEM[addr + 0x000] = (unsigned char)(state->VR[vt][04] >> 7); + state->DMEM[addr + 0x004] = (unsigned char)(state->VR[vt][05] >> 7); + state->DMEM[addr + 0x008] = (unsigned char)(state->VR[vt][06] >> 7); + state->DMEM[addr + 0x00C] = (unsigned char)(state->VR[vt][07] >> 7); + return; + default: + message(state, "SFV\nIllegal element.", 3); + return; + } +} + +/* + * Group IV vector loads and stores: + * QV and RV + */ +INLINE static void LQV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + register int b; + const int e = element; /* Boss Game Studios illegal elements */ + + if (e & 0x1) + { + message(state, "LQV\nOdd element.", 3); + return; + } + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + if (addr & 0x00000001) + { + message(state, "LQV\nOdd addr.", 3); + return; + } + b = addr & 0x0000000F; + addr &= ~0x0000000F; + switch (b/2) /* mistake in SGI patent regarding LQV */ + { + case 0x0/2: + VR_S(vt,e+0x0) = *(short *)(state->DMEM + addr + HES(0x000)); + VR_S(vt,e+0x2) = *(short *)(state->DMEM + addr + HES(0x002)); + VR_S(vt,e+0x4) = *(short *)(state->DMEM + addr + HES(0x004)); + VR_S(vt,e+0x6) = *(short *)(state->DMEM + addr + HES(0x006)); + VR_S(vt,e+0x8) = *(short *)(state->DMEM + addr + HES(0x008)); + VR_S(vt,e+0xA) = *(short *)(state->DMEM + addr + HES(0x00A)); + VR_S(vt,e+0xC) = *(short *)(state->DMEM + addr + HES(0x00C)); + VR_S(vt,e+0xE) = *(short *)(state->DMEM + addr + HES(0x00E)); + return; + case 0x2/2: + VR_S(vt,e+0x0) = *(short *)(state->DMEM + addr + HES(0x002)); + VR_S(vt,e+0x2) = *(short *)(state->DMEM + addr + HES(0x004)); + VR_S(vt,e+0x4) = *(short *)(state->DMEM + addr + HES(0x006)); + VR_S(vt,e+0x6) = *(short *)(state->DMEM + addr + HES(0x008)); + VR_S(vt,e+0x8) = *(short *)(state->DMEM + addr + HES(0x00A)); + VR_S(vt,e+0xA) = *(short *)(state->DMEM + addr + HES(0x00C)); + VR_S(vt,e+0xC) = *(short *)(state->DMEM + addr + HES(0x00E)); + return; + case 0x4/2: + VR_S(vt,e+0x0) = *(short *)(state->DMEM + addr + HES(0x004)); + VR_S(vt,e+0x2) = *(short *)(state->DMEM + addr + HES(0x006)); + VR_S(vt,e+0x4) = *(short *)(state->DMEM + addr + HES(0x008)); + VR_S(vt,e+0x6) = *(short *)(state->DMEM + addr + HES(0x00A)); + VR_S(vt,e+0x8) = *(short *)(state->DMEM + addr + HES(0x00C)); + VR_S(vt,e+0xA) = *(short *)(state->DMEM + addr + HES(0x00E)); + return; + case 0x6/2: + VR_S(vt,e+0x0) = *(short *)(state->DMEM + addr + HES(0x006)); + VR_S(vt,e+0x2) = *(short *)(state->DMEM + addr + HES(0x008)); + VR_S(vt,e+0x4) = *(short *)(state->DMEM + addr + HES(0x00A)); + VR_S(vt,e+0x6) = *(short *)(state->DMEM + addr + HES(0x00C)); + VR_S(vt,e+0x8) = *(short *)(state->DMEM + addr + HES(0x00E)); + return; + case 0x8/2: /* "Resident Evil 2" cinematics and Boss Game Studios */ + VR_S(vt,e+0x0) = *(short *)(state->DMEM + addr + HES(0x008)); + VR_S(vt,e+0x2) = *(short *)(state->DMEM + addr + HES(0x00A)); + VR_S(vt,e+0x4) = *(short *)(state->DMEM + addr + HES(0x00C)); + VR_S(vt,e+0x6) = *(short *)(state->DMEM + addr + HES(0x00E)); + return; + case 0xA/2: /* "Conker's Bad Fur Day" audio microcode by Rareware */ + VR_S(vt,e+0x0) = *(short *)(state->DMEM + addr + HES(0x00A)); + VR_S(vt,e+0x2) = *(short *)(state->DMEM + addr + HES(0x00C)); + VR_S(vt,e+0x4) = *(short *)(state->DMEM + addr + HES(0x00E)); + return; + case 0xC/2: /* "Conker's Bad Fur Day" audio microcode by Rareware */ + VR_S(vt,e+0x0) = *(short *)(state->DMEM + addr + HES(0x00C)); + VR_S(vt,e+0x2) = *(short *)(state->DMEM + addr + HES(0x00E)); + return; + case 0xE/2: /* "Conker's Bad Fur Day" audio microcode by Rareware */ + VR_S(vt,e+0x0) = *(short *)(state->DMEM + addr + HES(0x00E)); + return; + } +} +static void LRV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + register int b; + const int e = element; + + if (e != 0x0) + { + message(state, "LRV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + if (addr & 0x00000001) + { + message(state, "LRV\nOdd addr.", 3); + return; + } + b = addr & 0x0000000F; + addr &= ~0x0000000F; + switch (b/2) + { + case 0xE/2: + state->VR[vt][01] = *(short *)(state->DMEM + addr + HES(0x000)); + state->VR[vt][02] = *(short *)(state->DMEM + addr + HES(0x002)); + state->VR[vt][03] = *(short *)(state->DMEM + addr + HES(0x004)); + state->VR[vt][04] = *(short *)(state->DMEM + addr + HES(0x006)); + state->VR[vt][05] = *(short *)(state->DMEM + addr + HES(0x008)); + state->VR[vt][06] = *(short *)(state->DMEM + addr + HES(0x00A)); + state->VR[vt][07] = *(short *)(state->DMEM + addr + HES(0x00C)); + return; + case 0xC/2: + state->VR[vt][02] = *(short *)(state->DMEM + addr + HES(0x000)); + state->VR[vt][03] = *(short *)(state->DMEM + addr + HES(0x002)); + state->VR[vt][04] = *(short *)(state->DMEM + addr + HES(0x004)); + state->VR[vt][05] = *(short *)(state->DMEM + addr + HES(0x006)); + state->VR[vt][06] = *(short *)(state->DMEM + addr + HES(0x008)); + state->VR[vt][07] = *(short *)(state->DMEM + addr + HES(0x00A)); + return; + case 0xA/2: + state->VR[vt][03] = *(short *)(state->DMEM + addr + HES(0x000)); + state->VR[vt][04] = *(short *)(state->DMEM + addr + HES(0x002)); + state->VR[vt][05] = *(short *)(state->DMEM + addr + HES(0x004)); + state->VR[vt][06] = *(short *)(state->DMEM + addr + HES(0x006)); + state->VR[vt][07] = *(short *)(state->DMEM + addr + HES(0x008)); + return; + case 0x8/2: + state->VR[vt][04] = *(short *)(state->DMEM + addr + HES(0x000)); + state->VR[vt][05] = *(short *)(state->DMEM + addr + HES(0x002)); + state->VR[vt][06] = *(short *)(state->DMEM + addr + HES(0x004)); + state->VR[vt][07] = *(short *)(state->DMEM + addr + HES(0x006)); + return; + case 0x6/2: + state->VR[vt][05] = *(short *)(state->DMEM + addr + HES(0x000)); + state->VR[vt][06] = *(short *)(state->DMEM + addr + HES(0x002)); + state->VR[vt][07] = *(short *)(state->DMEM + addr + HES(0x004)); + return; + case 0x4/2: + state->VR[vt][06] = *(short *)(state->DMEM + addr + HES(0x000)); + state->VR[vt][07] = *(short *)(state->DMEM + addr + HES(0x002)); + return; + case 0x2/2: + state->VR[vt][07] = *(short *)(state->DMEM + addr + HES(0x000)); + return; + case 0x0/2: + return; + } +} +INLINE static void SQV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + register int b; + const int e = element; + + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + if (e != 0x0) + { /* happens with "Mia Hamm Soccer 64" */ + register int i; + + for (i = 0; i < (int)(16 - addr%16); i++) + state->DMEM[BES((addr + i) & 0xFFF)] = VR_B(vt, (e + i) & 0xF); + return; + } + b = addr & 0x0000000F; + addr &= ~0x0000000F; + switch (b) + { + case 00: + *(short *)(state->DMEM + addr + HES(0x000)) = state->VR[vt][00]; + *(short *)(state->DMEM + addr + HES(0x002)) = state->VR[vt][01]; + *(short *)(state->DMEM + addr + HES(0x004)) = state->VR[vt][02]; + *(short *)(state->DMEM + addr + HES(0x006)) = state->VR[vt][03]; + *(short *)(state->DMEM + addr + HES(0x008)) = state->VR[vt][04]; + *(short *)(state->DMEM + addr + HES(0x00A)) = state->VR[vt][05]; + *(short *)(state->DMEM + addr + HES(0x00C)) = state->VR[vt][06]; + *(short *)(state->DMEM + addr + HES(0x00E)) = state->VR[vt][07]; + return; + case 02: + *(short *)(state->DMEM + addr + HES(0x002)) = state->VR[vt][00]; + *(short *)(state->DMEM + addr + HES(0x004)) = state->VR[vt][01]; + *(short *)(state->DMEM + addr + HES(0x006)) = state->VR[vt][02]; + *(short *)(state->DMEM + addr + HES(0x008)) = state->VR[vt][03]; + *(short *)(state->DMEM + addr + HES(0x00A)) = state->VR[vt][04]; + *(short *)(state->DMEM + addr + HES(0x00C)) = state->VR[vt][05]; + *(short *)(state->DMEM + addr + HES(0x00E)) = state->VR[vt][06]; + return; + case 04: + *(short *)(state->DMEM + addr + HES(0x004)) = state->VR[vt][00]; + *(short *)(state->DMEM + addr + HES(0x006)) = state->VR[vt][01]; + *(short *)(state->DMEM + addr + HES(0x008)) = state->VR[vt][02]; + *(short *)(state->DMEM + addr + HES(0x00A)) = state->VR[vt][03]; + *(short *)(state->DMEM + addr + HES(0x00C)) = state->VR[vt][04]; + *(short *)(state->DMEM + addr + HES(0x00E)) = state->VR[vt][05]; + return; + case 06: + *(short *)(state->DMEM + addr + HES(0x006)) = state->VR[vt][00]; + *(short *)(state->DMEM + addr + HES(0x008)) = state->VR[vt][01]; + *(short *)(state->DMEM + addr + HES(0x00A)) = state->VR[vt][02]; + *(short *)(state->DMEM + addr + HES(0x00C)) = state->VR[vt][03]; + *(short *)(state->DMEM + addr + HES(0x00E)) = state->VR[vt][04]; + return; + default: + message(state, "SQV\nWeird addr.", 3); + return; + } +} +static void SRV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register uint32_t addr; + register int b; + const int e = element; + + if (e != 0x0) + { + message(state, "SRV\nIllegal element.", 3); + return; + } + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + if (addr & 0x00000001) + { + message(state, "SRV\nOdd addr.", 3); + return; + } + b = addr & 0x0000000F; + addr &= ~0x0000000F; + switch (b/2) + { + case 0xE/2: + *(short *)(state->DMEM + addr + HES(0x000)) = state->VR[vt][01]; + *(short *)(state->DMEM + addr + HES(0x002)) = state->VR[vt][02]; + *(short *)(state->DMEM + addr + HES(0x004)) = state->VR[vt][03]; + *(short *)(state->DMEM + addr + HES(0x006)) = state->VR[vt][04]; + *(short *)(state->DMEM + addr + HES(0x008)) = state->VR[vt][05]; + *(short *)(state->DMEM + addr + HES(0x00A)) = state->VR[vt][06]; + *(short *)(state->DMEM + addr + HES(0x00C)) = state->VR[vt][07]; + return; + case 0xC/2: + *(short *)(state->DMEM + addr + HES(0x000)) = state->VR[vt][02]; + *(short *)(state->DMEM + addr + HES(0x002)) = state->VR[vt][03]; + *(short *)(state->DMEM + addr + HES(0x004)) = state->VR[vt][04]; + *(short *)(state->DMEM + addr + HES(0x006)) = state->VR[vt][05]; + *(short *)(state->DMEM + addr + HES(0x008)) = state->VR[vt][06]; + *(short *)(state->DMEM + addr + HES(0x00A)) = state->VR[vt][07]; + return; + case 0xA/2: + *(short *)(state->DMEM + addr + HES(0x000)) = state->VR[vt][03]; + *(short *)(state->DMEM + addr + HES(0x002)) = state->VR[vt][04]; + *(short *)(state->DMEM + addr + HES(0x004)) = state->VR[vt][05]; + *(short *)(state->DMEM + addr + HES(0x006)) = state->VR[vt][06]; + *(short *)(state->DMEM + addr + HES(0x008)) = state->VR[vt][07]; + return; + case 0x8/2: + *(short *)(state->DMEM + addr + HES(0x000)) = state->VR[vt][04]; + *(short *)(state->DMEM + addr + HES(0x002)) = state->VR[vt][05]; + *(short *)(state->DMEM + addr + HES(0x004)) = state->VR[vt][06]; + *(short *)(state->DMEM + addr + HES(0x006)) = state->VR[vt][07]; + return; + case 0x6/2: + *(short *)(state->DMEM + addr + HES(0x000)) = state->VR[vt][05]; + *(short *)(state->DMEM + addr + HES(0x002)) = state->VR[vt][06]; + *(short *)(state->DMEM + addr + HES(0x004)) = state->VR[vt][07]; + return; + case 0x4/2: + *(short *)(state->DMEM + addr + HES(0x000)) = state->VR[vt][06]; + *(short *)(state->DMEM + addr + HES(0x002)) = state->VR[vt][07]; + return; + case 0x2/2: + *(short *)(state->DMEM + addr + HES(0x000)) = state->VR[vt][07]; + return; + case 0x0/2: + return; + } +} + +/* + * Group V vector loads and stores + * TV and SWV (As of RCP implementation, LTWV opcode was undesired.) + */ +INLINE static void LTV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register int i; + register uint32_t addr; + const int e = element; + + if (e & 1) + { + message(state, "LTV\nIllegal element.", 3); + return; + } + if (vt & 07) + { + message(state, "LTV\nUncertain case!", 3); + return; /* For LTV I am not sure; for STV I have an idea. */ + } + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + if (addr & 0x0000000F) + { + message(state, "LTV\nIllegal addr.", 3); + return; + } + for (i = 0; i < 8; i++) /* SGI screwed LTV up on N64. See STV instead. */ + state->VR[vt+i][(-e/2 + i) & 07] = *(short *)(state->DMEM + addr + HES(2*i)); + return; +} +NOINLINE static void SWV(usf_state_t * state, int vt, int element, int offset, int base) +{ + (void)state; + (void)vt; + (void)element; + (void)offset; + (void)base; + /* Dummy implementation only: Do any games execute this? */ + /*char debugger[32]; + + sprintf(debugger, "%s $v%i[0x%X], 0x%03X($%i)", "SWV", + vt, element, offset & 0xFFF, base); + message(state, debugger, 3);*/ + return; +} +INLINE static void STV(usf_state_t * state, int vt, int element, int offset, int base) +{ + register int i; + register uint32_t addr; + const int e = element; + + if (e & 1) + { + message(state, "STV\nIllegal element.", 3); + return; + } + if (vt & 07) + { + message(state, "STV\nUncertain case!", 2); + return; /* vt &= 030; */ + } + addr = (state->SR[base] + 16*offset) & 0x00000FFF; + if (addr & 0x0000000F) + { + message(state, "STV\nIllegal addr.", 3); + return; + } + for (i = 0; i < 8; i++) + *(short *)(state->DMEM + addr + HES(2*i)) = state->VR[vt + (e/2 + i)%8][i]; + return; +} + +/*** Modern pseudo-operations (not real instructions, but nice shortcuts) ***/ +void ULW(usf_state_t * state, int rd, uint32_t addr) +{ /* "Unaligned Load Word" */ + union { + unsigned char B[4]; + signed char SB[4]; + unsigned short H[2]; + signed short SH[2]; + unsigned W: 32; + } SR_temp; + if (addr & 0x00000001) + { + SR_temp.B[03] = state->DMEM[BES(addr)]; + addr = (addr + 0x001) & 0xFFF; + SR_temp.B[02] = state->DMEM[BES(addr)]; + addr = (addr + 0x001) & 0xFFF; + SR_temp.B[01] = state->DMEM[BES(addr)]; + addr = (addr + 0x001) & 0xFFF; + SR_temp.B[00] = state->DMEM[BES(addr)]; + } + else /* addr & 0x00000002 */ + { + SR_temp.H[01] = *(short *)(state->DMEM + addr - HES(0x000)); + addr = (addr + 0x002) & 0xFFF; + SR_temp.H[00] = *(short *)(state->DMEM + addr + HES(0x000)); + } + state->SR[rd] = SR_temp.W; + /* state->SR[0] = 0x00000000; */ + return; +} +void USW(usf_state_t * state, int rs, uint32_t addr) +{ /* "Unaligned Store Word" */ + union { + unsigned char B[4]; + signed char SB[4]; + unsigned short H[2]; + signed short SH[2]; + unsigned W: 32; + } SR_temp; + SR_temp.W = state->SR[rs]; + if (addr & 0x00000001) + { + state->DMEM[BES(addr)] = SR_temp.B[03]; + addr = (addr + 0x001) & 0xFFF; + state->DMEM[BES(addr)] = SR_temp.B[02]; + addr = (addr + 0x001) & 0xFFF; + state->DMEM[BES(addr)] = SR_temp.B[01]; + addr = (addr + 0x001) & 0xFFF; + state->DMEM[BES(addr)] = SR_temp.B[00]; + } + else /* addr & 0x00000002 */ + { + *(short *)(state->DMEM + addr - HES(0x000)) = SR_temp.H[01]; + addr = (addr + 0x002) & 0xFFF; + *(short *)(state->DMEM + addr + HES(0x000)) = SR_temp.H[00]; + } + return; +} + +#endif diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/cf.h b/Frameworks/lazyusf/lazyusf/rsp/vu/cf.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/cf.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/cf.h diff --git a/Frameworks/lazyusf/lazyusf/rsp/vu/clamp.h b/Frameworks/lazyusf/lazyusf/rsp/vu/clamp.h new file mode 100644 index 000000000..d238931af --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/rsp/vu/clamp.h @@ -0,0 +1,403 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.10.07 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#ifndef _CLAMP_H +#define _CLAMP_H + +/* + * for ANSI compliance (null INLINE attribute if not already set to `inline`) + * Include "rsp.h" for active, non-ANSI inline definition. + */ +#ifndef INLINE +#define INLINE +#endif + +/* + * dependency for 48-bit accumulator access + */ +#include "vu.h" + +/* + * vector select merge (`VMRG`) formula + * + * This is really just a vectorizer for ternary conditional storage. + * I've named it so because it directly maps to the VMRG op-code. + * -- example -- + * for (i = 0; i < N; i++) + * if (c_pass) + * dest = element_a; + * else + * dest = element_b; + */ +static INLINE void merge(short* VD, short* cmp, short* pass, short* fail) +{ + register int i; + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t p,f,d,c,vd,temp; + + p = vld1q_s16((const int16_t*)pass); + f = vld1q_s16((const int16_t*)fail); + c = vld1q_s16((const int16_t*)cmp); + + d = vsubq_s16(p,f); + vd = vmlaq_s16(f, c, d); //vd = f + (cmp * d) + vst1q_s16(VD, vd); + return; + +#else + +#if (0) +/* Do not use this version yet, as it still does not vectorize to SSE2. */ + for (i = 0; i < N; i++) + VD[i] = (cmp[i] != 0) ? pass[i] : fail[i]; +#else + ALIGNED short diff[N]; + + for (i = 0; i < N; i++) + diff[i] = pass[i] - fail[i]; + for (i = 0; i < N; i++) + VD[i] = fail[i] + cmp[i]*diff[i]; /* actually `(cmp[i] != 0)*diff[i]` */ +#endif + return; + +#endif +} + +#ifdef ARCH_MIN_ARM_NEON +static INLINE void vector_copy(short * VD, short * VS) +{ + int16x8_t xmm; + xmm = vld1q_s16((const int16_t*)VS); + vst1q_s16(VD, xmm); + + return; +} + +static INLINE void SIGNED_CLAMP_ADD(usf_state_t * state, short* VD, short* VS, short* VT) +{ + int16x8_t dst, src, vco, max, min; + + src = vld1q_s16((const int16_t*)VS); + dst = vld1q_s16((const int16_t*)VT); + vco = vld1q_s16((const int16_t*)state->co); + + max = vmaxq_s16(dst, src); + min = vminq_s16(dst, src); + + min = vqaddq_s16(min, vco); + max = vqaddq_s16(max, min); + + vst1q_s16(VD, max); + return; + +} + +static INLINE void SIGNED_CLAMP_SUB(usf_state_t * state, short* VD, short* VS, short* VT) +{ + int16x8_t dst, src, vco, dif, res, xmm,vd; + + src = vld1q_s16((const int16_t*)VS); + vd = vld1q_s16((const int16_t*)VD); + dst = vld1q_s16((const int16_t*)VT); + vco = vld1q_s16((const int16_t*)state->co); + + res = vqsubq_s16(src, dst); + + dif = vaddq_s16(res, vco); + dif = veorq_s16(dif, res); + dif = vandq_s16(dif, dst); + xmm = vsubq_s16(src, dst); + src = vbicq_s16(dif, src); + xmm = vandq_s16(xmm, src); + xmm = vshrq_n_s16(xmm, 15); + + xmm = vbicq_s16(vco, xmm); + res = vqsubq_s16(res, xmm); + vst1q_s16(VD, res); + + return; + +} + +static INLINE void SIGNED_CLAMP_AM(usf_state_t * state, short* VD) +{ + int16x8_t pvs, pvd; + int16x8x2_t packed; + int16x8_t result; + int16x4_t low, high; + + pvs = vld1q_s16((const int16_t*)VACC_H); + pvd = vld1q_s16((const int16_t*)VACC_M); + + packed = vzipq_s16(pvd,pvs); + + low = vqmovn_s32((int32x4_t)packed.val[0]); + high = vqmovn_s32((int32x4_t)packed.val[1]); + + result = vcombine_s16(low,high); + + vst1q_s16(VD,result); + + return; +} + +#endif + +#if !defined ARCH_MIN_SSE2 && !defined ARCH_MIN_ARM_NEON + +static INLINE void vector_copy(short* VD, short* VS) +{ +#if (0) + memcpy(VD, VS, N*sizeof(short)); +#else + register int i; + + for (i = 0; i < N; i++) + VD[i] = VS[i]; +#endif + return; +} + +static INLINE void SIGNED_CLAMP_ADD(usf_state_t * state, short* VD, short* VS, short* VT) +{ + ALIGNED int32_t sum[N]; + ALIGNED short hi[N], lo[N]; + register int i; + + for (i = 0; i < N; i++) + sum[i] = VS[i] + VT[i] + state->co[i]; + for (i = 0; i < N; i++) + lo[i] = (sum[i] + 0x8000) >> 31; + for (i = 0; i < N; i++) + hi[i] = (0x7FFF - sum[i]) >> 31; + vector_copy(VD, VACC_L); + for (i = 0; i < N; i++) + VD[i] &= ~lo[i]; + for (i = 0; i < N; i++) + VD[i] |= hi[i]; + for (i = 0; i < N; i++) + VD[i] ^= 0x8000 & (hi[i] | lo[i]); + return; +} + + +static INLINE void SIGNED_CLAMP_SUB(usf_state_t * state, short* VD, short* VS, short* VT) +{ + ALIGNED int32_t dif[N]; + ALIGNED short hi[N], lo[N]; + register int i; + + for (i = 0; i < N; i++) + dif[i] = VS[i] - VT[i] - state->co[i]; + for (i = 0; i < N; i++) + lo[i] = (dif[i] + 0x8000) >> 31; + for (i = 0; i < N; i++) + hi[i] = (0x7FFF - dif[i]) >> 31; + vector_copy(VD, VACC_L); + for (i = 0; i < N; i++) + VD[i] &= ~lo[i]; + for (i = 0; i < N; i++) + VD[i] |= hi[i]; + for (i = 0; i < N; i++) + VD[i] ^= 0x8000 & (hi[i] | lo[i]); + return; +} + +static INLINE void SIGNED_CLAMP_AM(usf_state_t * state, short* VD) +{ + ALIGNED short hi[N], lo[N]; + register int i; + + for (i = 0; i < N; i++) + lo[i] = (VACC_H[i] < ~0); + for (i = 0; i < N; i++) + lo[i] |= (VACC_H[i] < 0) & !(VACC_M[i] < 0); + for (i = 0; i < N; i++) + hi[i] = (VACC_H[i] > 0); + for (i = 0; i < N; i++) + hi[i] |= (VACC_H[i] == 0) & (VACC_M[i] < 0); + vector_copy(VD, VACC_M); + for (i = 0; i < N; i++) + VD[i] &= -(lo[i] ^ 1); + for (i = 0; i < N; i++) + VD[i] |= -(hi[i] ^ 0); + for (i = 0; i < N; i++) + VD[i] ^= 0x8000 * (hi[i] | lo[i]); + return; +} +#endif + +#ifdef ARCH_MIN_SSE2 +/* + * We actually need to write explicit SSE2 code for this because GCC 4.8.1 + * (and possibly later versions) has a code generation bug with vectorizing + * the accumulator when it's a signed short (but not when it's unsigned, for + * some stupid and buggy reason). + * + * In addition, as of the more stable GCC 4.7.2 release, while vectorizing + * the accumulator write-backs into SSE2 for me is successfully done, we save + * just one extra scalar x86 instruction for every RSP vector op-code when we + * use SSE2 explicitly for this particular goal instead of letting GCC do it. + */ +static INLINE void vector_copy(short* VD, short* VS) +{ + __m128i xmm; + + xmm = _mm_load_si128((__m128i *)VS); + _mm_store_si128((__m128i *)VD, xmm); + return; +} + +static INLINE void SIGNED_CLAMP_ADD(usf_state_t * state, short* VD, short* VS, short* VT) +{ + __m128i dst, src, vco; + __m128i max, min; + + src = _mm_load_si128((__m128i *)VS); + dst = _mm_load_si128((__m128i *)VT); + vco = _mm_load_si128((__m128i *)state->co); + +/* + * Due to premature clamping in between adds, sometimes we need to add the + * LESSER of two integers, either VS or VT, to the carry-in flag matching the + * current vector register slice, BEFORE finally adding the greater integer. + */ + max = _mm_max_epi16(dst, src); + min = _mm_min_epi16(dst, src); + + min = _mm_adds_epi16(min, vco); + max = _mm_adds_epi16(max, min); + _mm_store_si128((__m128i *)VD, max); + return; +} +static INLINE void SIGNED_CLAMP_SUB(usf_state_t * state, short* VD, short* VS, short* VT) +{ + __m128i dst, src, vco; + __m128i dif, res, xmm; + + src = _mm_load_si128((__m128i *)VS); + dst = _mm_load_si128((__m128i *)VT); + vco = _mm_load_si128((__m128i *)state->co); + + res = _mm_subs_epi16(src, dst); + +/* + * Due to premature clamps in-between subtracting two of the three operands, + * we must be careful not to offset the result accidentally when subtracting + * the corresponding VCO flag AFTER the saturation from doing (VS - VT). + */ + dif = _mm_add_epi16(res, vco); + dif = _mm_xor_si128(dif, res); /* Adding one suddenly inverts the sign? */ + dif = _mm_and_si128(dif, dst); /* Sign change due to subtracting a neg. */ + xmm = _mm_sub_epi16(src, dst); + src = _mm_andnot_si128(src, dif); /* VS must be >= 0x0000 for overflow. */ + xmm = _mm_and_si128(xmm, src); /* VS + VT != INT16_MIN; VS + VT >= +32768 */ + xmm = _mm_srli_epi16(xmm, 15); /* src = (INT16_MAX + 1 === INT16_MIN) ? */ + + xmm = _mm_andnot_si128(xmm, vco); /* If it's NOT overflow, keep flag. */ + res = _mm_subs_epi16(res, xmm); + _mm_store_si128((__m128i *)VD, res); + return; +} +static INLINE void SIGNED_CLAMP_AM(usf_state_t * state, short* VD) +{ /* typical sign-clamp of accumulator-mid (bits 31:16) */ + __m128i dst, src; + __m128i pvd, pvs; + + pvs = _mm_load_si128((__m128i *)VACC_H); + pvd = _mm_load_si128((__m128i *)VACC_M); + dst = _mm_unpacklo_epi16(pvd, pvs); + src = _mm_unpackhi_epi16(pvd, pvs); + + dst = _mm_packs_epi32(dst, src); + _mm_store_si128((__m128i *)VD, dst); + return; +} +#endif + +static INLINE void UNSIGNED_CLAMP(usf_state_t * state, short* VD) +{ /* sign-zero hybrid clamp of accumulator-mid (bits 31:16) */ + + ALIGNED short cond[N]; + ALIGNED short temp[N]; + register int i; + +#ifdef ARCH_MIN_ARM_NEON + + uint16x8_t c; + int16x8_t t = vld1q_s16((const int16_t*)temp); + int16x8_t vaccm = vld1q_s16((const int16_t*)VACC_M); + + SIGNED_CLAMP_AM(state, temp); + + c = vcgtq_s16(t,vaccm); + int16x8_t t_ = vshrq_n_s16(t,15); + int16x8_t vd = vbicq_s16(t,t_); + vd = vorrq_s16(vd,(int16x8_t)c); + vst1q_s16(VD, vd); + + return; + +#else + + SIGNED_CLAMP_AM(state, temp); /* no direct map in SSE, but closely based on this */ + for (i = 0; i < N; i++) + cond[i] = -(temp[i] > VACC_M[i]); /* VD |= -(ACC47..16 > +32767) */ + for (i = 0; i < N; i++) + VD[i] = temp[i] & ~(temp[i] >> 15); /* Only this clamp is unsigned. */ + for (i = 0; i < N; i++) + VD[i] = VD[i] | cond[i]; + return; +#endif +} + +static INLINE void SIGNED_CLAMP_AL(usf_state_t * state, short* VD) +{ /* sign-clamp accumulator-low (bits 15:0) */ + + ALIGNED short cond[N]; + ALIGNED short temp[N]; + register int i; + + +#ifdef ARCH_MIN_ARM_NEON + + SIGNED_CLAMP_AM(state, temp); + + uint16x8_t c; + int16x8_t eightk = vdupq_n_s16(0x8000); + uint16x8_t one = vdupq_n_u16(1); + int16x8_t t = vld1q_s16((const int16_t*)temp); + int16x8_t vaccm = vld1q_s16((const int16_t*)VACC_M); + + c = vceqq_s16(t,vaccm); + c = vaddq_u16(c, one); + t = veorq_s16(t, eightk); + vst1q_u16(cond,c); + vst1q_s16(temp,t); + merge(VD, cond, temp, VACC_L); + + return; +#else + + SIGNED_CLAMP_AM(state, temp); /* no direct map in SSE, but closely based on this */ + for (i = 0; i < N; i++) + cond[i] = (temp[i] != VACC_M[i]); /* result_clamped != result_raw ? */ + for (i = 0; i < N; i++) + temp[i] ^= 0x8000; /* half-assed unsigned saturation mix in the clamp */ + merge(VD, cond, temp, VACC_L); + return; +#endif +} +#endif diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/divrom.h b/Frameworks/lazyusf/lazyusf/rsp/vu/divrom.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/divrom.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/divrom.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/shuffle.h b/Frameworks/lazyusf/lazyusf/rsp/vu/shuffle.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/shuffle.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/shuffle.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vabs.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vabs.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vabs.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vabs.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vadd.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vadd.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vadd.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vadd.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vaddc.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vaddc.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vaddc.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vaddc.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vand.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vand.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vand.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vand.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vch.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vch.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vch.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vch.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vcl.h 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b/Frameworks/lazyusf/lazyusf/rsp/vu/vmudn.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vmudn.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vmudn.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vmulf.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vmulf.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vmulf.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vmulf.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vmulu.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vmulu.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vmulu.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vmulu.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vnand.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vnand.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vnand.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vnand.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vne.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vne.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vne.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vne.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vnop.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vnop.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vnop.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vnop.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vnor.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vnor.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vnor.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vnor.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vnxor.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vnxor.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vnxor.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vnxor.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vor.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vor.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vor.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vor.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrcp.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vrcp.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrcp.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vrcp.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrcph.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vrcph.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrcph.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vrcph.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrcpl.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vrcpl.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrcpl.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vrcpl.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrsq.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vrsq.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrsq.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vrsq.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrsqh.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vrsqh.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrsqh.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vrsqh.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrsql.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vrsql.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vrsql.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vrsql.h diff --git a/Frameworks/lazyusf/lazyusf/rsp/vu/vsaw.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vsaw.h new file mode 100644 index 000000000..1782d62d3 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/rsp/vu/vsaw.h @@ -0,0 +1,90 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +#ifdef VU_EMULATE_SCALAR_ACCUMULATOR_READ +static void VSAR(int vd, int vs, int vt, int e) +{ + ALIGNED short oldval[N]; + register int i; + + for (i = 0; i < N; i++) + oldval[i] = VR[vs][i]; + vt = 0; +/* Even though VT is ignored in VSAR, according to official sources as well + * as reversing, lots of games seem to specify it as non-zero, possibly to + * avoid register stalling or other VU hazards. Not really certain why yet. + */ + e ^= 0x8; +/* Or, for exception overrides, should this be `e &= 0x7;` ? + * Currently this code is safer because &= is less likely to catch oddities. + * Either way, documentation shows that the switch range is 0:2, not 8:A. + */ + if (e > 2) + { + message(state, "VSAR\nInvalid mask.", 2); + #if ARCH_MIN_ARM_NEON + int16x8_t zero = vdupq_n_s16(0); + vst1q_s16(VR[vd], zero); + #else + for (i = 0; i < N; i++) + VR[vd][i] = 0x0000; /* override behavior (zilmar) */ + #endif + } + else + { + #if ARCH_MIN_ARM_NEON + vector_copy(VR[vd], VACC[e]); + #else + for (i = 0; i < N; i++) + VR[vd][i] = VACC[e][i]; + #endif + } + + for (i = 0; i < N; i++) + VACC[e][i] = oldval[i]; /* ... = VS */ + return; +} +#endif + +static void VSAW(usf_state_t * state, int vd, int vs, int vt, int e) +{ + register int i; + + vs = 0; /* unused--old VSAR algorithm */ + vt = 0; /* unused but mysteriously set many times */ + if (vs | vt) + return; + e ^= 0x8; /* &= 7 */ + + if (e > 0x2) + { /* branch very unlikely...never seen a game do VSAW illegally */ + message(state, "VSAW\nIllegal mask.", 2); + + #if ARCH_MIN_ARM_NEON + + int16x8_t zero = vdupq_n_s16(0); + vst1q_s16(state->VR[vd], zero); + + #else + + for (i = 0; i < N; i++) + state->VR[vd][i] = 0x0000; /* override behavior (zilmar) */ + return; + + #endif + } + vector_copy(state->VR[vd], state->VACC[e]); + return; +} diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vsub.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vsub.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vsub.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vsub.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vsubc.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vsubc.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vsubc.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vsubc.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vu.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vu.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vu.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vu.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vxor.h b/Frameworks/lazyusf/lazyusf/rsp/vu/vxor.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vxor.h rename to Frameworks/lazyusf/lazyusf/rsp/vu/vxor.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/msvc-compat/our-stdbool.h b/Frameworks/lazyusf/lazyusf/rsp_hle/msvc-compat/our-stdbool.h new file mode 100644 index 000000000..5bedcee55 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/rsp_hle/msvc-compat/our-stdbool.h @@ -0,0 +1,46 @@ +/* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * + * Mupen64plus-rsp-hle - stdbool.h * + * Mupen64Plus homepage: http://code.google.com/p/mupen64plus/ * + * Copyright (C) 2014 Bobby Smiles * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. * + * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * */ + +/* This header is only intended to be used with msvc compilers */ + +#pragma once + +#if defined(_MSC_VER) && _MSC_VER < 1700 + +typedef int _Bool; + +/** + * The standard states that "an application may undefine and then possibly redefine the macro + * bool, true and false". However, such feature might be withdrawn in a future version. + **/ +#define bool _Bool +#define true 1 +#define false 0 + +#define __bool_true_false_are_defined 1 + +#else + +#include + +#endif + + diff --git a/Frameworks/lazyusf/lazyusf/tlb.c b/Frameworks/lazyusf/lazyusf/tlb.c new file mode 100644 index 000000000..e1b3d166c --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/tlb.c @@ -0,0 +1,195 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ + +#include + +#include "main.h" +#include "cpu.h" + +#include "usf_internal.h" + +void SetupTLB_Entry (usf_state_t * state, int32_t Entry); + +uint32_t AddressDefined ( usf_state_t * state, uintptr_t VAddr) { + uint32_t i; + + if (VAddr >= 0x80000000 && VAddr <= 0xBFFFFFFF) { + return 1; + } + + for (i = 0; i < 64; i++) { + if (state->FastTlb[i].ValidEntry == 0) { continue; } + if (VAddr >= state->FastTlb[i].VSTART && VAddr <= state->FastTlb[i].VEND) { + return 1; + } + } + return 0; +} + +void InitilizeTLB (usf_state_t * state) { + uint32_t count; + + for (count = 0; count < 32; count++) { state->tlb[count].EntryDefined = 0; } + for (count = 0; count < 64; count++) { state->FastTlb[count].ValidEntry = 0; } + SetupTLB(state); +} + +void SetupTLB (usf_state_t * state) { + uint32_t count; + + memset(state->TLB_Map,0,(0xFFFFF * sizeof(uintptr_t))); + for (count = 0x80000000; count < 0xC0000000; count += 0x1000) { + state->TLB_Map[count >> 12] = ((uintptr_t)state->N64MEM + (count & 0x1FFFFFFF)) - count; + } + for (count = 0; count < 32; count ++) { SetupTLB_Entry(state, count); } +} +/* +test=(BYTE *) VirtualAlloc( 0x10, 0x70000, MEM_RESERVE, PAGE_EXECUTE_READWRITE); + if(test == 0) { + //printf("FAIL!\n"); + exit(0); + } +*/ + +void SetupTLB_Entry (usf_state_t * state, int Entry) { + int32_t FastIndx; + + + if (!state->tlb[Entry].EntryDefined) { return; } + FastIndx = Entry << 1; + state->FastTlb[FastIndx].VSTART=state->tlb[Entry].EntryHi.b.VPN2 << 13; + state->FastTlb[FastIndx].VEND = state->FastTlb[FastIndx].VSTART + (state->tlb[Entry].PageMask.b.Mask << 12) + 0xFFF; + state->FastTlb[FastIndx].PHYSSTART = state->tlb[Entry].EntryLo0.b.PFN << 12; + state->FastTlb[FastIndx].VALID = state->tlb[Entry].EntryLo0.b.V; + state->FastTlb[FastIndx].DIRTY = state->tlb[Entry].EntryLo0.b.D; + state->FastTlb[FastIndx].GLOBAL = state->tlb[Entry].EntryLo0.b.GLOBAL & state->tlb[Entry].EntryLo1.b.GLOBAL; + state->FastTlb[FastIndx].ValidEntry = 0; + + FastIndx = (Entry << 1) + 1; + state->FastTlb[FastIndx].VSTART=(state->tlb[Entry].EntryHi.b.VPN2 << 13) + ((state->tlb[Entry].PageMask.b.Mask << 12) + 0xFFF + 1); + state->FastTlb[FastIndx].VEND = state->FastTlb[FastIndx].VSTART + (state->tlb[Entry].PageMask.b.Mask << 12) + 0xFFF; + state->FastTlb[FastIndx].PHYSSTART = state->tlb[Entry].EntryLo1.b.PFN << 12; + state->FastTlb[FastIndx].VALID = state->tlb[Entry].EntryLo1.b.V; + state->FastTlb[FastIndx].DIRTY = state->tlb[Entry].EntryLo1.b.D; + state->FastTlb[FastIndx].GLOBAL = state->tlb[Entry].EntryLo0.b.GLOBAL & state->tlb[Entry].EntryLo1.b.GLOBAL; + state->FastTlb[FastIndx].ValidEntry = 0; + + for ( FastIndx = Entry << 1; FastIndx <= (Entry << 1) + 1; FastIndx++) { + uint32_t count; + + if (!state->FastTlb[FastIndx].VALID) { + state->FastTlb[FastIndx].ValidEntry = 1; + continue; + } + if (state->FastTlb[FastIndx].VEND <= state->FastTlb[FastIndx].VSTART) { + continue; + } + if (state->FastTlb[FastIndx].VSTART >= 0x80000000 && state->FastTlb[FastIndx].VEND <= 0xBFFFFFFF) { + continue; + } + if (state->FastTlb[FastIndx].PHYSSTART > 0x1FFFFFFF) { + continue; + } + + //test if overlap + state->FastTlb[FastIndx].ValidEntry = 1; + for (count = state->FastTlb[FastIndx].VSTART; count < state->FastTlb[FastIndx].VEND; count += 0x1000) { + state->TLB_Map[count >> 12] = ((uintptr_t)state->N64MEM + (count - state->FastTlb[FastIndx].VSTART + state->FastTlb[FastIndx].PHYSSTART)) - count; + } + } +} + +void TLB_Probe (usf_state_t * state) { + uint32_t Counter; + + + INDEX_REGISTER |= 0x80000000; + for (Counter = 0; Counter < 32; Counter ++) { + uint32_t TlbValue = state->tlb[Counter].EntryHi.Value & (~state->tlb[Counter].PageMask.b.Mask << 13); + uint32_t EntryHi = ENTRYHI_REGISTER & (~state->tlb[Counter].PageMask.b.Mask << 13); + + if (TlbValue == EntryHi) { + uint32_t Global = (state->tlb[Counter].EntryHi.Value & 0x100) != 0; + uint32_t SameAsid = ((state->tlb[Counter].EntryHi.Value & 0xFF) == (ENTRYHI_REGISTER & 0xFF)); + + if (Global || SameAsid) { + INDEX_REGISTER = Counter; + return; + } + } + } +} + +void TLB_Read (usf_state_t * state) { + uint32_t index = INDEX_REGISTER & 0x1F; + + PAGE_MASK_REGISTER = state->tlb[index].PageMask.Value ; + ENTRYHI_REGISTER = (state->tlb[index].EntryHi.Value & ~state->tlb[index].PageMask.Value) ; + ENTRYLO0_REGISTER = state->tlb[index].EntryLo0.Value; + ENTRYLO1_REGISTER = state->tlb[index].EntryLo1.Value; +} + +uint32_t TranslateVaddr ( usf_state_t * state, uintptr_t * Addr) { + if (state->TLB_Map[((*Addr) & 0xffffffff) >> 12] == 0) { return 0; } + *Addr = (uintptr_t)((uint8_t *)(state->TLB_Map[((*Addr) & 0xffffffff) >> 12] + ((*Addr) & 0xffffffff)) - (uintptr_t)state->N64MEM); + return 1; +} + +void WriteTLBEntry (usf_state_t * state, int32_t index) { + int32_t FastIndx; + + FastIndx = index << 1; + if ((state->PROGRAM_COUNTER >= state->FastTlb[FastIndx].VSTART && + state->PROGRAM_COUNTER < state->FastTlb[FastIndx].VEND && + state->FastTlb[FastIndx].ValidEntry && state->FastTlb[FastIndx].VALID) + || + (state->PROGRAM_COUNTER >= state->FastTlb[FastIndx + 1].VSTART && + state->PROGRAM_COUNTER < state->FastTlb[FastIndx + 1].VEND && + state->FastTlb[FastIndx + 1].ValidEntry && state->FastTlb[FastIndx + 1].VALID)) + { + return; + } + + if (state->tlb[index].EntryDefined) { + uint32_t count; + + for ( FastIndx = index << 1; FastIndx <= (index << 1) + 1; FastIndx++) { + if (!state->FastTlb[FastIndx].ValidEntry) { continue; } + if (!state->FastTlb[FastIndx].VALID) { continue; } + for (count = state->FastTlb[FastIndx].VSTART; count < state->FastTlb[FastIndx].VEND; count += 0x1000) { + state->TLB_Map[count >> 12] = 0; + } + } + } + state->tlb[index].PageMask.Value = PAGE_MASK_REGISTER; + state->tlb[index].EntryHi.Value = ENTRYHI_REGISTER; + state->tlb[index].EntryLo0.Value = ENTRYLO0_REGISTER; + state->tlb[index].EntryLo1.Value = ENTRYLO1_REGISTER; + state->tlb[index].EntryDefined = 1; + + + SetupTLB_Entry(state, index); +} diff --git a/Frameworks/lazyusf/lazyusf/tlb.h b/Frameworks/lazyusf/lazyusf/tlb.h new file mode 100644 index 000000000..3807cf0c8 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/tlb.h @@ -0,0 +1,105 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#ifndef _TLB_H_ +#define _TLB_H_ + +typedef struct { + uint32_t EntryDefined; + union { + uint32_t Value; + uint8_t A[4]; + + struct { + unsigned zero : 13; + unsigned Mask : 12; + unsigned zero2 : 7; + } b; + + } PageMask; + + union { + uint32_t Value; + uint8_t A[4]; + + struct { + unsigned ASID : 8; + unsigned Zero : 4; + unsigned G : 1; + unsigned VPN2 : 19; + } b; + + } EntryHi; + + union { + uint32_t Value; + uint8_t A[4]; + + struct { + unsigned GLOBAL: 1; + unsigned V : 1; + unsigned D : 1; + unsigned C : 3; + unsigned PFN : 20; + unsigned ZERO: 6; + } b; + + } EntryLo0; + + union { + uint32_t Value; + uint8_t A[4]; + + struct { + unsigned GLOBAL: 1; + unsigned V : 1; + unsigned D : 1; + unsigned C : 3; + unsigned PFN : 20; + unsigned ZERO: 6; + } b; + + } EntryLo1; +} TLB; + +typedef struct { + uint32_t VSTART; + uint32_t VEND; + uint32_t PHYSSTART; + uint32_t VALID; + uint32_t DIRTY; + uint32_t GLOBAL; + uint32_t ValidEntry; +} FASTTLB; + +uint32_t AddressDefined ( usf_state_t *, uintptr_t VAddr); +void InitilizeTLB ( usf_state_t * ); +void SetupTLB ( usf_state_t * ); +void TLB_Probe ( usf_state_t * ); +void TLB_Read ( usf_state_t * ); +uint32_t TranslateVaddr ( usf_state_t *, uintptr_t * Addr); +void WriteTLBEntry ( usf_state_t *, int32_t index ); + +#endif diff --git a/Frameworks/lazyusf/lazyusf/types.h b/Frameworks/lazyusf/lazyusf/types.h new file mode 100644 index 000000000..30eb952cf --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/types.h @@ -0,0 +1,72 @@ +/* + * Project 64 - A Nintendo 64 emulator. + * + * (c) Copyright 2001 zilmar (zilmar@emulation64.com) and + * Jabo (jabo@emulation64.com). + * + * pj64 homepage: www.pj64.net + * + * Permission to use, copy, modify and distribute Project64 in both binary and + * source form, for non-commercial purposes, is hereby granted without fee, + * providing that this license information and copyright notice appear with + * all copies and any derived work. + * + * This software is provided 'as-is', without any express or implied + * warranty. In no event shall the authors be held liable for any damages + * arising from the use of this software. + * + * Project64 is freeware for PERSONAL USE only. Commercial users should + * seek permission of the copyright holders first. Commercial use includes + * charging money for Project64 or software derived from Project64. + * + * The copyright holders request that bug fixes and improvements to the code + * should be forwarded to them so if they want them. + * + */ +#ifndef __Types_h +#define __Types_h + +#include +typedef uint64_t QWORD; + +typedef union tagVect { + double FD[2]; + int64_t DW[2]; + uint64_t UDW[2]; + int32_t W[4]; + float FS[4]; + uint32_t UW[4]; + int16_t HW[8]; + uint16_t UHW[8]; + int8_t B[16]; + uint8_t UB[16]; +} VECTOR; + +typedef union tagUWORD { + int32_t W; + uint32_t UW; + int16_t HW[2]; + uint16_t UHW[2]; + int8_t B[4]; + uint8_t UB[4]; + float F; +} MIPS_WORD; + +typedef union tagUDWORD { + double D; + int64_t DW; + uint64_t UDW; + int32_t W[2]; + uint32_t UW[2]; + int16_t HW[4]; + uint16_t UHW[4]; + int8_t B[8]; + uint8_t UB[8]; + float F[2]; +} MIPS_DWORD; + +typedef MIPS_WORD MIPSUWORD; +typedef MIPS_DWORD MIPSUDWORD; + + +#endif diff --git a/Frameworks/lazyusf/lazyusf/usf.c b/Frameworks/lazyusf/lazyusf/usf.c new file mode 100644 index 000000000..31aaf3d7f --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/usf.c @@ -0,0 +1,339 @@ + +#include +#include + +#include "usf.h" +#include "cpu.h" +#include "memory.h" +#include "audio.h" + +#include +#include + +#include "types.h" + +#include "resampler.h" + +#include "usf_internal.h" + +size_t usf_get_state_size() +{ + return sizeof(usf_state_t) + 8192; +} + +void usf_clear(void * state) +{ + size_t offset; + memset(state, 0, usf_get_state_size()); + offset = 4096 - (((uintptr_t)state) & 4095); + USF_STATE_HELPER->offset_to_structure = offset; + + //USF_STATE->savestatespace = NULL; + //USF_STATE->cpu_running = 0; + USF_STATE->cpu_stopped = 1; + + //USF_STATE->enablecompare = 0; + //USF_STATE->enableFIFOfull = 0; + + //USF_STATE->enable_hle_audio = 0; + + //USF_STATE->NextInstruction = 0; + //USF_STATE->JumpToLocation = 0; + //USF_STATE->AudioIntrReg = 0; + //USF_STATE->CPU_Action = 0; + //USF_STATE->Timers = 0; + //USF_STATE->CPURunning = 0; + //USF_STATE->SPHack = 0; + //USF_STATE->WaitMode = 0; + + //USF_STATE->TLB_Map = 0; + //USF_STATE->MemChunk = 0; + USF_STATE->RdramSize = 0x800000; + USF_STATE->SystemRdramSize = 0x800000; + USF_STATE->RomFileSize = 0x4000000; + + //USF_STATE->N64MEM = 0; + //USF_STATE->RDRAM = 0; + //USF_STATE->DMEM = 0; + //USF_STATE->IMEM = 0; + + //memset(USF_STATE->ROMPages, 0, sizeof(USF_STATE->ROMPages)); + //USF_STATE->savestatespace = 0; + //USF_STATE->NOMEM = 0; + + //USF_STATE->WrittenToRom = 0; + //USF_STATE->WroteToRom = 0; + //USF_STATE->TempValue = 0; + //USF_STATE->MemoryState = 0; + //USF_STATE->EmptySpace = 0; + + //USF_STATE->Registers = 0; + + //USF_STATE->PIF_Ram = 0; + + PreAllocate_Memory(USF_STATE); + + USF_STATE->resampler = resampler_create(); + +#ifdef DEBUG_INFO + USF_STATE->debug_log = fopen("/tmp/lazyusf.log", "w"); +#endif +} + +void usf_set_compare(void * state, int enable) +{ + USF_STATE->enablecompare = enable; +} + +void usf_set_fifo_full(void * state, int enable) +{ + USF_STATE->enableFIFOfull = enable; +} + +void usf_set_hle_audio(void * state, int enable) +{ + USF_STATE->enable_hle_audio = enable; +} + +static uint32_t get_le32( const void * _p ) +{ + const uint8_t * p = (const uint8_t *) _p; + return p[0] + p[1] * 0x100 + p[2] * 0x10000 + p[3] * 0x1000000; +} + +int usf_upload_section(void * state, const uint8_t * data, size_t size) +{ + uint32_t temp; + + if ( size < 4 ) return -1; + temp = get_le32( data ); data += 4; size -= 4; + + if(temp == 0x34365253) { //there is a rom section + uint32_t len, start; + + if ( size < 4 ) return -1; + len = get_le32( data ); data += 4; size -= 4; + + while(len) { + if ( size < 4 ) return -1; + start = get_le32( data ); data += 4; size -= 4; + + while(len) { + uint32_t page = start >> 16; + uint32_t readLen = ( ((start + len) >> 16) > page) ? (((page + 1) << 16) - start) : len; + + if( USF_STATE->ROMPages[page] == 0 ) { + USF_STATE->ROMPages[page] = malloc(0x10000); + if ( USF_STATE->ROMPages[page] == 0 ) + return -1; + + memset(USF_STATE->ROMPages[page], 0, 0x10000); + } + + if ( size < readLen ) + return -1; + + memcpy( USF_STATE->ROMPages[page] + (start & 0xffff), data, readLen ); + data += readLen; size -= readLen; + + start += readLen; + len -= readLen; + } + + if ( size < 4 ) return -1; + len = get_le32( data ); data += 4; size -= 4; + } + } + + if ( size < 4 ) return -1; + temp = get_le32( data ); data += 4; size -= 4; + + if(temp == 0x34365253) { + uint32_t len, start; + + if ( size < 4 ) return -1; + len = get_le32( data ); data += 4; size -= 4; + + while(len) { + if ( size < 4 ) return -1; + start = get_le32( data ); data += 4; size -= 4; + + if ( size < len ) return -1; + memcpy( USF_STATE->savestatespace + start, data, len ); + data += len; size -= len; + + if ( size < 4 ) return -1; + len = get_le32( data ); data += 4; size -= 4; + } + } + + return 0; +} + +static int usf_startup(usf_state_t * state) +{ + // Detect the Ramsize before the memory allocation + + if(get_le32(state->savestatespace + 4) == 0x400000) { + void * savestate; + state->RdramSize = 0x400000; + savestate = realloc(state->savestatespace, 0x40275c); + if ( savestate ) + state->savestatespace = savestate; + } else if(get_le32(USF_STATE->savestatespace + 4) == 0x800000) + state->RdramSize = 0x800000; + + if ( !Allocate_Memory(state) ) + return -1; + + StartEmulationFromSave(state, USF_STATE->savestatespace); + + return 0; +} + +const char * usf_render(void * state, int16_t * buffer, size_t count, int32_t * sample_rate) +{ + USF_STATE->last_error = 0; + USF_STATE->error_message[0] = '\0'; + + if ( !USF_STATE->MemoryState ) + { + if ( usf_startup( USF_STATE ) < 0 ) + return USF_STATE->last_error; + } + + if ( USF_STATE->samples_in_buffer ) + { + size_t do_max = USF_STATE->samples_in_buffer; + if ( do_max > count ) + do_max = count; + + if ( buffer ) + memcpy( buffer, USF_STATE->samplebuf, sizeof(int16_t) * 2 * do_max ); + + USF_STATE->samples_in_buffer -= do_max; + + if ( sample_rate ) + *sample_rate = USF_STATE->SampleRate; + + if ( USF_STATE->samples_in_buffer ) + { + memmove( USF_STATE->samplebuf, USF_STATE->samplebuf + do_max * 2, sizeof(int16_t) * 2 * USF_STATE->samples_in_buffer ); + return 0; + } + + if ( buffer ) + buffer += 2 * do_max; + count -= do_max; + } + + USF_STATE->sample_buffer = buffer; + USF_STATE->sample_buffer_count = count; + + USF_STATE->cpu_stopped = 0; + USF_STATE->cpu_running = 1; + + StartInterpreterCPU(USF_STATE); + + if ( sample_rate ) + *sample_rate = USF_STATE->SampleRate; + + return USF_STATE->last_error; +} + +const char * usf_render_resampled(void * state, int16_t * buffer, size_t count, int32_t sample_rate) +{ + if ( !buffer ) + { + unsigned long samples_buffered = resampler_get_sample_count( USF_STATE->resampler ); + resampler_clear(USF_STATE->resampler); + if (samples_buffered) + { + unsigned long samples_to_remove = samples_buffered; + if (samples_to_remove > count) + samples_to_remove = count; + count -= samples_to_remove; + while (samples_to_remove--) + resampler_remove_sample(USF_STATE->resampler); + if (!count) + return 0; + } + count = (size_t)((uint64_t)count * USF_STATE->SampleRate / sample_rate); + if (count > USF_STATE->samples_in_buffer_2) + { + count -= USF_STATE->samples_in_buffer_2; + USF_STATE->samples_in_buffer_2 = 0; + } + else if (count) + { + USF_STATE->samples_in_buffer_2 -= count; + memmove(USF_STATE->samplebuf2, USF_STATE->samplebuf2 + 8192 - USF_STATE->samples_in_buffer_2 * 2, USF_STATE->samples_in_buffer_2 * sizeof(short) * 2); + return 0; + } + return usf_render(state, buffer, count, NULL); + } + while ( count ) + { + const char * err; + + while ( USF_STATE->samples_in_buffer_2 && resampler_get_free_count(USF_STATE->resampler) ) + { + int i = 0, j = resampler_get_free_count(USF_STATE->resampler); + if (j > USF_STATE->samples_in_buffer_2) + j = (int)USF_STATE->samples_in_buffer_2; + for (i = 0; i < j; ++i) + { + resampler_write_sample(USF_STATE->resampler, USF_STATE->samplebuf2[i*2], USF_STATE->samplebuf2[i*2+1]); + } + if (i) + { + memmove(USF_STATE->samplebuf2, USF_STATE->samplebuf2 + i * 2, (USF_STATE->samples_in_buffer_2 - i) * sizeof(short) * 2); + USF_STATE->samples_in_buffer_2 -= i; + } + } + + while ( count && resampler_get_sample_count(USF_STATE->resampler) ) + { + resampler_get_sample(USF_STATE->resampler, buffer, buffer + 1); + resampler_remove_sample(USF_STATE->resampler); + buffer += 2; + --count; + } + + if (!count) + break; + + if (USF_STATE->samples_in_buffer_2) + continue; + + err = usf_render(state, USF_STATE->samplebuf2, 4096, 0); + if (err) + return err; + + USF_STATE->samples_in_buffer_2 = 4096; + + resampler_set_rate(USF_STATE->resampler, (float)USF_STATE->SampleRate / (float)sample_rate); + } + + return 0; +} + +void usf_restart(void * state) +{ + if ( USF_STATE->MemoryState ) + StartEmulationFromSave(USF_STATE, USF_STATE->savestatespace); + + USF_STATE->samples_in_buffer = 0; + USF_STATE->samples_in_buffer_2 = 0; + + resampler_clear(USF_STATE->resampler); +} + +void usf_shutdown(void * state) +{ + Release_Memory(USF_STATE); + resampler_delete(USF_STATE->resampler); +#ifdef DEBUG_INFO + fclose(USF_STATE->debug_log); +#endif +} diff --git a/Frameworks/lazyusf/lazyusf/usf.h b/Frameworks/lazyusf/lazyusf/usf.h new file mode 100644 index 000000000..de14b3423 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/usf.h @@ -0,0 +1,81 @@ +/* LazyUSF Public Interface */ + +#ifndef _USF_H_ +#define _USF_H_ +#define _CRT_SECURE_NO_WARNINGS + + +#include +#include + +typedef struct usf_state usf_state_t; + +typedef struct usf_state_helper usf_state_helper_t; + +#ifdef __cplusplus +extern "C" { +#endif + +/* Returns the size of the base emulator state. */ +size_t usf_get_state_size(); + +/* Clears and prepares an allocated state. + Do not call this on a state which has already been rendering + without calling usf_shutdown first, or else you will leak memory. */ +void usf_clear(void * state); + +/* These are both required functions before calling usf_render. + Their values are assumed to be zero, unless the respective + _enablecompare or _enablefifofull tags are present in the file. */ +void usf_set_compare(void * state, int enable); +void usf_set_fifo_full(void * state, int enable); + +/* This option should speed up decoding significantly, at the expense + of accuracy, and potentially emulation bugs. */ +void usf_set_hle_audio(void * state, int enable); + +/* This processes and uploads the ROM and/or Project 64 save state data + present in the reserved section of each USF file. They should be + uploaded in the order in which psf_load processes them, or in priority + of deepest and first nested _lib first, top level files, then numbered + _lib# files. + Returns -1 on invalid data error, or 0 on success. */ +int usf_upload_section(void * state, const uint8_t * data, size_t size); + +/* Renders at least enough sample DMA blocks to fill the count passed in. + A null pointer is acceptable, in which case samples will be discarded. + Requesting zero samples with a null pointer is an acceptable way to + force at least one block of samples to render and return the current + sample rate in the variable passed in. + Requesting a non-zero number of samples with a null buffer pointer will + result in exactly count samples being rendered and discarded. + Emulation runs in whole blocks until there have been exactly enough + Audio Interface DMA transfers to at least fill count samples, at which + point the remainder is buffered in the emulator state until the next + usf_render() call. + Returns 0 on success, or a pointer to the last error message on failure. */ +const char * usf_render(void * state, int16_t * buffer, size_t count, int32_t * sample_rate); + +/* Renders the same as above, only resampled to the requested sample rate + instead of returning the necessary playback rate. Playback will be a + consistent sample rate, always, as any sample rate changes, if any, + are tracked and accounted for. + Requesting a non-zero number of samples with a null buffer pointer will + result in exactly that count of samples being skipped, in the base time + of the requested sample rate. + Returns 0 on success, or a pointer to the last error message on failure. */ +const char * usf_render_resampled(void * state, int16_t * buffer, size_t count, int32_t sample_rate); + +/* Reloads the ROM and save state, effectively restarting emulation. Also + discards any buffered sample data. */ +void usf_restart(void * state); + +/* Frees all allocated memory associated with the emulator state. Necessary + after at least one call to usf_render, or else the memory will be leaked. */ +void usf_shutdown(void * state); + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/Frameworks/lazyusf/lazyusf/usf_internal.h b/Frameworks/lazyusf/lazyusf/usf_internal.h new file mode 100644 index 000000000..345816d24 --- /dev/null +++ b/Frameworks/lazyusf/lazyusf/usf_internal.h @@ -0,0 +1,164 @@ +#ifndef _USF_INTERNAL_H_ +#define _USF_INTERNAL_H_ + +#include "cpu.h" +#include "rsp_hle/hle.h" +#include "cpu_hle.h" + +struct usf_state_helper +{ + size_t offset_to_structure; +}; + +#ifndef RCPREG_DEFINED +#define RCPREG_DEFINED +typedef uint32_t RCPREG; +#endif + +#ifdef DEBUG_INFO +#include +#endif + +struct usf_state +{ + // RSP vector registers, need to be aligned to 16 bytes + // when SSE2 or SSSE3 is enabled, or for any hope of + // auto vectorization + + // usf_clear takes care of aligning the structure within + // the memory block passed into it, treating the pointer + // as usf_state_helper, and storing an offset from the + // pointer to the actual usf_state structure. The size + // which is indicated for allocation accounts for this + // with two pages of padding. + + int16_t VR[32][8]; + int16_t VACC[3][8]; + + // RSP virtual registers, also needs alignment + int32_t SR[32]; + + // rsp/rsp.c, not necessarily in need of alignment + RCPREG* CR[16]; + + // rsp/vu/cf.h, all need alignment + int16_t ne[8]; /* $vco: high byte "NOTEQUAL" */ + int16_t co[8]; /* $vco: low byte "carry/borrow in/out" */ + int16_t clip[8]; /* $vcc: high byte (clip tests: VCL, VCH, VCR) */ + int16_t comp[8]; /* $vcc: low byte (VEQ, VNE, VLT, VGE, VCL, VCH, VCR) */ + int16_t vce[8]; /* $vce: vector compare extension register */ + + // All further members of the structure need not be aligned + + // rsp/vu/divrom.h + int32_t DivIn; /* buffered numerator of division read from vector file */ + int32_t DivOut; /* global division result set by VRCP/VRCPL/VRSQ/VRSQH */ +#if (0) + int32_t MovIn; /* We do not emulate this register (obsolete, for VMOV). */ +#endif + + int32_t DPH; + + // rsp/rsp.h + int32_t stage; // unused since EMULATE_STATIC_PC is defined by default in rsp/config.h + int32_t temp_PC; + int16_t MFC0_count[32]; + + // rsp_hle + struct hle_t hle; + + uint32_t cpu_running, cpu_stopped; + + // options from file tags + uint32_t enablecompare, enableFIFOfull; + + // options for decoding + uint32_t enable_hle_audio; + + // buffering for rendered sample data + size_t sample_buffer_count; + int16_t * sample_buffer; + + // audio.c + // SampleRate is usually guaranteed to stay the same for the duration + // of a given track, and depends on the game. + int32_t SampleRate; + // Audio is rendered in whole Audio Interface DMA transfers, which are + // then copied directly to the caller's buffer. Any left over samples + // from the last DMA transfer that fills the caller's buffer will be + // stored here until the next call to usf_render() + int16_t samplebuf[16384]; + size_t samples_in_buffer; + + // usf.c + // This takes care of automatically resampling the console audio + // to the user requested sample rate, using the same cubic interpolation + // coefficients as the RSP HLE, which in turn mimics the original RSP + // microcode used in most games. + void * resampler; + int16_t samplebuf2[8192]; + size_t samples_in_buffer_2; + + // This buffer does not really need to be that large, as it is likely + // to only accumulate a handlful of error messages, at which point + // emulation is immediately halted and the messages are returned to + // the caller. + const char * last_error; + char error_message[1024]; + + // cpu.c + uint32_t NextInstruction, JumpToLocation, AudioIntrReg; + CPU_ACTION * CPU_Action; + SYSTEM_TIMERS * Timers; + OPCODE Opcode; + uint32_t CPURunning, SPHack; + uint32_t * WaitMode; + + // interpreter_ops.c + uint32_t SWL_MASK[4], SWR_MASK[4], LWL_MASK[4], LWR_MASK[4]; + int32_t SWL_SHIFT[4], SWR_SHIFT[4], LWL_SHIFT[4], LWR_SHIFT[4]; + int32_t RoundingModel; + + // memory.c + uintptr_t *TLB_Map; + uint8_t * MemChunk; + uint32_t RdramSize, SystemRdramSize, RomFileSize; + uint8_t * N64MEM, * RDRAM, * DMEM, * IMEM, * ROMPages[0x400], * savestatespace, * NOMEM; + + uint32_t WrittenToRom; + uint32_t WroteToRom; + uint32_t TempValue; + uint32_t MemoryState; + + uint8_t EmptySpace; + + // pif.c + uint8_t *PIF_Ram; + + // registers.c + uint32_t PROGRAM_COUNTER, * CP0,*FPCR,*RegRDRAM,*RegSP,*RegDPC,*RegMI,*RegVI,*RegAI,*RegPI, + *RegRI,*RegSI, HalfLine, RegModValue, ViFieldNumber, LLBit, LLAddr; + void * FPRDoubleLocation[32], * FPRFloatLocation[32]; + MIPS_DWORD *GPR, *FPR, HI, LO; + int32_t fpuControl; + N64_REGISTERS * Registers; + + // tlb.c + FASTTLB FastTlb[64]; + TLB tlb[32]; + + uint32_t OLD_VI_V_SYNC_REG/* = 0*/, VI_INTR_TIME/* = 500000*/; + + uint32_t cpu_hle_entry_count; + _HLE_Entry * cpu_hle_entries; + +#ifdef DEBUG_INFO + FILE * debug_log; +#endif +}; + +#define USF_STATE_HELPER ((usf_state_helper_t *)(state)) + +#define USF_STATE ((usf_state_t *)(((uint8_t *)(state))+((usf_state_helper_t *)(state))->offset_to_structure)) + +#endif diff --git a/Frameworks/lazyusf2/lazyusf2.xcodeproj/project.pbxproj b/Frameworks/lazyusf2/lazyusf2.xcodeproj/project.pbxproj new file mode 100644 index 000000000..e704ae12d --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2.xcodeproj/project.pbxproj @@ -0,0 +1,1250 @@ +// !$*UTF8*$! +{ + archiveVersion = 1; + classes = { + }; + objectVersion = 46; + objects = { + +/* Begin PBXBuildFile section */ + 8333B6721DCC498B004C140D /* libz.tbd in Frameworks */ = {isa = PBXBuildFile; fileRef = 8333B6711DCC498B004C140D /* libz.tbd */; }; + 8379B58A1AA4237E00F28A95 /* barray.c in Sources */ = {isa = PBXBuildFile; fileRef = 8379B5881AA4237E00F28A95 /* barray.c */; }; + 8379B58B1AA4237E00F28A95 /* barray.h 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a/Frameworks/lazyusf/lazyusf/api/m64p_config.h b/Frameworks/lazyusf2/lazyusf2/api/m64p_config.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/api/m64p_config.h rename to Frameworks/lazyusf2/lazyusf2/api/m64p_config.h diff --git a/Frameworks/lazyusf/lazyusf/api/m64p_debugger.h b/Frameworks/lazyusf2/lazyusf2/api/m64p_debugger.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/api/m64p_debugger.h rename to Frameworks/lazyusf2/lazyusf2/api/m64p_debugger.h diff --git a/Frameworks/lazyusf/lazyusf/api/m64p_frontend.h b/Frameworks/lazyusf2/lazyusf2/api/m64p_frontend.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/api/m64p_frontend.h rename to Frameworks/lazyusf2/lazyusf2/api/m64p_frontend.h diff --git a/Frameworks/lazyusf/lazyusf/api/m64p_plugin.h b/Frameworks/lazyusf2/lazyusf2/api/m64p_plugin.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/api/m64p_plugin.h rename to Frameworks/lazyusf2/lazyusf2/api/m64p_plugin.h diff --git a/Frameworks/lazyusf/lazyusf/api/m64p_types.h b/Frameworks/lazyusf2/lazyusf2/api/m64p_types.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/api/m64p_types.h rename to Frameworks/lazyusf2/lazyusf2/api/m64p_types.h diff --git a/Frameworks/lazyusf/lazyusf/api/m64p_vidext.h b/Frameworks/lazyusf2/lazyusf2/api/m64p_vidext.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/api/m64p_vidext.h rename to Frameworks/lazyusf2/lazyusf2/api/m64p_vidext.h diff --git a/Frameworks/lazyusf/lazyusf/debugger/dbg_decoder.c b/Frameworks/lazyusf2/lazyusf2/debugger/dbg_decoder.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/debugger/dbg_decoder.c rename to Frameworks/lazyusf2/lazyusf2/debugger/dbg_decoder.c diff --git a/Frameworks/lazyusf/lazyusf/debugger/dbg_decoder.h b/Frameworks/lazyusf2/lazyusf2/debugger/dbg_decoder.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/debugger/dbg_decoder.h rename to Frameworks/lazyusf2/lazyusf2/debugger/dbg_decoder.h diff --git a/Frameworks/lazyusf/lazyusf/debugger/dbg_decoder_local.h b/Frameworks/lazyusf2/lazyusf2/debugger/dbg_decoder_local.h similarity index 99% rename from Frameworks/lazyusf/lazyusf/debugger/dbg_decoder_local.h rename to Frameworks/lazyusf2/lazyusf2/debugger/dbg_decoder_local.h index 6a7128d17..5ec6372ff 100644 --- a/Frameworks/lazyusf/lazyusf/debugger/dbg_decoder_local.h +++ b/Frameworks/lazyusf2/lazyusf2/debugger/dbg_decoder_local.h @@ -600,10 +600,8 @@ /* * The floating point version and status registers. */ -#if 0 #define MIPS_FPU_ID $0 #define MIPS_FPU_CSR $31 -#endif /* * The floating point coprocessor status register bits. diff --git a/Frameworks/lazyusf/lazyusf/debugger/dbg_types.h b/Frameworks/lazyusf2/lazyusf2/debugger/dbg_types.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/debugger/dbg_types.h rename to Frameworks/lazyusf2/lazyusf2/debugger/dbg_types.h diff --git a/Frameworks/lazyusf/lazyusf/lazyusf-Info.plist b/Frameworks/lazyusf2/lazyusf2/lazyusf-Info.plist similarity index 100% rename from Frameworks/lazyusf/lazyusf/lazyusf-Info.plist rename to Frameworks/lazyusf2/lazyusf2/lazyusf-Info.plist diff --git a/Frameworks/lazyusf/lazyusf/main/list.h b/Frameworks/lazyusf2/lazyusf2/main/list.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/list.h rename to Frameworks/lazyusf2/lazyusf2/main/list.h diff --git a/Frameworks/lazyusf/lazyusf/main/main.c b/Frameworks/lazyusf2/lazyusf2/main/main.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/main.c rename to Frameworks/lazyusf2/lazyusf2/main/main.c diff --git a/Frameworks/lazyusf/lazyusf/main/main.h b/Frameworks/lazyusf2/lazyusf2/main/main.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/main.h rename to Frameworks/lazyusf2/lazyusf2/main/main.h diff --git a/Frameworks/lazyusf/lazyusf/main/rom.c b/Frameworks/lazyusf2/lazyusf2/main/rom.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/rom.c rename to Frameworks/lazyusf2/lazyusf2/main/rom.c diff --git a/Frameworks/lazyusf/lazyusf/main/rom.h b/Frameworks/lazyusf2/lazyusf2/main/rom.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/rom.h rename to Frameworks/lazyusf2/lazyusf2/main/rom.h diff --git a/Frameworks/lazyusf/lazyusf/main/savestates.c b/Frameworks/lazyusf2/lazyusf2/main/savestates.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/savestates.c rename to Frameworks/lazyusf2/lazyusf2/main/savestates.c diff --git a/Frameworks/lazyusf/lazyusf/main/savestates.h b/Frameworks/lazyusf2/lazyusf2/main/savestates.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/savestates.h rename to Frameworks/lazyusf2/lazyusf2/main/savestates.h diff --git a/Frameworks/lazyusf/lazyusf/main/util.c b/Frameworks/lazyusf2/lazyusf2/main/util.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/util.c rename to Frameworks/lazyusf2/lazyusf2/main/util.c diff --git a/Frameworks/lazyusf/lazyusf/main/util.h b/Frameworks/lazyusf2/lazyusf2/main/util.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/util.h rename to Frameworks/lazyusf2/lazyusf2/main/util.h diff --git a/Frameworks/lazyusf/lazyusf/main/version.h b/Frameworks/lazyusf2/lazyusf2/main/version.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/main/version.h rename to Frameworks/lazyusf2/lazyusf2/main/version.h diff --git a/Frameworks/lazyusf/lazyusf/memory/memory.c b/Frameworks/lazyusf2/lazyusf2/memory/memory.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/memory/memory.c rename to Frameworks/lazyusf2/lazyusf2/memory/memory.c diff --git a/Frameworks/lazyusf/lazyusf/memory/memory.h b/Frameworks/lazyusf2/lazyusf2/memory/memory.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/memory/memory.h rename to Frameworks/lazyusf2/lazyusf2/memory/memory.h diff --git a/Frameworks/lazyusf/lazyusf/osal/preproc.h b/Frameworks/lazyusf2/lazyusf2/osal/preproc.h similarity index 94% rename from Frameworks/lazyusf/lazyusf/osal/preproc.h rename to Frameworks/lazyusf2/lazyusf2/osal/preproc.h index d149b9c5f..c107506e1 100644 --- a/Frameworks/lazyusf/lazyusf/osal/preproc.h +++ b/Frameworks/lazyusf2/lazyusf2/osal/preproc.h @@ -30,7 +30,6 @@ #define OSAL_BREAKPOINT_INTERRUPT __asm{ int 3 }; #define ALIGN(BYTES,DATA) __declspec(align(BYTES)) DATA #define osal_inline __inline - #define osal_fastcall __fastcall /* string functions */ #define osal_insensitive_strcmp(x, y) _stricmp(x, y) @@ -47,11 +46,6 @@ #define OSAL_BREAKPOINT_INTERRUPT __asm__(" int $3; "); #define ALIGN(BYTES,DATA) DATA __attribute__((aligned(BYTES))) #define osal_inline inline - #ifdef __i386__ - #define osal_fastcall __attribute__((regparm(1))) - #else - #define osal_fastcall - #endif /* string functions */ #define osal_insensitive_strcmp(x, y) strcasecmp(x, y) diff --git a/Frameworks/lazyusf/lazyusf/pi/cart_rom.c b/Frameworks/lazyusf2/lazyusf2/pi/cart_rom.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/pi/cart_rom.c rename to Frameworks/lazyusf2/lazyusf2/pi/cart_rom.c diff --git a/Frameworks/lazyusf/lazyusf/pi/cart_rom.h b/Frameworks/lazyusf2/lazyusf2/pi/cart_rom.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/pi/cart_rom.h rename to Frameworks/lazyusf2/lazyusf2/pi/cart_rom.h diff --git a/Frameworks/lazyusf/lazyusf/pi/pi_controller.c b/Frameworks/lazyusf2/lazyusf2/pi/pi_controller.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/pi/pi_controller.c rename to Frameworks/lazyusf2/lazyusf2/pi/pi_controller.c diff --git a/Frameworks/lazyusf/lazyusf/pi/pi_controller.h b/Frameworks/lazyusf2/lazyusf2/pi/pi_controller.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/pi/pi_controller.h rename to Frameworks/lazyusf2/lazyusf2/pi/pi_controller.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/cached_interp.c b/Frameworks/lazyusf2/lazyusf2/r4300/cached_interp.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/cached_interp.c rename to Frameworks/lazyusf2/lazyusf2/r4300/cached_interp.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/cached_interp.h b/Frameworks/lazyusf2/lazyusf2/r4300/cached_interp.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/cached_interp.h rename to Frameworks/lazyusf2/lazyusf2/r4300/cached_interp.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/cp0.c b/Frameworks/lazyusf2/lazyusf2/r4300/cp0.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/cp0.c rename to Frameworks/lazyusf2/lazyusf2/r4300/cp0.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/cp0.h b/Frameworks/lazyusf2/lazyusf2/r4300/cp0.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/cp0.h rename to Frameworks/lazyusf2/lazyusf2/r4300/cp0.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/cp1.c b/Frameworks/lazyusf2/lazyusf2/r4300/cp1.c similarity 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a/Frameworks/lazyusf/lazyusf/r4300/interpreter_regimm.def b/Frameworks/lazyusf2/lazyusf2/r4300/interpreter_regimm.def similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/interpreter_regimm.def rename to Frameworks/lazyusf2/lazyusf2/r4300/interpreter_regimm.def diff --git a/Frameworks/lazyusf/lazyusf/r4300/interpreter_special.def b/Frameworks/lazyusf2/lazyusf2/r4300/interpreter_special.def similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/interpreter_special.def rename to Frameworks/lazyusf2/lazyusf2/r4300/interpreter_special.def diff --git a/Frameworks/lazyusf/lazyusf/r4300/interpreter_tlb.def b/Frameworks/lazyusf2/lazyusf2/r4300/interpreter_tlb.def similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/interpreter_tlb.def rename to Frameworks/lazyusf2/lazyusf2/r4300/interpreter_tlb.def diff --git a/Frameworks/lazyusf/lazyusf/r4300/interupt.c b/Frameworks/lazyusf2/lazyusf2/r4300/interupt.c similarity index 100% rename from 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a/Frameworks/lazyusf/lazyusf/r4300/new_dynarec/assem_x86.h b/Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/assem_x86.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/new_dynarec/assem_x86.h rename to Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/assem_x86.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/new_dynarec/linkage_arm.S b/Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/linkage_arm.S similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/new_dynarec/linkage_arm.S rename to Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/linkage_arm.S diff --git a/Frameworks/lazyusf/lazyusf/r4300/new_dynarec/linkage_x86.S b/Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/linkage_x86.S similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/new_dynarec/linkage_x86.S rename to Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/linkage_x86.S diff --git a/Frameworks/lazyusf/lazyusf/r4300/new_dynarec/linkage_x86.asm b/Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/linkage_x86.asm similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/new_dynarec/linkage_x86.asm rename to Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/linkage_x86.asm diff --git a/Frameworks/lazyusf/lazyusf/r4300/new_dynarec/new_dynarec.c b/Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/new_dynarec.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/new_dynarec/new_dynarec.c rename to Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/new_dynarec.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/new_dynarec/new_dynarec.h b/Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/new_dynarec.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/new_dynarec/new_dynarec.h rename to Frameworks/lazyusf2/lazyusf2/r4300/new_dynarec/new_dynarec.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/ops.h b/Frameworks/lazyusf2/lazyusf2/r4300/ops.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/ops.h rename to Frameworks/lazyusf2/lazyusf2/r4300/ops.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/pure_interp.c b/Frameworks/lazyusf2/lazyusf2/r4300/pure_interp.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/pure_interp.c rename to Frameworks/lazyusf2/lazyusf2/r4300/pure_interp.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/pure_interp.h b/Frameworks/lazyusf2/lazyusf2/r4300/pure_interp.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/pure_interp.h rename to Frameworks/lazyusf2/lazyusf2/r4300/pure_interp.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/r4300.c b/Frameworks/lazyusf2/lazyusf2/r4300/r4300.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/r4300.c rename to Frameworks/lazyusf2/lazyusf2/r4300/r4300.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/r4300.h b/Frameworks/lazyusf2/lazyusf2/r4300/r4300.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/r4300.h rename to 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diff --git a/Frameworks/lazyusf/lazyusf/r4300/recomph.h b/Frameworks/lazyusf2/lazyusf2/r4300/recomph.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/recomph.h rename to Frameworks/lazyusf2/lazyusf2/r4300/recomph.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/reset.c b/Frameworks/lazyusf2/lazyusf2/r4300/reset.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/reset.c rename to Frameworks/lazyusf2/lazyusf2/r4300/reset.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/reset.h b/Frameworks/lazyusf2/lazyusf2/r4300/reset.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/reset.h rename to Frameworks/lazyusf2/lazyusf2/r4300/reset.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/tlb.c b/Frameworks/lazyusf2/lazyusf2/r4300/tlb.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/tlb.c rename to Frameworks/lazyusf2/lazyusf2/r4300/tlb.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/tlb.h b/Frameworks/lazyusf2/lazyusf2/r4300/tlb.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/tlb.h rename to Frameworks/lazyusf2/lazyusf2/r4300/tlb.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/assemble.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/assemble.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/assemble.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/assemble.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/assemble.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86/assemble.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/assemble.h rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/assemble.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/assemble_struct.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86/assemble_struct.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/assemble_struct.h rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/assemble_struct.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gbc.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gbc.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gbc.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gbc.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gcop0.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop0.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gcop0.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop0.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gcop1.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gcop1.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gcop1_d.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1_d.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gcop1_d.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1_d.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gcop1_l.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1_l.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gcop1_l.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1_l.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gcop1_s.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1_s.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gcop1_s.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1_s.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gcop1_w.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1_w.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gcop1_w.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gcop1_w.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gr4300.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gr4300.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gr4300.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gr4300.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gregimm.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gregimm.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gregimm.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gregimm.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gspecial.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gspecial.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gspecial.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gspecial.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/gtlb.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/gtlb.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/gtlb.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/gtlb.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/interpret.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86/interpret.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/interpret.h rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/interpret.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/regcache.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/regcache.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/regcache.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/regcache.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/regcache.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86/regcache.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/regcache.h rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/regcache.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86/rjump.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86/rjump.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86/rjump.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86/rjump.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/assemble.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/assemble.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/assemble.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/assemble.h rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/assemble_struct.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble_struct.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/assemble_struct.h rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/assemble_struct.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gbc.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gbc.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gbc.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gbc.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop0.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop0.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop0.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop0.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1_d.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_d.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1_d.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_d.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1_l.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_l.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1_l.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_l.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1_s.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_s.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1_s.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_s.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1_w.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_w.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gcop1_w.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gcop1_w.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gr4300.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gr4300.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gr4300.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gr4300.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gregimm.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gregimm.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gregimm.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gregimm.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gspecial.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gspecial.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gspecial.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gspecial.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/gtlb.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gtlb.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/gtlb.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/gtlb.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/interpret.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/interpret.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/interpret.h rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/interpret.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/regcache.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/regcache.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.c diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/regcache.h b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/regcache.h rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/regcache.h diff --git a/Frameworks/lazyusf/lazyusf/r4300/x86_64/rjump.c b/Frameworks/lazyusf2/lazyusf2/r4300/x86_64/rjump.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/r4300/x86_64/rjump.c rename to Frameworks/lazyusf2/lazyusf2/r4300/x86_64/rjump.c diff --git a/Frameworks/lazyusf/lazyusf/rdp/rdp_core.c b/Frameworks/lazyusf2/lazyusf2/rdp/rdp_core.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/rdp/rdp_core.c rename to Frameworks/lazyusf2/lazyusf2/rdp/rdp_core.c diff --git a/Frameworks/lazyusf/lazyusf/rdp/rdp_core.h b/Frameworks/lazyusf2/lazyusf2/rdp/rdp_core.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rdp/rdp_core.h rename to Frameworks/lazyusf2/lazyusf2/rdp/rdp_core.h diff --git a/Frameworks/lazyusf/lazyusf/ri/rdram.c b/Frameworks/lazyusf2/lazyusf2/ri/rdram.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/ri/rdram.c rename to Frameworks/lazyusf2/lazyusf2/ri/rdram.c diff --git a/Frameworks/lazyusf/lazyusf/ri/rdram.h b/Frameworks/lazyusf2/lazyusf2/ri/rdram.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/ri/rdram.h rename to Frameworks/lazyusf2/lazyusf2/ri/rdram.h diff --git a/Frameworks/lazyusf/lazyusf/ri/rdram_detection_hack.c b/Frameworks/lazyusf2/lazyusf2/ri/rdram_detection_hack.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/ri/rdram_detection_hack.c rename to Frameworks/lazyusf2/lazyusf2/ri/rdram_detection_hack.c diff --git a/Frameworks/lazyusf/lazyusf/ri/rdram_detection_hack.h b/Frameworks/lazyusf2/lazyusf2/ri/rdram_detection_hack.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/ri/rdram_detection_hack.h rename to Frameworks/lazyusf2/lazyusf2/ri/rdram_detection_hack.h diff --git a/Frameworks/lazyusf/lazyusf/ri/ri_controller.c b/Frameworks/lazyusf2/lazyusf2/ri/ri_controller.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/ri/ri_controller.c rename to Frameworks/lazyusf2/lazyusf2/ri/ri_controller.c diff --git a/Frameworks/lazyusf/lazyusf/ri/ri_controller.h b/Frameworks/lazyusf2/lazyusf2/ri/ri_controller.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/ri/ri_controller.h rename to Frameworks/lazyusf2/lazyusf2/ri/ri_controller.h diff --git a/Frameworks/lazyusf/lazyusf/rsp/rsp_core.c b/Frameworks/lazyusf2/lazyusf2/rsp/rsp_core.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp/rsp_core.c rename to Frameworks/lazyusf2/lazyusf2/rsp/rsp_core.c diff --git a/Frameworks/lazyusf/lazyusf/rsp/rsp_core.h b/Frameworks/lazyusf2/lazyusf2/rsp/rsp_core.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp/rsp_core.h rename to Frameworks/lazyusf2/lazyusf2/rsp/rsp_core.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/LICENSES b/Frameworks/lazyusf2/lazyusf2/rsp_hle/LICENSES similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/LICENSES rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/LICENSES diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/alist.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist.c similarity index 96% rename from Frameworks/lazyusf/lazyusf/rsp_hle/alist.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/alist.c index 21e9d9a5a..d3157155d 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/alist.c +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist.c @@ -96,7 +96,11 @@ static int16_t ramp_step(struct ramp_t* ramp) } /* global functions */ +#ifdef DEBUG_INFO +void alist_process(struct hle_t* hle, const acmd_callback_t abi[], unsigned int abi_size, const char* abi_names[]) +#else void alist_process(struct hle_t* hle, const acmd_callback_t abi[], unsigned int abi_size) +#endif { uint32_t w1, w2; unsigned int acmd; @@ -111,7 +115,12 @@ void alist_process(struct hle_t* hle, const acmd_callback_t abi[], unsigned int acmd = (w1 >> 24) & 0x7f; if (acmd < abi_size) + { + #ifdef DEBUG_INFO + HleVerboseMessage(hle->user_defined, "HLE: %s (%08x %08x)", abi_names[acmd], w1, w2); + #endif (*abi[acmd])(hle, w1, w2); + } else HleWarnMessage(hle->user_defined, "Invalid ABI command %u", acmd); } @@ -119,7 +128,7 @@ void alist_process(struct hle_t* hle, const acmd_callback_t abi[], unsigned int uint32_t alist_get_address(struct hle_t* hle, uint32_t so, const uint32_t *segments, size_t n) { - uint8_t segment = (so >> 24); + uint8_t segment = (so >> 24) & 0x3f; uint32_t offset = (so & 0xffffff); if (segment >= n) { @@ -132,7 +141,7 @@ uint32_t alist_get_address(struct hle_t* hle, uint32_t so, const uint32_t *segme void alist_set_address(struct hle_t* hle, uint32_t so, uint32_t *segments, size_t n) { - uint8_t segment = (so >> 24); + uint8_t segment = (so >> 24) & 0x3f; uint32_t offset = (so & 0xffffff); if (segment >= n) { @@ -281,6 +290,7 @@ void alist_envmix_exp( int x, y; short save_buffer[40]; + memcpy((uint8_t *)save_buffer, (hle->dram + address), sizeof(save_buffer)); if (init) { ramps[0].value = (vol[0] << 16); ramps[1].value = (vol[1] << 16); @@ -291,7 +301,6 @@ void alist_envmix_exp( exp_seq[0] = (vol[0] * rate[0]); exp_seq[1] = (vol[1] * rate[1]); } else { - memcpy((uint8_t *)save_buffer, (hle->dram + address), 80); wet = *(int16_t *)(save_buffer + 0); /* 0-1 */ dry = *(int16_t *)(save_buffer + 2); /* 2-3 */ ramps[0].target = *(int32_t *)(save_buffer + 4); /* 4-5 */ @@ -312,13 +321,13 @@ void alist_envmix_exp( if (ramps[0].step != 0) { - exp_seq[0] = (int32_t)(((int64_t)exp_seq[0]*(int64_t)exp_rates[0]) >> 16); + exp_seq[0] = ((int64_t)exp_seq[0]*(int64_t)exp_rates[0]) >> 16; ramps[0].step = (exp_seq[0] - ramps[0].value) >> 3; } if (ramps[1].step != 0) { - exp_seq[1] = (int32_t)(((int64_t)exp_seq[1]*(int64_t)exp_rates[1]) >> 16); + exp_seq[1] = ((int64_t)exp_seq[1]*(int64_t)exp_rates[1]) >> 16; ramps[1].step = (exp_seq[1] - ramps[1].value) >> 3; } @@ -353,7 +362,7 @@ void alist_envmix_exp( *(int32_t *)(save_buffer + 14) = exp_seq[1]; /* 14-15 */ *(int32_t *)(save_buffer + 16) = (int32_t)ramps[0].value; /* 12-13 */ *(int32_t *)(save_buffer + 18) = (int32_t)ramps[1].value; /* 14-15 */ - memcpy(hle->dram + address, (uint8_t *)save_buffer, 80); + memcpy(hle->dram + address, (uint8_t *)save_buffer, sizeof(save_buffer)); } void alist_envmix_ge( @@ -381,6 +390,7 @@ void alist_envmix_ge( struct ramp_t ramps[2]; short save_buffer[40]; + memcpy((uint8_t *)save_buffer, (hle->dram + address), 80); if (init) { ramps[0].value = (vol[0] << 16); ramps[1].value = (vol[1] << 16); @@ -389,7 +399,6 @@ void alist_envmix_ge( ramps[0].step = rate[0] / 8; ramps[1].step = rate[1] / 8; } else { - memcpy((uint8_t *)save_buffer, (hle->dram + address), 80); wet = *(int16_t *)(save_buffer + 0); /* 0-1 */ dry = *(int16_t *)(save_buffer + 2); /* 2-3 */ ramps[0].target = *(int32_t *)(save_buffer + 4); /* 4-5 */ @@ -457,6 +466,7 @@ void alist_envmix_lin( int16_t* const wl = (int16_t*)(hle->alist_buffer + dmem_wl); int16_t* const wr = (int16_t*)(hle->alist_buffer + dmem_wr); + memcpy((uint8_t *)save_buffer, hle->dram + address, 80); if (init) { ramps[0].step = rate[0] / 8; ramps[0].value = (vol[0] << 16); @@ -466,7 +476,6 @@ void alist_envmix_lin( ramps[1].target = (target[1] << 16); } else { - memcpy((uint8_t *)save_buffer, hle->dram + address, 80); wet = *(int16_t *)(save_buffer + 0); /* 0-1 */ dry = *(int16_t *)(save_buffer + 2); /* 2-3 */ ramps[0].target = *(int16_t *)(save_buffer + 4) << 16; /* 4-5 */ @@ -665,11 +674,11 @@ void alist_resample( while (count != 0) { const int16_t* lut = RESAMPLE_LUT + ((pitch_accu & 0xfc00) >> 8); - *sample(hle, opos++) = clamp_s16( - ((*sample(hle, ipos ) * lut[0]) >> 15) + - ((*sample(hle, ipos + 1) * lut[1]) >> 15) + - ((*sample(hle, ipos + 2) * lut[2]) >> 15) + - ((*sample(hle, ipos + 3) * lut[3]) >> 15)); + *sample(hle, opos++) = clamp_s16( ( + (*sample(hle, ipos ) * lut[0]) + + (*sample(hle, ipos + 1) * lut[1]) + + (*sample(hle, ipos + 2) * lut[2]) + + (*sample(hle, ipos + 3) * lut[3]) ) >> 15); pitch_accu += pitch; ipos += (pitch_accu >> 16); @@ -960,7 +969,7 @@ void alist_polef( count -= 16; } while (count != 0); - dram_store_u16(hle, (uint16_t*)(dst - 4), address, 4); + dram_store_u32(hle, (uint32_t*)(dst - 4), address, 2); } void alist_iirf( diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/alist.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist.h similarity index 97% rename from Frameworks/lazyusf/lazyusf/rsp_hle/alist.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/alist.h index f684e76e0..f53db040a 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/alist.h +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist.h @@ -22,7 +22,7 @@ #ifndef ALIST_INTERNAL_H #define ALIST_INTERNAL_H -#include +#include #include #include @@ -30,7 +30,11 @@ struct hle_t; typedef void (*acmd_callback_t)(struct hle_t* hle, uint32_t w1, uint32_t w2); +#ifdef DEBUG_INFO +void alist_process(struct hle_t* hle, const acmd_callback_t abi[], unsigned int abi_size, const char* abi_names[]); +#else void alist_process(struct hle_t* hle, const acmd_callback_t abi[], unsigned int abi_size); +#endif uint32_t alist_get_address(struct hle_t* hle, uint32_t so, const uint32_t *segments, size_t n); void alist_set_address(struct hle_t* hle, uint32_t so, uint32_t *segments, size_t n); void alist_clear(struct hle_t* hle, uint16_t dmem, uint16_t count); diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/alist_audio.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_audio.c similarity index 87% rename from Frameworks/lazyusf/lazyusf/rsp_hle/alist_audio.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_audio.c index 0a1db6e75..3642cd44f 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/alist_audio.c +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_audio.c @@ -25,11 +25,11 @@ #include #include -#include "common.h" - #include "alist.h" +#include "common.h" #include "hle_internal.h" #include "memory.h" +#include "ucodes.h" enum { DMEM_BASE = 0x5c0 }; @@ -276,8 +276,21 @@ void alist_process_audio(struct hle_t* hle) MIXER, INTERLEAVE, POLEF, SETLOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x10] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "ENVMIXER", + "LOADBUFF", "RESAMPLE", "SAVEBUFF", "SEGMENT", + "SETBUFF", "SETVOL", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "POLEF", "SETLOOP" + }; + #endif + clear_segments(hle); + #ifdef DEBUG_INFO + alist_process(hle, ABI, 0x10, ABI_names); + #else alist_process(hle, ABI, 0x10); + #endif } void alist_process_audio_ge(struct hle_t* hle) @@ -289,8 +302,21 @@ void alist_process_audio_ge(struct hle_t* hle) MIXER, INTERLEAVE, POLEF, SETLOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x10] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "ENVMIXER_GE", + "LOADBUFF", "RESAMPLE", "SAVEBUFF", "SEGMENT", + "SETBUFF", "SETVOL", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "POLEF", "SETLOOP" + }; + #endif + clear_segments(hle); + #ifdef DEBUG_INFO + alist_process(hle, ABI, 0x10, ABI_names); + #else alist_process(hle, ABI, 0x10); + #endif } void alist_process_audio_bc(struct hle_t* hle) @@ -302,6 +328,19 @@ void alist_process_audio_bc(struct hle_t* hle) MIXER, INTERLEAVE, POLEF, SETLOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x10] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "ENVMIXER_GE", + "LOADBUFF", "RESAMPLE", "SAVEBUFF", "SEGMENT", + "SETBUFF", "SETVOL", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "POLEF", "SETLOOP" + }; + #endif + clear_segments(hle); + #ifdef DEBUG_INFO + alist_process(hle, ABI, 0x10, ABI_names); + #else alist_process(hle, ABI, 0x10); + #endif } diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/alist_naudio.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_naudio.c similarity index 83% rename from Frameworks/lazyusf/lazyusf/rsp_hle/alist_naudio.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_naudio.c index 3575b8910..127ae9131 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/alist_naudio.c +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_naudio.c @@ -24,9 +24,8 @@ #include #include -#include "common.h" - #include "alist.h" +#include "common.h" #include "hle_external.h" #include "hle_internal.h" #include "memory.h" @@ -153,7 +152,7 @@ static void ENVMIXER(struct hle_t* hle, uint32_t w1, uint32_t w2) static void CLEARBUFF(struct hle_t* hle, uint32_t w1, uint32_t w2) { uint16_t dmem = w1 + NAUDIO_MAIN; - uint16_t count = w2; + uint16_t count = w2 & 0xfff; alist_clear(hle, dmem, count); } @@ -274,7 +273,18 @@ void alist_process_naudio(struct hle_t* hle) MIXER, INTERLEAVE, NAUDIO_02B0, SETLOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x10] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "ENVMIXER", + "LOADBUFF", "RESAMPLE", "SAVEBUFF", "NAUDIO_0000", + "NAUDIO_0000", "SETVOL", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "NAUDIO_02B0", "SETLOOP" + }; + + alist_process(hle, ABI, 0x10, ABI_names); + #else alist_process(hle, ABI, 0x10); + #endif } void alist_process_naudio_bk(struct hle_t* hle) @@ -287,7 +297,18 @@ void alist_process_naudio_bk(struct hle_t* hle) MIXER, INTERLEAVE, NAUDIO_02B0, SETLOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x10] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "ENVMIXER", + "LOADBUFF", "RESAMPLE", "SAVEBUFF", "NAUDIO_0000", + "NAUDIO_0000", "SETVOL", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "NAUDIO_02B0", "SETLOOP" + }; + + alist_process(hle, ABI, 0x10, ABI_names); + #else alist_process(hle, ABI, 0x10); + #endif } void alist_process_naudio_dk(struct hle_t* hle) @@ -300,7 +321,18 @@ void alist_process_naudio_dk(struct hle_t* hle) MIXER, INTERLEAVE, NAUDIO_02B0, SETLOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x10] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "ENVMIXER", + "LOADBUFF", "RESAMPLE", "SAVEBUFF", "MIXER", + "MIXER", "SETVOL", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "NAUDIO_02B0", "SETLOOP" + }; + + alist_process(hle, ABI, 0x10, ABI_names); + #else alist_process(hle, ABI, 0x10); + #endif } void alist_process_naudio_mp3(struct hle_t* hle) @@ -312,7 +344,18 @@ void alist_process_naudio_mp3(struct hle_t* hle) MIXER, INTERLEAVE, NAUDIO_14, SETLOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x10] = { + "UNKNOWN", "ADPCM", "CLEARBUFF", "ENVMIXER", + "LOADBUFF", "RESAMPLE", "SAVEBUFF", "MP3", + "MP3ADDY", "SETVOL", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "NAUDIO_14", "SETLOOP" + }; + + alist_process(hle, ABI, 0x10, ABI_names); + #else alist_process(hle, ABI, 0x10); + #endif } void alist_process_naudio_cbfd(struct hle_t* hle) @@ -325,5 +368,16 @@ void alist_process_naudio_cbfd(struct hle_t* hle) MIXER, INTERLEAVE, NAUDIO_14, SETLOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x10] = { + "UNKNOWN", "ADPCM", "CLEARBUFF", "ENVMIXER", + "LOADBUFF", "RESAMPLE", "SAVEBUFF", "MP3", + "MP3ADDY", "SETVOL", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "NAUDIO_14", "SETLOOP" + }; + + alist_process(hle, ABI, 0x10, ABI_names); + #else alist_process(hle, ABI, 0x10); + #endif } diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/alist_nead.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_nead.c similarity index 70% rename from Frameworks/lazyusf/lazyusf/rsp_hle/alist_nead.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_nead.c index 35fd58090..5c0cbbc51 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/alist_nead.c +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/alist_nead.c @@ -24,12 +24,12 @@ #include #include -#include "common.h" - #include "alist.h" +#include "common.h" #include "hle_external.h" #include "hle_internal.h" #include "memory.h" +#include "ucodes.h" /* remove windows define to 0x06 */ #ifdef DUPLICATE @@ -92,7 +92,7 @@ static void ADPCM(struct hle_t* hle, uint32_t w1, uint32_t w2) static void CLEARBUFF(struct hle_t* hle, uint32_t w1, uint32_t w2) { uint16_t dmem = w1; - uint16_t count = w2; + uint16_t count = w2 & 0xfff; if (count == 0) return; @@ -371,7 +371,21 @@ void alist_process_nead_mk(struct hle_t* hle) SPNOOP, SPNOOP, SPNOOP, SPNOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x20] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "SPNOOP", + "SPNOOP", "RESAMPLE", "SPNOOP", "SEGMENT", + "SETBUFF", "SPNOOP", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE_MK", "POLEF", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1_MK", "ENVMIXER_MK", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "SPNOOP", + "SPNOOP", "SPNOOP", "SPNOOP", "SPNOOP", + "SPNOOP", "SPNOOP", "SPNOOP", "SPNOOP" + }; + alist_process(hle, ABI, 0x20, ABI_names); + #else alist_process(hle, ABI, 0x20); + #endif } void alist_process_nead_sf(struct hle_t* hle) @@ -387,7 +401,21 @@ void alist_process_nead_sf(struct hle_t* hle) SPNOOP, SPNOOP, SPNOOP, SPNOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x20] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "SPNOOP", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "SPNOOP", + "SETBUFF", "SPNOOP", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE_MK", "POLEF", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "SPNOOP", + "HILOGAIN", "UNKNOWN", "DUPLICATE", "SPNOOP", + "SPNOOP", "SPNOOP", "SPNOOP", "SPNOOP" + }; + alist_process(hle, ABI, 0x20, ABI_names); + #else alist_process(hle, ABI, 0x20); + #endif } void alist_process_nead_sfj(struct hle_t* hle) @@ -403,7 +431,21 @@ void alist_process_nead_sfj(struct hle_t* hle) SPNOOP, SPNOOP, SPNOOP, SPNOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x20] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "SPNOOP", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "SPNOOP", + "SETBUFF", "SPNOOP", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE_MK", "POLEF", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN", + "HILOGAIN", "UNKNOWN", "DUPLICATE", "SPNOOP", + "SPNOOP", "SPNOOP", "SPNOOP", "SPNOOP" + }; + alist_process(hle, ABI, 0x20, ABI_names); + #else alist_process(hle, ABI, 0x20); + #endif } void alist_process_nead_fz(struct hle_t* hle) @@ -419,7 +461,21 @@ void alist_process_nead_fz(struct hle_t* hle) SPNOOP, SPNOOP, SPNOOP, SPNOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x20] = { + "UNKNOWN", "ADPCM", "CLEARBUFF", "SPNOOP", + "ADDMIXER", "RESAMPLE", "SPNOOP", "SPNOOP", + "SETBUFF", "SPNOOP", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "SPNOOP", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN", + "SPNOOP", "UNKNOWN", "DUPLICATE", "SPNOOP", + "SPNOOP", "SPNOOP", "SPNOOP", "SPNOOP" + }; + alist_process(hle, ABI, 0x20, ABI_names); + #else alist_process(hle, ABI, 0x20); + #endif } void alist_process_nead_wrjb(struct hle_t* hle) @@ -435,7 +491,21 @@ void alist_process_nead_wrjb(struct hle_t* hle) SPNOOP, SPNOOP, SPNOOP, SPNOOP }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x20] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "UNKNOWN", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "SPNOOP", + "SETBUFF", "SPNOOP", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "SPNOOP", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN", + "HILOGAIN", "UNKNOWN", "DUPLICATE", "FILTER", + "SPNOOP", "SPNOOP", "SPNOOP", "SPNOOP" + }; + alist_process(hle, ABI, 0x20, ABI_names); + #else alist_process(hle, ABI, 0x20); + #endif } void alist_process_nead_ys(struct hle_t* hle) @@ -449,7 +519,19 @@ void alist_process_nead_ys(struct hle_t* hle) LOADBUFF, SAVEBUFF, ENVSETUP2, UNKNOWN }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x18] = { + "UNKNOWN", "ADPCM", "CLEARBUFF", "UNKNOWN", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "FILTER", + "SETBUFF", "DUPLICATE", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "HILOGAIN", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN" + }; + alist_process(hle, ABI, 0x18, ABI_names); + #else alist_process(hle, ABI, 0x18); + #endif } void alist_process_nead_1080(struct hle_t* hle) @@ -463,7 +545,19 @@ void alist_process_nead_1080(struct hle_t* hle) LOADBUFF, SAVEBUFF, ENVSETUP2, UNKNOWN }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x18] = { + "UNKNOWN", "ADPCM", "CLEARBUFF", "UNKNOWN", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "FILTER", + "SETBUFF", "DUPLICATE", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "HILOGAIN", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN" + }; + alist_process(hle, ABI, 0x18, ABI_names); + #else alist_process(hle, ABI, 0x18); + #endif } void alist_process_nead_oot(struct hle_t* hle) @@ -477,7 +571,19 @@ void alist_process_nead_oot(struct hle_t* hle) LOADBUFF, SAVEBUFF, ENVSETUP2, UNKNOWN }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x18] = { + "UNKNOWN", "ADPCM", "CLEARBUFF", "UNKNOWN", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "FILTER", + "SETBUFF", "DUPLICATE", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "HILOGAIN", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN" + }; + alist_process(hle, ABI, 0x18, ABI_names); + #else alist_process(hle, ABI, 0x18); + #endif } void alist_process_nead_mm(struct hle_t* hle) @@ -491,7 +597,19 @@ void alist_process_nead_mm(struct hle_t* hle) LOADBUFF, SAVEBUFF, ENVSETUP2, UNKNOWN }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x18] = { + "UNKNOWN", "ADPCM", "CLEARBUFF", "SPNOOP", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "FILTER", + "SETBUFF", "DUPLICATE", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "HILOGAIN", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN" + }; + alist_process(hle, ABI, 0x18, ABI_names); + #else alist_process(hle, ABI, 0x18); + #endif } void alist_process_nead_mmb(struct hle_t* hle) @@ -505,7 +623,19 @@ void alist_process_nead_mmb(struct hle_t* hle) LOADBUFF, SAVEBUFF, ENVSETUP2, UNKNOWN }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x18] = { + "SPNOOP", "ADPCM", "CLEARBUFF", "SPNOOP", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "FILTER", + "SETBUFF", "DUPLICATE", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "HILOGAIN", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN" + }; + alist_process(hle, ABI, 0x18, ABI_names); + #else alist_process(hle, ABI, 0x18); + #endif } void alist_process_nead_ac(struct hle_t* hle) @@ -519,5 +649,17 @@ void alist_process_nead_ac(struct hle_t* hle) LOADBUFF, SAVEBUFF, ENVSETUP2, UNKNOWN }; + #ifdef DEBUG_INFO + static const char * ABI_names[0x18] = { + "UNKNOWN", "ADPCM", "CLEARBUFF", "SPNOOP", + "ADDMIXER", "RESAMPLE", "RESAMPLE_ZOH", "FILTER", + "SETBUFF", "DUPLICATE", "DMEMMOVE", "LOADADPCM", + "MIXER", "INTERLEAVE", "HILOGAIN", "SETLOOP", + "NEAD_16", "INTERL", "ENVSETUP1", "ENVMIXER", + "LOADBUFF", "SAVEBUFF", "ENVSETUP2", "UNKNOWN" + }; + alist_process(hle, ABI, 0x18, ABI_names); + #else alist_process(hle, ABI, 0x18); + #endif } diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/arithmetics.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/arithmetics.h similarity index 94% rename from Frameworks/lazyusf/lazyusf/rsp_hle/arithmetics.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/arithmetics.h index a6ac36484..529293d25 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/arithmetics.h +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/arithmetics.h @@ -26,7 +26,7 @@ #include "common.h" -static INLINE int16_t clamp_s16(int_fast32_t x) +static inline int16_t clamp_s16(int_fast32_t x) { x = (x < INT16_MIN) ? INT16_MIN: x; x = (x > INT16_MAX) ? INT16_MAX: x; @@ -34,7 +34,7 @@ static INLINE int16_t clamp_s16(int_fast32_t x) return x; } -static INLINE int32_t vmulf(int16_t x, int16_t y) +static inline int32_t vmulf(int16_t x, int16_t y) { return (((int32_t)(x))*((int32_t)(y))+0x4000)>>15; } diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/audio.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/audio.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/audio.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/audio.c diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/audio.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/audio.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/audio.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/audio.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/cicx105.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/cicx105.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/cicx105.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/cicx105.c diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/common.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/common.h similarity index 95% rename from Frameworks/lazyusf/lazyusf/rsp_hle/common.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/common.h index 904c5197c..195b8641a 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/common.h +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/common.h @@ -30,9 +30,9 @@ #endif #ifdef _MSC_VER -# define INLINE __forceinline +# define inline __forceinline #elif defined __GNUC__ -# define INLINE inline __attribute__((always_inline)) +# define inline inline __attribute__((always_inline)) #endif #endif diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/hle.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/hle.c similarity index 98% rename from Frameworks/lazyusf/lazyusf/rsp_hle/hle.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/hle.c index 7ee5d0484..abb744d66 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/hle.c +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/hle.c @@ -328,12 +328,11 @@ static void normal_task_dispatching(struct hle_t* hle) static void non_task_dispatching(struct hle_t* hle) { - const unsigned int sum = sum_bytes(hle->imem, 0x1000 >> 1); + const unsigned int sum = sum_bytes(hle->imem, 44); - switch (sum) { - /* CIC x105 ucode (used during boot of CIC x105 games) */ - case 0x9e2: /* CIC 6105 */ - case 0x9f2: /* CIC 7105 */ + if (sum == 0x9e2) + { + /* CIC x105 ucode (used during boot of CIC x105 games) */ cicx105_ucode(hle); return; } diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/hle.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/hle.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/hle.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/hle.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/hle_external.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/hle_external.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/hle_external.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/hle_external.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/hle_internal.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/hle_internal.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/hle_internal.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/hle_internal.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/jpeg.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/jpeg.c similarity index 99% rename from Frameworks/lazyusf/lazyusf/rsp_hle/jpeg.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/jpeg.c index 6def24b1d..bde1d6b69 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/jpeg.c +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/jpeg.c @@ -474,7 +474,7 @@ static void ReorderSubBlock(int16_t *dst, const int16_t *src, const unsigned int unsigned int i; /* source and destination sublocks cannot overlap */ - assert(labs(dst - src) > SUBBLOCK_SIZE); + assert(abs(dst - src) > SUBBLOCK_SIZE); for (i = 0; i < SUBBLOCK_SIZE; ++i) dst[i] = src[table[i]]; diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/memory.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/memory.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/memory.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/memory.c diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/memory.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/memory.h similarity index 77% rename from Frameworks/lazyusf/lazyusf/rsp_hle/memory.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/memory.h index 46b02a884..91a747b16 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/memory.h +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/memory.h @@ -57,24 +57,24 @@ enum { TASK_YIELD_DATA_SIZE = 0xffc }; -static INLINE unsigned int align(unsigned int x, unsigned amount) +static inline unsigned int align(unsigned int x, unsigned amount) { --amount; return (x + amount) & ~amount; } -static INLINE uint8_t* u8(const unsigned char* buffer, unsigned address) +static inline uint8_t* u8(const unsigned char* buffer, unsigned address) { return (uint8_t*)(buffer + (address ^ S8)); } -static INLINE uint16_t* u16(const unsigned char* buffer, unsigned address) +static inline uint16_t* u16(const unsigned char* buffer, unsigned address) { assert((address & 1) == 0); return (uint16_t*)(buffer + (address ^ S16)); } -static INLINE uint32_t* u32(const unsigned char* buffer, unsigned address) +static inline uint32_t* u32(const unsigned char* buffer, unsigned address) { assert((address & 3) == 0); return (uint32_t*)(buffer + address); @@ -89,93 +89,93 @@ void store_u32(unsigned char* buffer, unsigned address, const uint32_t* src, siz /* convenient functions for DMEM access */ -static INLINE uint8_t* dmem_u8(struct hle_t* hle, uint16_t address) +static inline uint8_t* dmem_u8(struct hle_t* hle, uint16_t address) { return u8(hle->dmem, address & 0xfff); } -static INLINE uint16_t* dmem_u16(struct hle_t* hle, uint16_t address) +static inline uint16_t* dmem_u16(struct hle_t* hle, uint16_t address) { return u16(hle->dmem, address & 0xfff); } -static INLINE uint32_t* dmem_u32(struct hle_t* hle, uint16_t address) +static inline uint32_t* dmem_u32(struct hle_t* hle, uint16_t address) { return u32(hle->dmem, address & 0xfff); } -static INLINE void dmem_load_u8(struct hle_t* hle, uint8_t* dst, uint16_t address, size_t count) +static inline void dmem_load_u8(struct hle_t* hle, uint8_t* dst, uint16_t address, size_t count) { load_u8(dst, hle->dmem, address & 0xfff, count); } -static INLINE void dmem_load_u16(struct hle_t* hle, uint16_t* dst, uint16_t address, size_t count) +static inline void dmem_load_u16(struct hle_t* hle, uint16_t* dst, uint16_t address, size_t count) { load_u16(dst, hle->dmem, address & 0xfff, count); } -static INLINE void dmem_load_u32(struct hle_t* hle, uint32_t* dst, uint16_t address, size_t count) +static inline void dmem_load_u32(struct hle_t* hle, uint32_t* dst, uint16_t address, size_t count) { load_u32(dst, hle->dmem, address & 0xfff, count); } -static INLINE void dmem_store_u8(struct hle_t* hle, const uint8_t* src, uint16_t address, size_t count) +static inline void dmem_store_u8(struct hle_t* hle, const uint8_t* src, uint16_t address, size_t count) { store_u8(hle->dmem, address & 0xfff, src, count); } -static INLINE void dmem_store_u16(struct hle_t* hle, const uint16_t* src, uint16_t address, size_t count) +static inline void dmem_store_u16(struct hle_t* hle, const uint16_t* src, uint16_t address, size_t count) { store_u16(hle->dmem, address & 0xfff, src, count); } -static INLINE void dmem_store_u32(struct hle_t* hle, const uint32_t* src, uint16_t address, size_t count) +static inline void dmem_store_u32(struct hle_t* hle, const uint32_t* src, uint16_t address, size_t count) { store_u32(hle->dmem, address & 0xfff, src, count); } /* convenient functions DRAM access */ -static INLINE uint8_t* dram_u8(struct hle_t* hle, uint32_t address) +static inline uint8_t* dram_u8(struct hle_t* hle, uint32_t address) { return u8(hle->dram, address & 0xffffff); } -static INLINE uint16_t* dram_u16(struct hle_t* hle, uint32_t address) +static inline uint16_t* dram_u16(struct hle_t* hle, uint32_t address) { return u16(hle->dram, address & 0xffffff); } -static INLINE uint32_t* dram_u32(struct hle_t* hle, uint32_t address) +static inline uint32_t* dram_u32(struct hle_t* hle, uint32_t address) { return u32(hle->dram, address & 0xffffff); } -static INLINE void dram_load_u8(struct hle_t* hle, uint8_t* dst, uint32_t address, size_t count) +static inline void dram_load_u8(struct hle_t* hle, uint8_t* dst, uint32_t address, size_t count) { load_u8(dst, hle->dram, address & 0xffffff, count); } -static INLINE void dram_load_u16(struct hle_t* hle, uint16_t* dst, uint32_t address, size_t count) +static inline void dram_load_u16(struct hle_t* hle, uint16_t* dst, uint32_t address, size_t count) { load_u16(dst, hle->dram, address & 0xffffff, count); } -static INLINE void dram_load_u32(struct hle_t* hle, uint32_t* dst, uint32_t address, size_t count) +static inline void dram_load_u32(struct hle_t* hle, uint32_t* dst, uint32_t address, size_t count) { load_u32(dst, hle->dram, address & 0xffffff, count); } -static INLINE void dram_store_u8(struct hle_t* hle, const uint8_t* src, uint32_t address, size_t count) +static inline void dram_store_u8(struct hle_t* hle, const uint8_t* src, uint32_t address, size_t count) { store_u8(hle->dram, address & 0xffffff, src, count); } -static INLINE void dram_store_u16(struct hle_t* hle, const uint16_t* src, uint32_t address, size_t count) +static inline void dram_store_u16(struct hle_t* hle, const uint16_t* src, uint32_t address, size_t count) { store_u16(hle->dram, address & 0xffffff, src, count); } -static INLINE void dram_store_u32(struct hle_t* hle, const uint32_t* src, uint32_t address, size_t count) +static inline void dram_store_u32(struct hle_t* hle, const uint32_t* src, uint32_t address, size_t count) { store_u32(hle->dram, address & 0xffffff, src, count); } diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/mp3.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/mp3.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/mp3.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/mp3.c diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/musyx.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/musyx.c similarity index 99% rename from Frameworks/lazyusf/lazyusf/rsp_hle/musyx.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/musyx.c index 6243b2efd..36b7b7c5f 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/musyx.c +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/musyx.c @@ -727,7 +727,7 @@ static void mix_voice_samples(struct hle_t* hle, musyx_t *musyx, pitch_accu += pitch_step; /* handle end/restart points */ - dist = (int)(sample - sample_end); + dist = sample - sample_end; if (dist >= 0) sample = sample_restart + dist; diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/plugin.c b/Frameworks/lazyusf2/lazyusf2/rsp_hle/plugin.c similarity index 85% rename from Frameworks/lazyusf/lazyusf/rsp_hle/plugin.c rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/plugin.c index 4d5a965dd..844d395ad 100644 --- a/Frameworks/lazyusf/lazyusf/rsp_hle/plugin.c +++ b/Frameworks/lazyusf2/lazyusf2/rsp_hle/plugin.c @@ -25,17 +25,31 @@ #include #include -#include "usf/usf.h" -#include "usf/usf_internal.h" - -#include "r4300/interupt.h" +#include "../usf.h" +#include "../main.h" +#include "../usf_internal.h" #include "hle.h" /* Global functions needed by HLE core */ void HleVerboseMessage(void* user_defined, const char *message, ...) { - /* discard verbose message */ +#ifdef DEBUG_INFO + usf_state_t* state; + va_list ap; + size_t len; + + state = (usf_state_t*)user_defined; + + if (state->debug_log) + { + va_start( ap, message ); + vfprintf( state->debug_log, message, ap ); + va_end( ap ); + + fputs( "\n", state->debug_log ); + } +#endif } void HleErrorMessage(void* user_defined, const char *message, ...) @@ -55,7 +69,7 @@ void HleErrorMessage(void* user_defined, const char *message, ...) va_end( ap ); state->last_error = state->error_message; - state->stop = 1; + StopEmulation( state ); } void HleWarnMessage(void* user_defined, const char *message, ...) @@ -75,18 +89,17 @@ void HleWarnMessage(void* user_defined, const char *message, ...) va_end( ap ); state->last_error = state->error_message; - state->stop = 1; + StopEmulation( state ); } void HleCheckInterrupts(void* user_defined) { - //check_interupt((usf_state_t*)user_defined); + CheckInterrupts((usf_state_t*)user_defined); } void HleProcessDlistList(void* user_defined) { - usf_state_t * state = (usf_state_t *) user_defined; - state->g_r4300.mi.regs[MI_INTR_REG] |= MI_INTR_DP; + /* disabled */ } void HleProcessAlistList(void* user_defined) diff --git a/Frameworks/lazyusf/lazyusf/rsp_hle/ucodes.h b/Frameworks/lazyusf2/lazyusf2/rsp_hle/ucodes.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_hle/ucodes.h rename to Frameworks/lazyusf2/lazyusf2/rsp_hle/ucodes.h diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/bench.c b/Frameworks/lazyusf2/lazyusf2/rsp_lle/bench.c new file mode 100644 index 000000000..61f353805 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/bench.c @@ -0,0 +1,227 @@ +/******************************************************************************\ +* Project: Simple Vector Unit Benchmark * +* Authors: Iconoclast * +* Release: 2013.12.12 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ + +/* + * Since operations on scalar registers are much more predictable, + * standardized, and documented, we don't really need to bench those. + * + * I was thinking I should also add MTC0 (SP DMA and writes to SP_STATUS_REG) + * and, due to the SSE-style flags register file, CFC2 and CTC2, but I mostly + * just wanted to hurry up and make this header quick with all the basics. :P + * + * Fortunately, because all the methods are static (no conditional jumps), + * we can lazily leave the instruction word set to 0x00000000 for all the + * op-codes we are benching, and it will make no difference in speed. + */ + +#include +#include +#include +#include + +#include "../usf.h" + +#include "../usf_internal.h" + +#undef JUMP + +#define DisplayError(...) + +#include "config.h" +#include "matrix.h" +#include "rsp.h" + +#define NUMBER_OF_VU_OPCODES 38 + +ALIGNED usf_state_t state; + +void CheckInterrupts(usf_state_t * state) +{ + (void)state; + return; +} + +void SP_DMA_READ(usf_state_t * state) +{ + (void)state; + return; +} + +void SP_DMA_WRITE(usf_state_t * state) +{ + (void)state; + return; +} + +static void (*bench_tests[NUMBER_OF_VU_OPCODES])(usf_state_t *, int, int, int, int) = { + VMULF, VMACF, /* signed single-precision fractions */ + VMULU, VMACU, /* unsigned single-precision fractions */ + + VMUDL, VMADL, /* double-precision multiplies using partial products */ + VMUDM, VMADM, + VMUDN, VMADN, + VMUDH, VMADH, + + VADD, VSUB, VABS, + VADDC, VSUBC, + VSAW, + + VEQ, VNE, VLT, VGE, /* normal select compares */ + VCH, VCL, /* double-precision clip select */ + VCR, /* single-precision, one's complement */ + VMRG, + + VAND, VNAND, + VOR , VNOR , + VXOR, VNXOR, + + VRCPL, VRSQL, /* double-precision reciprocal look-ups */ + VRCPH, VRSQH, + + VMOV, VNOP +}; + +enum { + SP_VMULF = 000, + SP_VMULU = 001, + SP_VRNDP = 002, + SP_VMULQ = 003, + SP_VMUDL = 004, + SP_VMUDM = 005, + SP_VMUDN = 006, + SP_VMUDH = 007, + SP_VMACF = 010, + SP_VMACU = 011, + SP_VRNDN = 012, + SP_VMACQ = 013, + SP_VMADL = 014, + SP_VMADM = 015, + SP_VMADN = 016, + SP_VMADH = 017, + SP_VADD = 020, + SP_VSUB = 021, + SP_VSUT = 022, + SP_VABS = 023, + SP_VADDC = 024, + SP_VSUBC = 025, + SP_VADDB = 026, + SP_VSUBB = 027, + SP_VACCB = 030, + SP_VSUCB = 031, + SP_VSAD = 032, + SP_VSAC = 033, + SP_VSUM = 034, + SP_VSAW = 035, + + + SP_VLT = 040, + SP_VEQ = 041, + SP_VNE = 042, + SP_VGE = 043, + SP_VCL = 044, + SP_VCH = 045, + SP_VCR = 046, + SP_VMRG = 047, + SP_VAND = 050, + SP_VNAND = 051, + SP_VOR = 052, + SP_VNOR = 053, + SP_VXOR = 054, + SP_VNXOR = 055, + + + SP_VRCP = 060, + SP_VRCPL = 061, + SP_VRCPH = 062, + SP_VMOV = 063, + SP_VRSQ = 064, + SP_VRSQL = 065, + SP_VRSQH = 066, + SP_VNOP = 067, + SP_VEXTT = 070, + SP_VEXTQ = 071, + SP_VEXTN = 072, + + SP_VINST = 074, + SP_VINSQ = 075, + SP_VINSN = 076, + SP_VNULLOP= 077 +}; +const char* test_names[NUMBER_OF_VU_OPCODES] = { + mnemonics_C2[SP_VMULF], mnemonics_C2[SP_VMACF], + mnemonics_C2[SP_VMULU], mnemonics_C2[SP_VMACU], + + mnemonics_C2[SP_VMUDL], mnemonics_C2[SP_VMADL], + mnemonics_C2[SP_VMUDM], mnemonics_C2[SP_VMADM], + mnemonics_C2[SP_VMUDN], mnemonics_C2[SP_VMADN], + mnemonics_C2[SP_VMUDH], mnemonics_C2[SP_VMADH], + + mnemonics_C2[SP_VADD], mnemonics_C2[SP_VSUB], mnemonics_C2[SP_VABS], + mnemonics_C2[SP_VADDC], mnemonics_C2[SP_VSUBC], + mnemonics_C2[SP_VSAW], + + mnemonics_C2[SP_VEQ], mnemonics_C2[SP_VNE], + mnemonics_C2[SP_VLT], mnemonics_C2[SP_VGE], + mnemonics_C2[SP_VCH], mnemonics_C2[SP_VCL], + mnemonics_C2[SP_VCR], + mnemonics_C2[SP_VMRG], + + mnemonics_C2[SP_VAND], mnemonics_C2[SP_VNAND], + mnemonics_C2[SP_VOR] , mnemonics_C2[SP_VNOR] , + mnemonics_C2[SP_VXOR], mnemonics_C2[SP_VNXOR], + + mnemonics_C2[SP_VRCPL], mnemonics_C2[SP_VRSQL], + mnemonics_C2[SP_VRCPH], mnemonics_C2[SP_VRSQH], + + mnemonics_C2[SP_VMOV], mnemonics_C2[SP_VNOP], +}; + +const char* notice_starting = + "Ready to start benchmarks.\n"\ + "Close this message to commence tests. Testing could take minutes."; +const char* notice_finished = + "Finished writing benchmark results.\n"\ + "Check working emulator directory for \"sp_bench.txt\"."; + +int main(void) +{ + FILE* log; + clock_t t1, t2; + register int i, j; + register float delta, total; + + fputs(notice_starting, stderr); + log = fopen("sp_bench.txt", "w"); + fprintf(log, "RSP Vector Benchmarks Log\n\n"); + + total = 0.0; + for (i = 0; i < NUMBER_OF_VU_OPCODES; i++) + { + t1 = clock(); + for (j = -0x1000000; j < 0; j++) + bench_tests[i](&state, 0, 0, 0, 8); + t2 = clock(); + delta = (float)(t2 - t1) / CLOCKS_PER_SEC; + fprintf(log, "%s: %.3f s\n", test_names[i], delta); + fprintf(stderr, "%s: %.3f s\n", test_names[i], delta); + total += delta; + } + fprintf(log, "Total time spent: %.3f s\n", total); + fprintf(stderr, "Total time spent: %.3f s\n", total); + fclose(log); + fputs(notice_finished, stderr); + return 0; +} + diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/config.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/config.h new file mode 100644 index 000000000..8dce602b4 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/config.h @@ -0,0 +1,60 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.12.04 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#define _CRT_SECURE_NO_WARNINGS +/* + * This is only here for people using modern Microsoft compilers. + * Usually the default warning level complains over "deprecated" CRT methods. + * It's basically Microsoft's way of saying they're better than everyone. + */ + +#define MINIMUM_MESSAGE_PRIORITY 1 +#define EXTERN_COMMAND_LIST_GBI +#define EXTERN_COMMAND_LIST_ABI +#define SEMAPHORE_LOCK_CORRECTIONS +#define WAIT_FOR_CPU_HOST +#define EMULATE_STATIC_PC + +#ifdef EMULATE_STATIC_PC +#define CONTINUE {continue;} +#define JUMP {goto BRANCH;} +#else +#define CONTINUE {break;} +#define JUMP {break;} +#endif + +#if (0) +#define SP_EXECUTE_LOG +#define VU_EMULATE_SCALAR_ACCUMULATOR_READ +#endif + +#define CFG_HLE_GFX (0) +#define CFG_HLE_AUD (0) +#define CFG_HLE_VID (0) /* reserved/unused */ +#define CFG_HLE_JPG (0) /* unused */ +#define CFG_QUEUE_E_DRAM (0) +#define CFG_QUEUE_E_DMEM (0) +#define CFG_QUEUE_E_IMEM (0) +/* + * Note: This never actually made it into the configuration system. + * Instead, DMEM and IMEM are always exported on every call to DllConfig(). + */ + +/* + * Special switches. + * (generally for correcting RSP clock behavior on Project64 2.x) + * Also includes RSP register states debugger. + */ +#define CFG_WAIT_FOR_CPU_HOST (1) +#define CFG_MEND_SEMAPHORE_LOCK (0) +#define CFG_TRACE_RSP_REGISTERS (0) diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/execute.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/execute.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/execute.h rename to Frameworks/lazyusf2/lazyusf2/rsp_lle/execute.h diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/matrix.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/matrix.h new file mode 100644 index 000000000..b4c39b67e --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/matrix.h @@ -0,0 +1,231 @@ +/******************************************************************************\ +* Project: RSP Disassembler * +* Authors: Iconoclast * +* Release: 2013.09.12 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ + +#ifndef MATRIX_H +#define MATRIX_H + +#define reserved_ "illegal" +/* Or, "invalid". Change it to whatever, but it must NOT exceed 7 letters. */ + +static const char mnemonics_PRIMARY[64][8] = { +"SPECIAL","REGIMM ","J ","JAL ","BEQ ","BNE ","BLEZ ","BGTZ ", +"ADDI ","ADDIU ","SLTI ","SLTIU ","ANDI ","ORI ","XORI ","LUI ", +"COP0 ",reserved_,"COP2 ",reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +"LB ","LH ",reserved_,"LW ","LBU ","LHU ",reserved_,reserved_, +"SB ","SH ",reserved_,"SW ",reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,"LWC2 ",reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,"SWC2 ",reserved_,reserved_,reserved_,reserved_,reserved_ +}; +static const char mnemonics_SPECIAL[64][8] = { +"SLL ",reserved_,"SRL ","SRA ","SLLV ",reserved_,"SRLV ","SRAV ", +"JR ","JALR ",reserved_,reserved_,reserved_,"BREAK ",reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +"ADD ","ADDU ","SUB ","SUBU ","AND ","OR ","XOR ","NOR ", +reserved_,reserved_,"SLT ","SLTU ",reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_ +}; +static const char mnemonics_REGIMM[32][8] = { +"BLTZ ","BGEZ ",reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +"BLTZAL ","BGEZAL ",reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_ +}; +static const char mnemonics_COP0[32][8] = { +"MFC0 ",reserved_,reserved_,reserved_,"MTC0 ",reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_ +}; +static const char mnemonics_COP2[32][8] = { +"MFC2 ",reserved_,"CFC2 ",reserved_,"MTC2 ",reserved_,"CTC2 ",reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +"C2 ","C2 ","C2 ","C2 ","C2 ","C2 ","C2 ","C2 ", +"C2 ","C2 ","C2 ","C2 ","C2 ","C2 ","C2 ","C2 " +}; +static const char mnemonics_LWC2[32][8] = { +"LBV ","LSV ","LLV ","LDV ","LQV ","LRV ","LPV ","LUV ", +"LHV ","LFV ",reserved_,"LTV ",reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_ +}; +static const char mnemonics_SWC2[32][8] = { +"SBV ","SSV ","SLV ","SDV ","SQV ","SRV ","SPV ","SUV ", +"SHV ","SFV ","SWV ","STV ",reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_ +}; +static const char mnemonics_C2[64][8] = { +"VMULF ","VMULU ",reserved_,reserved_,"VMUDL ","VMUDM ","VMUDN ","VMUDH ", +"VMACF ","VMACU ",reserved_,"VMACQ ","VMADL ","VMADM ","VMADN ","VMADH ", +"VADD ","VSUB ",reserved_,"VABS ","VADDC ","VSUBC ",reserved_,reserved_, +reserved_,reserved_,reserved_,reserved_,reserved_,"VSAW ",reserved_,reserved_, +"VLT ","VEQ ","VNE ","VGE ","VCL ","VCH ","VCR ","VMRG ", +"VAND ","VNAND ","VOR ","VNOR ","VXOR ","VNXOR ",reserved_,reserved_, +"VRCP ","VRCPL ","VRCPH ","VMOV ","VRSQ ","VRSQL ","VRSQH ","VNOP ", +reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_,reserved_ +}; + +/* + * This is a dynamic-style disassembler. If it was really coded entirely for + * speed then the instruction decoding fetching would be more static, + * but this was mostly written to be accurate and small on size, not fastest. + */ + +static const char tokens_CR_V[4][4] = { + "vco", + "vcc", + "vce", "vce" /* exception override: only three control registers */ +}; +static const char* computational_elements[16] = { + "", /* vector operand */ + "[]", + "[0q]", "[1q]", /* scalar quarter */ + "[0h]", "[1h]", "[2h]", "[3h]", /* scalar half */ + "[0]", "[1]", "[2]", "[3]", "[4]", "[5]", "[6]", "[7]" /* scalar whole */ +}; +/* + * Syntax above is strict RSP assembler: + * 1. The letters must be lower-case, not upper-case. + * 2. It is not legal to append a 'w' for the scalar whole elements. + * 3. e==0x1 is impossible to set in the assembler; "[]" is just for debug. + */ + +void disassemble(char disasm[32], int IW) +{ + register int ID; + unsigned short imm = (IW & 0x0000FFFF); + const signed int offset = -(IW & 0x00008000) | imm; + const unsigned int target = IW%0x04000000 << 2; + const int func = IW % 64; + const int sa = (IW >> 6) & 31; + const int rd = (IW & 0x0000FFFF) >> 11; + const int rt = (IW >> 16) & 31; + const int rs = (IW >> 21) & 31; + const int op = (IW >> 26) & 63; + + if ((op & ~001) == 000) /* SPECIAL/REGIMM */ + ID = op + 1; + else if ((op & 075) == 020) /* COPz */ + ID = (op & 002) ? 04 + ((IW & 0x02000000) ? 3 : 0) : 03; + else if ((op & 067) == 062) /* ?WC2 */ + ID = 05 + ((op & 010) ? 1 : 0); + else + ID = 00; + + ID = (ID % 8) & 07; /* Help compiler see this as an aligned jump: */ + switch (ID) + { + char opcode[8]; + + case 00: + strcpy(opcode, mnemonics_PRIMARY[op]); + if (op & 32) /* op > 31: scalar loads and stores */ + sprintf(disasm, "%s $%u, %i($%u)", opcode, rt, offset, rs); + else if (op & 8) /* 16 > op > 8: arithmetic/logical immediate op */ + if (op == 0xF) /* LUI does not encode rs. */ + sprintf(disasm, "%s $%u, 0x%04X", opcode, rt, imm); + else + sprintf(disasm, "%s $%u, $%u, 0x%04X", opcode, rt, rs, imm); + else if (op & 4) /* 8 > op > 4: primary branches */ + if (op & 2) /* BLEZ, BGTZ */ + sprintf(disasm, "%s $%u, %i", opcode, rs, offset); + else /* BEQ, BNE */ + sprintf(disasm, "%s $%u, $%u, %i", opcode, rs, rt, offset); + else if (op & 2) /* J and JAL */ + sprintf(disasm, "%s 0x%07X", opcode, target); + else /* RESERVED */ + sprintf(disasm, "%s:%08X", opcode, IW); + return; + case 01: + strcpy(opcode, mnemonics_SPECIAL[func]); + if (func & 040) /* func > 31: arithmetic/logic R-op (omit traps) */ + sprintf(disasm, "%s $%u, $%u, $%u", opcode, rd, rs, rt); + else if (func < 8) /* scalar shifts */ + if (func & 4) /* variable */ + sprintf(disasm, "%s $%u, $%u, $%u", opcode, rd, rt, rs); + else + sprintf(disasm, "%s $%u, $%u, %u", opcode, rd, rt, sa); + else if (func == 010) /* JR */ + sprintf(disasm, "%s $%u", opcode, rs); + else if (func == 011) /* JALR */ + sprintf(disasm, "%s $%u, $%u", opcode, rd, rs); + else if (func == 015) /* BREAK */ + strcpy(disasm, opcode); /* sprintf "BREAK" + secret code mask */ + else /* RESERVED */ + sprintf(disasm, "%s:%08X", opcode, IW); + return; + case 02: + strcpy(opcode, mnemonics_REGIMM[rt]); + if ((rt & 016) == 000) /* BLTZ[AL] and BGEZ[AL] */ + sprintf(disasm, "%s $%u, %i", opcode, rs, offset); + else /* RESERVED */ + sprintf(disasm, "%s:%08X", opcode, IW); + return; + case 03: + strcpy(opcode, mnemonics_COP0[rs]); + if ((rs & 033) != 000) + sprintf(disasm, "%s:%08X", opcode, IW); /* RESERVED */ + else /* M?C0 */ + sprintf(disasm, "%s $%u, $c%u", opcode, rt, rd & 0xF); + return; + case 04: + strcpy(opcode, mnemonics_COP2[rs]); + if (opcode[0] == 'M') /* M?C2 */ + sprintf(disasm, "%s $%u, $v%u[0x%X]", opcode, rt, rd, sa >> 1); + else if (opcode[0] == 'C') /* C?C2 */ + sprintf(disasm, "%s $%u, $%s", opcode, rt, tokens_CR_V[rd % 4]); + else /* RESERVED */ + sprintf(disasm, "%s:%08X", opcode, IW); + return; + case 05: + strcpy(opcode, mnemonics_LWC2[rd]); + if (opcode[0] != 'L') + sprintf(disasm, "%s:%08X", opcode, IW); /* RESERVED */ + else + sprintf(disasm, "%s $v%u[0x%X], %i($%u)", opcode, rt, sa >> 1, + -(IW & 0x00000040) | func, rs); + return; + case 06: + strcpy(opcode, mnemonics_SWC2[rd]); + if (opcode[0] != 'S') + sprintf(disasm, "%s:%08X", opcode, IW); /* RESERVED */ + else + sprintf(disasm, "%s $v%u[0x%X], %i($%u)", opcode, rt, sa >> 1, + -(IW & 0x00000040) | func, rs); + return; + case 07: + strcpy(opcode, mnemonics_C2[func]); + if (opcode[0] != 'V') + sprintf(disasm, "%s:%08X", opcode, IW); /* RESERVED */ + else if (func == 067) /* VNOP */ + strcpy(disasm, opcode); + else if (func >= 060) /* VRCP?, VRSQ?, and VMOV */ + sprintf(disasm, "%s $v%u[%u], $v%u[0x%X]", opcode, sa, rd & 07, + rt, rs & 0xF); + else /* the most common vectors */ + if (func == 035) /* VSAR "VSAW", unconditional element syntax */ + sprintf(disasm, "%s $v%u, $v%u, $v%u[%u]", opcode, sa, rd, + rt, rs & 07); /* rs&7: 00"High", 01"Middle", 02"Low" */ + else /* conditional element syntax: e != 0x0 */ + sprintf(disasm, "%s $v%u, $v%u, $v%u%s", opcode, sa, rd, rt, + computational_elements[rs & 0xF]); + return; + } +} + +#endif diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/rsp.c b/Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/rsp.c rename to Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.c diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/rsp.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/rsp.h rename to Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/rsp_lle.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp_lle.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/rsp_lle.h rename to Frameworks/lazyusf2/lazyusf2/rsp_lle/rsp_lle.h diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/su.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/su.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/su.h rename to Frameworks/lazyusf2/lazyusf2/rsp_lle/su.h diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/cf.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/cf.h new file mode 100644 index 000000000..d4b31a910 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/cf.h @@ -0,0 +1,191 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.12.04 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#ifndef _CF_H +#define _CF_H + +/* + * For a non-cycle-accurate RSP emulator using SSE2, the following + * scalar definitions of the control registers are obsolete. + */ +#if (0) +/* + * Many vector units have pairs of "vector condition flags" registers. + * In SGI's vector unit implementation, these are denoted as the + * "vector control registers" under coprocessor 2. + * + * VCF-0 is the carry-out flags register: $vco. + * VCF-1 is the compare code flags register: $vcc. + * VCF-2 is the compare extension flags register: $vce. + * There is no fourth RSP flags register. + */ + +unsigned short VCO; +unsigned short VCC; +unsigned char VCE; +#endif + +/* + * These normally should have type `int` because they are Boolean T/F arrays. + * However, since SSE2 uses 128-bit XMM's, and Win32 `int` storage is 32-bit, + * we have the problem of 32*8 > 128 bits, so we use `short` to reduce packs. + */ + +#ifndef ARCH_MIN_SSE2 +unsigned short get_VCO(usf_state_t * state) +{ + register unsigned short VCO; + + VCO = 0x0000 + | (state->ne[0xF % 8] << 0xF) + | (state->ne[0xE % 8] << 0xE) + | (state->ne[0xD % 8] << 0xD) + | (state->ne[0xC % 8] << 0xC) + | (state->ne[0xB % 8] << 0xB) + | (state->ne[0xA % 8] << 0xA) + | (state->ne[0x9 % 8] << 0x9) + | (state->ne[0x8 % 8] << 0x8) + | (state->co[0x7 % 8] << 0x7) + | (state->co[0x6 % 8] << 0x6) + | (state->co[0x5 % 8] << 0x5) + | (state->co[0x4 % 8] << 0x4) + | (state->co[0x3 % 8] << 0x3) + | (state->co[0x2 % 8] << 0x2) + | (state->co[0x1 % 8] << 0x1) + | (state->co[0x0 % 8] << 0x0); + return (VCO); /* Big endian becomes little. */ +} +unsigned short get_VCC(usf_state_t * state) +{ + register unsigned short VCC; + + VCC = 0x0000 + | (state->clip[0xF % 8] << 0xF) + | (state->clip[0xE % 8] << 0xE) + | (state->clip[0xD % 8] << 0xD) + | (state->clip[0xC % 8] << 0xC) + | (state->clip[0xB % 8] << 0xB) + | (state->clip[0xA % 8] << 0xA) + | (state->clip[0x9 % 8] << 0x9) + | (state->clip[0x8 % 8] << 0x8) + | (state->comp[0x7 % 8] << 0x7) + | (state->comp[0x6 % 8] << 0x6) + | (state->comp[0x5 % 8] << 0x5) + | (state->comp[0x4 % 8] << 0x4) + | (state->comp[0x3 % 8] << 0x3) + | (state->comp[0x2 % 8] << 0x2) + | (state->comp[0x1 % 8] << 0x1) + | (state->comp[0x0 % 8] << 0x0); + return (VCC); /* Big endian becomes little. */ +} +unsigned char get_VCE(usf_state_t * state) +{ + register unsigned char VCE; + + VCE = 0x00 + | (state->vce[07] << 0x7) + | (state->vce[06] << 0x6) + | (state->vce[05] << 0x5) + | (state->vce[04] << 0x4) + | (state->vce[03] << 0x3) + | (state->vce[02] << 0x2) + | (state->vce[01] << 0x1) + | (state->vce[00] << 0x0); + return (VCE); /* Big endian becomes little. */ +} +#else +unsigned short get_VCO(usf_state_t * state) +{ + __m128i xmm, hi, lo; + register unsigned short VCO; + + hi = _mm_load_si128((__m128i *)state->ne); + lo = _mm_load_si128((__m128i *)state->co); + +/* + * Rotate Boolean storage from LSB to MSB. + */ + hi = _mm_slli_epi16(hi, 15); + lo = _mm_slli_epi16(lo, 15); + + xmm = _mm_packs_epi16(lo, hi); /* Decompress INT16 Booleans to INT8 ones. */ + VCO = _mm_movemask_epi8(xmm) & 0x0000FFFF; /* PMOVMSKB combines each MSB. */ + return (VCO); +} +unsigned short get_VCC(usf_state_t * state) +{ + __m128i xmm, hi, lo; + register unsigned short VCC; + + hi = _mm_load_si128((__m128i *)state->clip); + lo = _mm_load_si128((__m128i *)state->comp); + +/* + * Rotate Boolean storage from LSB to MSB. + */ + hi = _mm_slli_epi16(hi, 15); + lo = _mm_slli_epi16(lo, 15); + + xmm = _mm_packs_epi16(lo, hi); /* Decompress INT16 Booleans to INT8 ones. */ + VCC = _mm_movemask_epi8(xmm) & 0x0000FFFF; /* PMOVMSKB combines each MSB. */ + return (VCC); +} +unsigned char get_VCE(usf_state_t * state) +{ + __m128i xmm, hi, lo; + register unsigned char VCE; + + hi = _mm_setzero_si128(); + lo = _mm_load_si128((__m128i *)state->vce); + + lo = _mm_slli_epi16(lo, 15); /* Rotate Boolean storage from LSB to MSB. */ + + xmm = _mm_packs_epi16(lo, hi); /* Decompress INT16 Booleans to INT8 ones. */ + VCE = _mm_movemask_epi8(xmm) & 0x000000FF; /* PMOVMSKB combines each MSB. */ + return (VCE); +} +#endif + +/* + * CTC2 resources + * not sure how to vectorize going the other direction into SSE2 + */ +void set_VCO(usf_state_t * state, unsigned short VCO) +{ + register int i; + + for (i = 0; i < 8; i++) + state->co[i] = (VCO >> (i + 0x0)) & 1; + for (i = 0; i < 8; i++) + state->ne[i] = (VCO >> (i + 0x8)) & 1; + return; /* Little endian becomes big. */ +} +void set_VCC(usf_state_t * state, unsigned short VCC) +{ + register int i; + + for (i = 0; i < 8; i++) + state->comp[i] = (VCC >> (i + 0x0)) & 1; + for (i = 0; i < 8; i++) + state->clip[i] = (VCC >> (i + 0x8)) & 1; + return; /* Little endian becomes big. */ +} +void set_VCE(usf_state_t * state, unsigned char VCE) +{ + register int i; + + for (i = 0; i < 8; i++) + state->vce[i] = (VCE >> i) & 1; + return; /* Little endian becomes big. */ +} +#endif diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/clamp.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/clamp.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/clamp.h rename to Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/clamp.h diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/divrom.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/divrom.h new file mode 100644 index 000000000..18f5aad52 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/divrom.h @@ -0,0 +1,1111 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#ifndef _DIVROM_H +#define _DIVROM_H + +/* + * Boolean flag: Double-precision high was the last vector divide op? + * + * if (lastDivideOp == VRCP, VRCPL, VRSQ, VRSQL) + * DPH = false; // single-precision or double-precision low, not high + * else if (lastDivideOp == VRCPH, VRSQH) + * DPH = true; // double-precision high + * else if (lastDivideOp == VMOV, VNOP) + * DPH = DPH; // no change, divide-group ops but not real divides + */ + +/* + * 11-bit vector divide result look-up table + * Thanks to MooglyGuy @ MESS for organizing. + */ +static const unsigned short div_ROM[1024] = { + 0xFFFF, + 0xFF00, + 0xFE01, + 0xFD04, + 0xFC07, + 0xFB0C, + 0xFA11, + 0xF918, + 0xF81F, + 0xF727, + 0xF631, + 0xF53B, + 0xF446, + 0xF352, + 0xF25F, + 0xF16D, + 0xF07C, + 0xEF8B, + 0xEE9C, + 0xEDAE, + 0xECC0, + 0xEBD3, + 0xEAE8, + 0xE9FD, + 0xE913, + 0xE829, + 0xE741, + 0xE65A, + 0xE573, + 0xE48D, + 0xE3A9, + 0xE2C5, + 0xE1E1, + 0xE0FF, + 0xE01E, + 0xDF3D, + 0xDE5D, + 0xDD7E, + 0xDCA0, + 0xDBC2, + 0xDAE6, + 0xDA0A, + 0xD92F, + 0xD854, + 0xD77B, + 0xD6A2, + 0xD5CA, + 0xD4F3, + 0xD41D, + 0xD347, + 0xD272, + 0xD19E, + 0xD0CB, + 0xCFF8, + 0xCF26, + 0xCE55, + 0xCD85, + 0xCCB5, + 0xCBE6, + 0xCB18, + 0xCA4B, + 0xC97E, + 0xC8B2, + 0xC7E7, + 0xC71C, + 0xC652, + 0xC589, + 0xC4C0, + 0xC3F8, + 0xC331, + 0xC26B, + 0xC1A5, + 0xC0E0, + 0xC01C, + 0xBF58, + 0xBE95, + 0xBDD2, + 0xBD10, + 0xBC4F, + 0xBB8F, + 0xBACF, + 0xBA10, + 0xB951, + 0xB894, + 0xB7D6, + 0xB71A, + 0xB65E, + 0xB5A2, + 0xB4E8, + 0xB42E, + 0xB374, + 0xB2BB, + 0xB203, + 0xB14B, + 0xB094, + 0xAFDE, + 0xAF28, + 0xAE73, + 0xADBE, + 0xAD0A, + 0xAC57, + 0xABA4, + 0xAAF1, + 0xAA40, + 0xA98E, + 0xA8DE, + 0xA82E, + 0xA77E, + 0xA6D0, + 0xA621, + 0xA574, + 0xA4C6, + 0xA41A, + 0xA36E, + 0xA2C2, + 0xA217, + 0xA16D, + 0xA0C3, + 0xA01A, + 0x9F71, + 0x9EC8, + 0x9E21, + 0x9D79, + 0x9CD3, + 0x9C2D, + 0x9B87, + 0x9AE2, + 0x9A3D, + 0x9999, + 0x98F6, + 0x9852, + 0x97B0, + 0x970E, + 0x966C, + 0x95CB, + 0x952B, + 0x948B, + 0x93EB, + 0x934C, + 0x92AD, + 0x920F, + 0x9172, + 0x90D4, + 0x9038, + 0x8F9C, + 0x8F00, + 0x8E65, + 0x8DCA, + 0x8D30, + 0x8C96, + 0x8BFC, + 0x8B64, + 0x8ACB, + 0x8A33, + 0x899C, + 0x8904, + 0x886E, + 0x87D8, + 0x8742, + 0x86AD, + 0x8618, + 0x8583, + 0x84F0, + 0x845C, + 0x83C9, + 0x8336, + 0x82A4, + 0x8212, + 0x8181, + 0x80F0, + 0x8060, + 0x7FD0, + 0x7F40, + 0x7EB1, + 0x7E22, + 0x7D93, + 0x7D05, + 0x7C78, + 0x7BEB, + 0x7B5E, + 0x7AD2, + 0x7A46, + 0x79BA, + 0x792F, + 0x78A4, + 0x781A, + 0x7790, + 0x7706, + 0x767D, + 0x75F5, + 0x756C, + 0x74E4, + 0x745D, + 0x73D5, + 0x734F, + 0x72C8, + 0x7242, + 0x71BC, + 0x7137, + 0x70B2, + 0x702E, + 0x6FA9, + 0x6F26, + 0x6EA2, + 0x6E1F, + 0x6D9C, + 0x6D1A, + 0x6C98, + 0x6C16, + 0x6B95, + 0x6B14, + 0x6A94, + 0x6A13, + 0x6993, + 0x6914, + 0x6895, + 0x6816, + 0x6798, + 0x6719, + 0x669C, + 0x661E, + 0x65A1, + 0x6524, + 0x64A8, + 0x642C, + 0x63B0, + 0x6335, + 0x62BA, + 0x623F, + 0x61C5, + 0x614B, + 0x60D1, + 0x6058, + 0x5FDF, + 0x5F66, + 0x5EED, + 0x5E75, + 0x5DFD, + 0x5D86, + 0x5D0F, + 0x5C98, + 0x5C22, + 0x5BAB, + 0x5B35, + 0x5AC0, + 0x5A4B, + 0x59D6, + 0x5961, + 0x58ED, + 0x5879, + 0x5805, + 0x5791, + 0x571E, + 0x56AC, + 0x5639, + 0x55C7, + 0x5555, + 0x54E3, + 0x5472, + 0x5401, + 0x5390, + 0x5320, + 0x52AF, + 0x5240, + 0x51D0, + 0x5161, + 0x50F2, + 0x5083, + 0x5015, + 0x4FA6, + 0x4F38, + 0x4ECB, + 0x4E5E, + 0x4DF1, + 0x4D84, + 0x4D17, + 0x4CAB, + 0x4C3F, + 0x4BD3, + 0x4B68, + 0x4AFD, + 0x4A92, + 0x4A27, + 0x49BD, + 0x4953, + 0x48E9, + 0x4880, + 0x4817, + 0x47AE, + 0x4745, + 0x46DC, + 0x4674, + 0x460C, + 0x45A5, + 0x453D, + 0x44D6, + 0x446F, + 0x4408, + 0x43A2, + 0x433C, + 0x42D6, + 0x4270, + 0x420B, + 0x41A6, + 0x4141, + 0x40DC, + 0x4078, + 0x4014, + 0x3FB0, + 0x3F4C, + 0x3EE8, + 0x3E85, + 0x3E22, + 0x3DC0, + 0x3D5D, + 0x3CFB, + 0x3C99, + 0x3C37, + 0x3BD6, + 0x3B74, + 0x3B13, + 0x3AB2, + 0x3A52, + 0x39F1, + 0x3991, + 0x3931, + 0x38D2, + 0x3872, + 0x3813, + 0x37B4, + 0x3755, + 0x36F7, + 0x3698, + 0x363A, + 0x35DC, + 0x357F, + 0x3521, + 0x34C4, + 0x3467, + 0x340A, + 0x33AE, + 0x3351, + 0x32F5, + 0x3299, + 0x323E, + 0x31E2, + 0x3187, + 0x312C, + 0x30D1, + 0x3076, + 0x301C, + 0x2FC2, + 0x2F68, + 0x2F0E, + 0x2EB4, + 0x2E5B, + 0x2E02, + 0x2DA9, + 0x2D50, + 0x2CF8, + 0x2C9F, + 0x2C47, + 0x2BEF, + 0x2B97, + 0x2B40, + 0x2AE8, + 0x2A91, + 0x2A3A, + 0x29E4, + 0x298D, + 0x2937, + 0x28E0, + 0x288B, + 0x2835, + 0x27DF, + 0x278A, + 0x2735, + 0x26E0, + 0x268B, + 0x2636, + 0x25E2, + 0x258D, + 0x2539, + 0x24E5, + 0x2492, + 0x243E, + 0x23EB, + 0x2398, + 0x2345, + 0x22F2, + 0x22A0, + 0x224D, + 0x21FB, + 0x21A9, + 0x2157, + 0x2105, + 0x20B4, + 0x2063, + 0x2012, + 0x1FC1, + 0x1F70, + 0x1F1F, + 0x1ECF, + 0x1E7F, + 0x1E2E, + 0x1DDF, + 0x1D8F, + 0x1D3F, + 0x1CF0, + 0x1CA1, + 0x1C52, + 0x1C03, + 0x1BB4, + 0x1B66, + 0x1B17, + 0x1AC9, + 0x1A7B, + 0x1A2D, + 0x19E0, + 0x1992, + 0x1945, + 0x18F8, + 0x18AB, + 0x185E, + 0x1811, + 0x17C4, + 0x1778, + 0x172C, + 0x16E0, + 0x1694, + 0x1648, + 0x15FD, + 0x15B1, + 0x1566, + 0x151B, + 0x14D0, + 0x1485, + 0x143B, + 0x13F0, + 0x13A6, + 0x135C, + 0x1312, + 0x12C8, + 0x127F, + 0x1235, + 0x11EC, + 0x11A3, + 0x1159, + 0x1111, + 0x10C8, + 0x107F, + 0x1037, + 0x0FEF, + 0x0FA6, + 0x0F5E, + 0x0F17, + 0x0ECF, + 0x0E87, + 0x0E40, + 0x0DF9, + 0x0DB2, + 0x0D6B, + 0x0D24, + 0x0CDD, + 0x0C97, + 0x0C50, + 0x0C0A, + 0x0BC4, + 0x0B7E, + 0x0B38, + 0x0AF2, + 0x0AAD, + 0x0A68, + 0x0A22, + 0x09DD, + 0x0998, + 0x0953, + 0x090F, + 0x08CA, + 0x0886, + 0x0842, + 0x07FD, + 0x07B9, + 0x0776, + 0x0732, + 0x06EE, + 0x06AB, + 0x0668, + 0x0624, + 0x05E1, + 0x059E, + 0x055C, + 0x0519, + 0x04D6, + 0x0494, + 0x0452, + 0x0410, + 0x03CE, + 0x038C, + 0x034A, + 0x0309, + 0x02C7, + 0x0286, + 0x0245, + 0x0204, + 0x01C3, + 0x0182, + 0x0141, + 0x0101, + 0x00C0, + 0x0080, + 0x0040, + 0x6A09, + 0xFFFF, + 0x6955, + 0xFF00, + 0x68A1, + 0xFE02, + 0x67EF, + 0xFD06, + 0x673E, + 0xFC0B, + 0x668D, + 0xFB12, + 0x65DE, + 0xFA1A, + 0x6530, + 0xF923, + 0x6482, + 0xF82E, + 0x63D6, + 0xF73B, + 0x632B, + 0xF648, + 0x6280, + 0xF557, + 0x61D7, + 0xF467, + 0x612E, + 0xF379, + 0x6087, + 0xF28C, + 0x5FE0, + 0xF1A0, + 0x5F3A, + 0xF0B6, + 0x5E95, + 0xEFCD, + 0x5DF1, + 0xEEE5, + 0x5D4E, + 0xEDFF, + 0x5CAC, + 0xED19, + 0x5C0B, + 0xEC35, + 0x5B6B, + 0xEB52, + 0x5ACB, + 0xEA71, + 0x5A2C, + 0xE990, + 0x598F, + 0xE8B1, + 0x58F2, + 0xE7D3, + 0x5855, + 0xE6F6, + 0x57BA, + 0xE61B, + 0x5720, + 0xE540, + 0x5686, + 0xE467, + 0x55ED, + 0xE38E, + 0x5555, + 0xE2B7, + 0x54BE, + 0xE1E1, + 0x5427, + 0xE10D, + 0x5391, + 0xE039, + 0x52FC, + 0xDF66, + 0x5268, + 0xDE94, + 0x51D5, + 0xDDC4, + 0x5142, + 0xDCF4, + 0x50B0, + 0xDC26, + 0x501F, + 0xDB59, + 0x4F8E, + 0xDA8C, + 0x4EFE, + 0xD9C1, + 0x4E6F, + 0xD8F7, + 0x4DE1, + 0xD82D, + 0x4D53, + 0xD765, + 0x4CC6, + 0xD69E, + 0x4C3A, + 0xD5D7, + 0x4BAF, + 0xD512, + 0x4B24, + 0xD44E, + 0x4A9A, + 0xD38A, + 0x4A10, + 0xD2C8, + 0x4987, + 0xD206, + 0x48FF, + 0xD146, + 0x4878, + 0xD086, + 0x47F1, + 0xCFC7, + 0x476B, + 0xCF0A, + 0x46E5, + 0xCE4D, + 0x4660, + 0xCD91, + 0x45DC, + 0xCCD6, + 0x4558, + 0xCC1B, + 0x44D5, + 0xCB62, + 0x4453, + 0xCAA9, + 0x43D1, + 0xC9F2, + 0x434F, + 0xC93B, + 0x42CF, + 0xC885, + 0x424F, + 0xC7D0, + 0x41CF, + 0xC71C, + 0x4151, + 0xC669, + 0x40D2, + 0xC5B6, + 0x4055, + 0xC504, + 0x3FD8, + 0xC453, + 0x3F5B, + 0xC3A3, + 0x3EDF, + 0xC2F4, + 0x3E64, + 0xC245, + 0x3DE9, + 0xC198, + 0x3D6E, + 0xC0EB, + 0x3CF5, + 0xC03F, + 0x3C7C, + 0xBF93, + 0x3C03, + 0xBEE9, + 0x3B8B, + 0xBE3F, + 0x3B13, + 0xBD96, + 0x3A9C, + 0xBCED, + 0x3A26, + 0xBC46, + 0x39B0, + 0xBB9F, + 0x393A, + 0xBAF8, + 0x38C5, + 0xBA53, + 0x3851, + 0xB9AE, + 0x37DD, + 0xB90A, + 0x3769, + 0xB867, + 0x36F6, + 0xB7C5, + 0x3684, + 0xB723, + 0x3612, + 0xB681, + 0x35A0, + 0xB5E1, + 0x352F, + 0xB541, + 0x34BF, + 0xB4A2, + 0x344F, + 0xB404, + 0x33DF, + 0xB366, + 0x3370, + 0xB2C9, + 0x3302, + 0xB22C, + 0x3293, + 0xB191, + 0x3226, + 0xB0F5, + 0x31B9, + 0xB05B, + 0x314C, + 0xAFC1, + 0x30DF, + 0xAF28, + 0x3074, + 0xAE8F, + 0x3008, + 0xADF7, + 0x2F9D, + 0xAD60, + 0x2F33, + 0xACC9, + 0x2EC8, + 0xAC33, + 0x2E5F, + 0xAB9E, + 0x2DF6, + 0xAB09, + 0x2D8D, + 0xAA75, + 0x2D24, + 0xA9E1, + 0x2CBC, + 0xA94E, + 0x2C55, + 0xA8BC, + 0x2BEE, + 0xA82A, + 0x2B87, + 0xA799, + 0x2B21, + 0xA708, + 0x2ABB, + 0xA678, + 0x2A55, + 0xA5E8, + 0x29F0, + 0xA559, + 0x298B, + 0xA4CB, + 0x2927, + 0xA43D, + 0x28C3, + 0xA3B0, + 0x2860, + 0xA323, + 0x27FD, + 0xA297, + 0x279A, + 0xA20B, + 0x2738, + 0xA180, + 0x26D6, + 0xA0F6, + 0x2674, + 0xA06C, + 0x2613, + 0x9FE2, + 0x25B2, + 0x9F59, + 0x2552, + 0x9ED1, + 0x24F2, + 0x9E49, + 0x2492, + 0x9DC2, + 0x2432, + 0x9D3B, + 0x23D3, + 0x9CB4, + 0x2375, + 0x9C2F, + 0x2317, + 0x9BA9, + 0x22B9, + 0x9B25, + 0x225B, + 0x9AA0, + 0x21FE, + 0x9A1C, + 0x21A1, + 0x9999, + 0x2145, + 0x9916, + 0x20E8, + 0x9894, + 0x208D, + 0x9812, + 0x2031, + 0x9791, + 0x1FD6, + 0x9710, + 0x1F7B, + 0x968F, + 0x1F21, + 0x960F, + 0x1EC7, + 0x9590, + 0x1E6D, + 0x9511, + 0x1E13, + 0x9492, + 0x1DBA, + 0x9414, + 0x1D61, + 0x9397, + 0x1D09, + 0x931A, + 0x1CB1, + 0x929D, + 0x1C59, + 0x9221, + 0x1C01, + 0x91A5, + 0x1BAA, + 0x9129, + 0x1B53, + 0x90AF, + 0x1AFC, + 0x9034, + 0x1AA6, + 0x8FBA, + 0x1A50, + 0x8F40, + 0x19FA, + 0x8EC7, + 0x19A5, + 0x8E4F, + 0x1950, + 0x8DD6, + 0x18FB, + 0x8D5E, + 0x18A7, + 0x8CE7, + 0x1853, + 0x8C70, + 0x17FF, + 0x8BF9, + 0x17AB, + 0x8B83, + 0x1758, + 0x8B0D, + 0x1705, + 0x8A98, + 0x16B2, + 0x8A23, + 0x1660, + 0x89AE, + 0x160D, + 0x893A, + 0x15BC, + 0x88C6, + 0x156A, + 0x8853, + 0x1519, + 0x87E0, + 0x14C8, + 0x876D, + 0x1477, + 0x86FB, + 0x1426, + 0x8689, + 0x13D6, + 0x8618, + 0x1386, + 0x85A7, + 0x1337, + 0x8536, + 0x12E7, + 0x84C6, + 0x1298, + 0x8456, + 0x1249, + 0x83E7, + 0x11FB, + 0x8377, + 0x11AC, + 0x8309, + 0x115E, + 0x829A, + 0x1111, + 0x822C, + 0x10C3, + 0x81BF, + 0x1076, + 0x8151, + 0x1029, + 0x80E4, + 0x0FDC, + 0x8078, + 0x0F8F, + 0x800C, + 0x0F43, + 0x7FA0, + 0x0EF7, + 0x7F34, + 0x0EAB, + 0x7EC9, + 0x0E60, + 0x7E5E, + 0x0E15, + 0x7DF4, + 0x0DCA, + 0x7D8A, + 0x0D7F, + 0x7D20, + 0x0D34, + 0x7CB6, + 0x0CEA, + 0x7C4D, + 0x0CA0, + 0x7BE5, + 0x0C56, + 0x7B7C, + 0x0C0C, + 0x7B14, + 0x0BC3, + 0x7AAC, + 0x0B7A, + 0x7A45, + 0x0B31, + 0x79DE, + 0x0AE8, + 0x7977, + 0x0AA0, + 0x7911, + 0x0A58, + 0x78AB, + 0x0A10, + 0x7845, + 0x09C8, + 0x77DF, + 0x0981, + 0x777A, + 0x0939, + 0x7715, + 0x08F2, + 0x76B1, + 0x08AB, + 0x764D, + 0x0865, + 0x75E9, + 0x081E, + 0x7585, + 0x07D8, + 0x7522, + 0x0792, + 0x74BF, + 0x074D, + 0x745D, + 0x0707, + 0x73FA, + 0x06C2, + 0x7398, + 0x067D, + 0x7337, + 0x0638, + 0x72D5, + 0x05F3, + 0x7274, + 0x05AF, + 0x7213, + 0x056A, + 0x71B3, + 0x0526, + 0x7152, + 0x04E2, + 0x70F2, + 0x049F, + 0x7093, + 0x045B, + 0x7033, + 0x0418, + 0x6FD4, + 0x03D5, + 0x6F76, + 0x0392, + 0x6F17, + 0x0350, + 0x6EB9, + 0x030D, + 0x6E5B, + 0x02CB, + 0x6DFD, + 0x0289, + 0x6DA0, + 0x0247, + 0x6D43, + 0x0206, + 0x6CE6, + 0x01C4, + 0x6C8A, + 0x0183, + 0x6C2D, + 0x0142, + 0x6BD1, + 0x0101, + 0x6B76, + 0x00C0, + 0x6B1A, + 0x0080, + 0x6ABF, + 0x0040, + 0x6A64 +}; + +enum { + SP_DIV_SQRT_NO, + SP_DIV_SQRT_YES +}; +enum { + SP_DIV_PRECISION_SINGLE = 0, + SP_DIV_PRECISION_DOUBLE = 1, + SP_DIV_PRECISION_CURRENT +}; + +INLINE static void do_div(usf_state_t * state, int data, int sqrt, int precision) +{ + int32_t addr; + int fetch; + int shift; + + if (precision == SP_DIV_PRECISION_SINGLE) + data = (data < 0) ? -data : +data; + if (precision == SP_DIV_PRECISION_DOUBLE && data < 0) + data = (data >= -32768) ? -data : ~data; + +/* + * Note, from the code just above, that data cannot be negative. + * (data >= 0) is unconditionally forced by the above algorithm. + */ + addr = data; + if (data == 0x00000000) + { + shift = (precision == SP_DIV_PRECISION_SINGLE) ? 16 : 0; + addr = addr << shift; + } + else + for (shift = 0; addr >= 0x00000000; addr <<= 1, shift++); + addr = (addr >> 22) & 0x000001FF; + + if (sqrt == SP_DIV_SQRT_YES) + { + addr &= 0x000001FE; + addr |= 0x00000200 | (shift & 1); + } + fetch = div_ROM[addr]; + shift ^= 31; /* flipping shift direction from left- to right- */ + shift >>= (sqrt == SP_DIV_SQRT_YES); + state->DivOut = (0x40000000 | (fetch << 14)) >> shift; + if (state->DivIn == 0) /* corner case: overflow via division by zero */ + state->DivOut = 0x7FFFFFFF; + else if (state->DivIn == -32768) /* corner case: signed underflow barrier */ + state->DivOut = 0xFFFF0000; + else + state->DivOut ^= (state->DivIn < 0) ? ~0 : 0; + return; +} +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/shuffle.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/shuffle.h new file mode 100644 index 000000000..f82991c86 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/shuffle.h @@ -0,0 +1,317 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.12.04 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#ifndef _SHUFFLE_H +#define _SHUFFLE_H + +/* + * for ANSI compliance (null INLINE attribute if not already set to `inline`) + * Include "rsp.h" for active, non-ANSI inline definition. + */ +#ifndef INLINE +#define INLINE +#endif + +#ifdef ARCH_MIN_ARM_NEON +static const unsigned char smask[16][16] = { + {0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF}, + {0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF}, + {0x0,0x1,0x0,0x1,0x4,0x5,0x4,0x5,0x8,0x9,0x8,0x9,0xC,0xD,0xC,0xD}, + {0x2,0x3,0x2,0x3,0x6,0x7,0x6,0x7,0xA,0xB,0xA,0xB,0xE,0xF,0xE,0xF}, + {0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9}, + {0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB}, + {0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD}, + {0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF}, + {0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1}, + {0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3}, + {0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5}, + {0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7}, + {0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9}, + {0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB}, + {0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD}, + {0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF} +}; + +#define conv816_to_882(v) ((int8x8x2_t) { vget_low_s8(v), vget_high_s8(v) }) + +INLINE static void SHUFFLE_VECTOR(short* VD, short* VT, const int e) +{ + int8x16_t xmm; + int8x16_t key; + + xmm = vld1q_s8((const int8_t*)VT); + key = vld1q_s8(smask[e]); + xmm = vcombine_s8(vtbl2_s8(conv816_to_882(xmm), vget_low_s8(key)), vtbl2_s8(conv816_to_882(xmm), vget_high_s8(key))); + vst1q_s8((int8_t*)VD, xmm); + + return; +} +#endif + +#ifdef ARCH_MIN_SSSE3 +static const unsigned char smask[16][16] = { + {0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF}, + {0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF}, + {0x0,0x1,0x0,0x1,0x4,0x5,0x4,0x5,0x8,0x9,0x8,0x9,0xC,0xD,0xC,0xD}, + {0x2,0x3,0x2,0x3,0x6,0x7,0x6,0x7,0xA,0xB,0xA,0xB,0xE,0xF,0xE,0xF}, + {0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9}, + {0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB}, + {0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD}, + {0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF}, + {0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1,0x0,0x1}, + {0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3,0x2,0x3}, + {0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5,0x4,0x5}, + {0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7,0x6,0x7}, + {0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9,0x8,0x9}, + {0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB,0xA,0xB}, + {0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD,0xC,0xD}, + {0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF,0xE,0xF} +}; + +INLINE static void SHUFFLE_VECTOR(short* VD, short* VT, const int e) +{ /* SSSE3 shuffling method was written entirely by CEN64 author MarathonMan. */ + __m128i xmm; + __m128i key; + + xmm = _mm_load_si128((__m128i *)VT); + key = _mm_load_si128((__m128i *)(smask[e])); + xmm = _mm_shuffle_epi8(xmm, key); + _mm_store_si128((__m128i *)VD, xmm); + return; +} +#endif + +#if defined ARCH_MIN_SSE2 && !defined ARCH_MIN_SSSE3 +#define B(x) ((x) & 3) +#define SHUFFLE(a,b,c,d) ((B(d)<<6) | (B(c)<<4) | (B(b)<<2) | (B(a)<<0)) + +static const int simm[16] = { + SHUFFLE(00, 01, 02, 03), /* vector operands */ + SHUFFLE(00, 01, 02, 03), + SHUFFLE(00, 00, 02, 02), /* scalar quarters */ + SHUFFLE(01, 01, 03, 03), + SHUFFLE(00, 00, 00, 00), /* scalar halves */ + SHUFFLE(01, 01, 01, 01), + SHUFFLE(02, 02, 02, 02), + SHUFFLE(03, 03, 03, 03), + SHUFFLE(00, 00, 00, 00), /* scalar wholes */ + SHUFFLE(01, 01, 01, 01), + SHUFFLE(02, 02, 02, 02), + SHUFFLE(03, 03, 03, 03), + SHUFFLE(04, 04, 04, 04), + SHUFFLE(05, 05, 05, 05), + SHUFFLE(06, 06, 06, 06), + SHUFFLE(07, 07, 07, 07) +}; + +static __m128i shuffle_none(__m128i xmm) +{/* + // const int order = simm[0x0]; + + xmm = _mm_shufflehi_epi16(xmm, order); + xmm = _mm_shufflelo_epi16(xmm, order);*/ + return (xmm); +} +static __m128i shuffle_0q(__m128i xmm) +{ + //const int order = simm[0x2]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(00, 00, 02, 02)); + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(00, 00, 02, 02)); + return (xmm); +} +static __m128i shuffle_1q(__m128i xmm) +{ + //const int order = simm[0x3]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(01, 01, 03, 03)); + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(01, 01, 03, 03)); + return (xmm); +} +static __m128i shuffle_0h(__m128i xmm) +{ + //const int order = simm[0x4]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(00, 00, 00, 00)); + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(00, 00, 00, 00)); + return (xmm); +} +static __m128i shuffle_1h(__m128i xmm) +{ + //const int order = simm[0x5]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(01, 01, 01, 01)); + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(01, 01, 01, 01)); + return (xmm); +} +static __m128i shuffle_2h(__m128i xmm) +{ + //const int order = simm[0x6]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(02, 02, 02, 02)); + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(02, 02, 02, 02)); + return (xmm); +} +static __m128i shuffle_3h(__m128i xmm) +{ + //const int order = simm[0x7]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(03, 03, 03, 03)); + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(03, 03, 03, 03)); + return (xmm); +} +static __m128i shuffle_0w(__m128i xmm) +{ + //const int order = simm[0x8]; + + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(00, 00, 00, 00)); + xmm = _mm_unpacklo_epi16(xmm, xmm); + return (xmm); +} +static __m128i shuffle_1w(__m128i xmm) +{ + //const int order = simm[0x9]; + + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(01, 01, 01, 01)); + xmm = _mm_unpacklo_epi16(xmm, xmm); + return (xmm); +} +static __m128i shuffle_2w(__m128i xmm) +{ + //const int order = simm[0xA]; + + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(02, 02, 02, 02)); + xmm = _mm_unpacklo_epi16(xmm, xmm); + return (xmm); +} +static __m128i shuffle_3w(__m128i xmm) +{ + //const int order = simm[0xB]; + + xmm = _mm_shufflelo_epi16(xmm, SHUFFLE(03, 03, 03, 03)); + xmm = _mm_unpacklo_epi16(xmm, xmm); + return (xmm); +} +static __m128i shuffle_4w(__m128i xmm) +{ + //const int order = simm[0xC]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(04, 04, 04, 04)); + xmm = _mm_unpackhi_epi16(xmm, xmm); + return (xmm); +} +static __m128i shuffle_5w(__m128i xmm) +{ + //const int order = simm[0xD]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(05, 05, 05, 05)); + xmm = _mm_unpackhi_epi16(xmm, xmm); + return (xmm); +} +static __m128i shuffle_6w(__m128i xmm) +{ + //const int order = simm[0xE]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(06, 06, 06, 06)); + xmm = _mm_unpackhi_epi16(xmm, xmm); + return (xmm); +} +static __m128i shuffle_7w(__m128i xmm) +{ + //const int order = simm[0xF]; + + xmm = _mm_shufflehi_epi16(xmm, SHUFFLE(07, 07, 07, 07)); + xmm = _mm_unpackhi_epi16(xmm, xmm); + return (xmm); +} + +static __m128i (*SSE2_SHUFFLE_16[16])(__m128i) = { + shuffle_none, shuffle_none, + shuffle_0q, shuffle_1q, + shuffle_0h, shuffle_1h, shuffle_2h, shuffle_3h, + shuffle_0w, shuffle_1w, shuffle_2w, shuffle_3w, + shuffle_4w, shuffle_5w, shuffle_6w, shuffle_7w +}; + +INLINE static void SHUFFLE_VECTOR(short* VD, short* VT, const int e) +{ + __m128i xmm; + + xmm = _mm_load_si128((__m128i *)VT); + xmm = SSE2_SHUFFLE_16[e](xmm); + _mm_store_si128((__m128i *)VD, xmm); + return; +} +#endif + +#if !defined ARCH_MIN_ARM_NEON && !defined ARCH_MIN_SSE2 && !defined ARCH_MIN_SSSE3 +/* + * vector-scalar element decoding + * Obsolete. Consider using at least the SSE2 algorithms instead. + */ +static const int ei[16][8] = { + { 00, 01, 02, 03, 04, 05, 06, 07 }, /* none (vector-only operand) */ + { 00, 01, 02, 03, 04, 05, 06, 07 }, + { 00, 00, 02, 02, 04, 04, 06, 06 }, /* 0Q */ + { 01, 01, 03, 03, 05, 05, 07, 07 }, /* 1Q */ + { 00, 00, 00, 00, 04, 04, 04, 04 }, /* 0H */ + { 01, 01, 01, 01, 05, 05, 05, 05 }, /* 1H */ + { 02, 02, 02, 02, 06, 06, 06, 06 }, /* 2H */ + { 03, 03, 03, 03, 07, 07, 07, 07 }, /* 3H */ + { 00, 00, 00, 00, 00, 00, 00, 00 }, /* 0 */ + { 01, 01, 01, 01, 01, 01, 01, 01 }, /* 1 */ + { 02, 02, 02, 02, 02, 02, 02, 02 }, /* 2 */ + { 03, 03, 03, 03, 03, 03, 03, 03 }, /* 3 */ + { 04, 04, 04, 04, 04, 04, 04, 04 }, /* 4 */ + { 05, 05, 05, 05, 05, 05, 05, 05 }, /* 5 */ + { 06, 06, 06, 06, 06, 06, 06, 06 }, /* 6 */ + { 07, 07, 07, 07, 07, 07, 07, 07 } /* 7 */ +}; + +static const int sub_mask[16] = { + 0x0, + 0x0, + 0x1, 0x1, + 0x3, 0x3, 0x3, 0x3, + 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7, 0x7 +}; + +INLINE static void SHUFFLE_VECTOR(short* VD, short* VT, const int e) +{ + ALIGNED short SV[8]; + register int i, j; +#if (0 == 0) + j = sub_mask[e]; + for (i = 0; i < N; i++) + SV[i] = VT[(i & ~j) | (e & j)]; +#else + if (e & 0x8) + for (i = 0; i < N; i++) + SV[i] = VT[(i & 0x0) | (e & 0x7)]; + else if (e & 0x4) + for (i = 0; i < N; i++) + SV[i] = VT[(i & 0xC) | (e & 0x3)]; + else if (e & 0x2) + for (i = 0; i < N; i++) + SV[i] = VT[(i & 0xE) | (e & 0x1)]; + else /* if ((e == 0b0000) || (e == 0b0001)) */ + for (i = 0; i < N; i++) + SV[i] = VT[(i & 0x7) | (e & 0x0)]; +#endif + for (i = 0; i < N; i++) + *(VD + i) = *(SV + i); + return; +} + +#endif +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vabs.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vabs.h new file mode 100644 index 000000000..fc4e6c3d5 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vabs.h @@ -0,0 +1,102 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +/* + * -1: VT *= -1, because VS < 0 // VT ^= -2 if even, or ^= -1, += 1 + * 0: VT *= 0, because VS = 0 // VT ^= VT + * +1: VT *= +1, because VS > 0 // VT ^= 0 + * VT ^= -1, "negate" -32768 as ~+32767 (corner case hack for N64 SP) + */ +INLINE static void do_abs(usf_state_t * state, short* VD, short* VS, short* VT) +{ + ALIGNED short neg[N], pos[N]; + ALIGNED short nez[N], cch[N]; /* corner case hack -- abs(-32768) == +32767 */ + ALIGNED short res[N]; + register int i; + + vector_copy(res, VT); + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs = vld1q_s16((const int16_t*)VS); + int16x8_t resi = vld1q_s16((const int16_t*)VT); + int16x8_t zero = vdupq_n_s16(0); + int16x8_t eightk = vdupq_n_s16(0x8000); + int16x8_t one = vdupq_n_s16(1); + + uint16x8_t negi = vcltq_s16(vs,zero); + int16x8_t posi = vaddq_s16((int16x8_t)negi,one); + posi = vorrq_s16(posi,(int16x8_t)negi); + resi = veorq_s16(resi,posi); + uint16x8_t ccch = vcgeq_s16(resi,eightk); + int16x8_t ch = vnegq_s16((int16x8_t)ccch); + resi = vaddq_s16(resi, (int16x8_t)ch); + + vst1q_s16(VACC_L, resi); + vector_copy(VD, VACC_L); + return; + +#else + + +#ifndef ARCH_MIN_SSE2 +#define MASK_XOR +#endif + for (i = 0; i < N; i++) + neg[i] = (VS[i] < 0x0000); + for (i = 0; i < N; i++) + pos[i] = (VS[i] > 0x0000); + for (i = 0; i < N; i++) + nez[i] = 0; +#ifdef MASK_XOR + for (i = 0; i < N; i++) + neg[i] = -neg[i]; + for (i = 0; i < N; i++) + nez[i] += neg[i]; +#else + for (i = 0; i < N; i++) + nez[i] -= neg[i]; +#endif + for (i = 0; i < N; i++) + nez[i] += pos[i]; +#ifdef MASK_XOR + for (i = 0; i < N; i++) + res[i] ^= nez[i]; + for (i = 0; i < N; i++) + cch[i] = (res[i] != -32768); + for (i = 0; i < N; i++) + res[i] += cch[i]; /* -(x) === (x ^ -1) + 1 */ +#else + for (i = 0; i < N; i++) + res[i] *= nez[i]; + for (i = 0; i < N; i++) + cch[i] = (res[i] == -32768); + for (i = 0; i < N; i++) + res[i] -= cch[i]; +#endif + vector_copy(VACC_L, res); + vector_copy(VD, VACC_L); + return; +#endif +} + +static void VABS(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_abs(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vadd.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vadd.h new file mode 100644 index 000000000..9566e6122 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vadd.h @@ -0,0 +1,84 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void clr_ci(usf_state_t * state, short* VD, short* VS, short* VT) +{ /* clear CARRY and carry in to accumulators */ +#ifdef ARCH_MIN_SSE2 + + __m128i xmm,vs,vt,co; /*,ne;*/ + + xmm = _mm_setzero_si128(); + vs = _mm_load_si128((const __m128i*)VS); + vt = _mm_load_si128((const __m128i*)VT); + co = _mm_load_si128((const __m128i*)state->co); + + vs = _mm_add_epi16(vs,vt); + vs = _mm_add_epi16(vs,co); + + _mm_store_si128((__m128i*)VACC_L, vs); + + SIGNED_CLAMP_ADD(state, VD, VS, VT); + + _mm_storeu_si128((__m128i*)state->ne, xmm); + _mm_storeu_si128((__m128i*)state->co, xmm); + + return; +#endif + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs, vt, zero1,co; + + zero1 = vdupq_n_s16(0); + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + co = vld1q_s16((const int16_t*)state->co); + + vs = vaddq_s16(vs,vt); + vs = vaddq_s16(vs,co); + + vst1q_s16(VACC_L, vs); + + SIGNED_CLAMP_ADD(state, VD, VS, VT); + vst1q_s16(state->ne, zero1); + vst1q_s16(state->co, zero1); + + return; +#endif + +#if !defined ARCH_MIN_ARM_NEON && !defined ARCH_MIN_SSE2 + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = VS[i] + VT[i] + state->co[i]; + SIGNED_CLAMP_ADD(state, VD, VS, VT); + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = 0; + + return; +#endif + +} + +static void VADD(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + clr_ci(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vaddc.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vaddc.h new file mode 100644 index 000000000..c6b8c4a96 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vaddc.h @@ -0,0 +1,66 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void set_co(usf_state_t * state, short* VD, short* VS, short* VT) +{ /* set CARRY and carry out from sum */ + +#ifdef ARCH_MIN_ARM_NEON + + uint16x4_t vs_low = vld1_u16((const uint16_t*)VS); + uint16x4_t vs_high = vld1_u16((const uint16_t*)VS+4); + uint16x4_t vt_low = vld1_u16((const uint16_t*)VT); + uint16x4_t vt_high = vld1_u16((const uint16_t*)VT+4); + uint32x4_t zero = vdupq_n_u32(0); + + uint32x4_t v_l = vaddl_u16(vs_low, vt_low); + uint32x4_t v_h = vaddl_u16(vs_high, vt_high); + uint16x4_t vl16 = vaddhn_u32(v_l,zero); + uint16x4_t vh16 = vaddhn_u32(v_h,zero); + uint16x8_t vaccl = vcombine_u16(vmovn_u32(v_l),vmovn_u32(v_h)); + uint16x8_t co = vcombine_u16(vl16,vh16); + + vst1q_u16(VACC_L, vaccl); + vector_copy(VD, VACC_L); + vst1q_u16(state->ne, (uint16x8_t)zero); + vst1q_u16(state->co, co); + + return; +#else + + ALIGNED int32_t sum[N]; + register int i; + + for (i = 0; i < N; i++) + sum[i] = (unsigned short)(VS[i]) + (unsigned short)(VT[i]); + for (i = 0; i < N; i++) + VACC_L[i] = VS[i] + VT[i]; + vector_copy(VD, VACC_L); + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = sum[i] >> 16; /* native: (sum[i] > +65535) */ + return; + +#endif +} + +static void VADDC(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + set_co(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vand.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vand.h new file mode 100644 index 000000000..b5c00884e --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vand.h @@ -0,0 +1,44 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE void do_and(usf_state_t * state, short* VD, short* VS, short* VT) +{ +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs = vld1q_s16((const int16_t *)VS); + int16x8_t vt = vld1q_s16((const int16_t *)VT); + int16x8_t vaccl = vandq_s16(vs,vt); + vst1q_s16(VACC_L, vaccl); + vector_copy(VD, VACC_L); + return; + +#else + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = VS[i] & VT[i]; + vector_copy(VD, VACC_L); + return; +#endif +} + +static void VAND(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_and(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vch.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vch.h new file mode 100644 index 000000000..63345778e --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vch.h @@ -0,0 +1,137 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_ch(usf_state_t * state, short* VD, short* VS, short* VT) +{ + ALIGNED short eq[N], ge[N], le[N]; + ALIGNED short sn[N]; + ALIGNED short VC[N]; + ALIGNED short diff[N]; + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t v_vc,neg_sn,vce,v_eq; + int16x8_t zero = vdupq_n_s16(0); + int16x8_t one = vdupq_n_s16(1); + + int16x8_t vs = vld1q_s16((const int16_t *)VS); + int16x8_t vt = vld1q_s16((const int16_t *)VT); + v_vc = vt; + int16x8_t v_sn = veorq_s16(vs,v_vc); + uint16x8_t sn_u = vcltq_s16(v_sn,zero); + v_vc = veorq_s16(v_vc, (int16x8_t)sn_u); + neg_sn = vnegq_s16((int16x8_t)sn_u); + + uint16x8_t vs_vc_eq = vceqq_s16(vs,v_vc); + vce = vandq_s16((int16x8_t)vs_vc_eq,v_sn); + + v_vc = vaddq_s16(v_vc,v_sn); + v_eq = vorrq_s16(vce,(int16x8_t)vs_vc_eq); + v_eq = vnegq_s16(v_eq); + + int16x8_t not_sn = vsubq_s16(neg_sn, one); + int16x8_t neg_vs = vmvnq_s16(vs); + int16x8_t v_diff = vorrq_s16(neg_vs, not_sn); + uint16x8_t ule = vcleq_s16(vt,v_diff); + int16x8_t v_le = vnegq_s16((int16x8_t)ule); + + v_diff = vorrq_s16(vs, (int16x8_t)sn_u); + uint16x8_t uge = vcgeq_s16(v_diff,vt); + int16x8_t v_ge = vnegq_s16((int16x8_t)uge); + + vst1q_s16(ge, v_ge); + vst1q_s16(le, v_le); + vst1q_s16(sn, v_sn); + vst1q_s16(VC, v_vc); + + merge(state->comp, sn, le, ge); + merge(VACC_L, state->comp, VC, VS); + vector_copy(VD, VACC_L); + + v_eq = veorq_s16(v_eq, one); + + vst1q_s16(state->clip, v_ge); + vst1q_s16(state->comp, v_le); + vst1q_s16(state->ne, v_eq); + vst1q_s16(state->co, v_sn); + + return; + +#else + + register int i; + + for (i = 0; i < N; i++) + VC[i] = VT[i]; + for (i = 0; i < N; i++) + sn[i] = (VS[i] ^ VC[i]) < 0; + for (i = 0; i < N; i++) + VC[i] ^= -sn[i]; /* if (sn == ~0) {VT = ~VT;} else {VT = VT;} */ + for (i = 0; i < N; i++) + state->vce[i] = (VS[i] == VC[i]); /* (VR[vs][i] + ~VC[i] == ~1); */ + for (i = 0; i < N; i++) + state->vce[i] &= sn[i]; + for (i = 0; i < N; i++) + VC[i] += sn[i]; /* converts ~(VT) into -(VT) if (sign) */ + for (i = 0; i < N; i++) + eq[i] = (VS[i] == VC[i]); + for (i = 0; i < N; i++) + eq[i] |= state->vce[i]; + +#if (0) + for (i = 0; i < N; i++) + le[i] = sn[i] ? (VS[i] <= VC[i]) : (VC[i] < 0); + for (i = 0; i < N; i++) + ge[i] = sn[i] ? (VC[i] > 0x0000) : (VS[i] >= VC[i]); +#elif (0) + for (i = 0; i < N; i++) + le[i] = sn[i] ? (VT[i] <= -VS[i]) : (VT[i] <= ~0x0000); + for (i = 0; i < N; i++) + ge[i] = sn[i] ? (~0x0000 >= VT[i]) : (VS[i] >= VT[i]); +#else + for (i = 0; i < N; i++) + diff[i] = -VS[i] | -(sn[i] ^ 1); + for (i = 0; i < N; i++) + le[i] = VT[i] <= diff[i]; + for (i = 0; i < N; i++) + diff[i] = +VS[i] | -(sn[i] ^ 0); + for (i = 0; i < N; i++) + ge[i] = diff[i] >= VT[i]; +#endif + + merge(state->comp, sn, le, ge); + merge(VACC_L, state->comp, VC, VS); + vector_copy(VD, VACC_L); + + for (i = 0; i < N; i++) + state->clip[i] = ge[i]; + for (i = 0; i < N; i++) + state->comp[i] = le[i]; + for (i = 0; i < N; i++) + state->ne[i] = eq[i] ^ 1; + for (i = 0; i < N; i++) + state->co[i] = sn[i]; + return; +#endif +} + +static void VCH(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_ch(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vcl.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vcl.h new file mode 100644 index 000000000..9138955c1 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vcl.h @@ -0,0 +1,184 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_cl(usf_state_t * state, short* VD, short* VS, short* VT) +{ + + ALIGNED short eq[N], ge[N], le[N]; + ALIGNED short gen[N], len[N], lz[N], uz[N], sn[N]; + ALIGNED short diff[N]; + ALIGNED short cmp[N]; + ALIGNED unsigned short VB[N], VC[N]; + register int i; + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t v_vc,neg_sn,v_eq,v_vb,v_sn,v_diff,v_uz,v_cmp; + + int16x8_t zero = vdupq_n_s16(0); + int16x8_t minus1 = vdupq_n_s16(-1); + int16x8_t one = vdupq_n_s16(1); + + int16x8_t vs = vld1q_s16((const int16_t *)VS); + int16x8_t vt = vld1q_s16((const int16_t *)VT); + int16x8_t ne = vld1q_s16((const int16_t *)state->ne); + int16x8_t co = vld1q_s16((const int16_t *)state->co); + int16x8_t vce = vld1q_s16((const int16_t *)state->vce); + + v_vb = vs; + v_vc = vt; + + v_eq = veorq_s16(ne, one); + v_sn = co; + + neg_sn = vnegq_s16((int16x8_t)v_sn); + v_vc = veorq_s16(v_vc, (int16x8_t)neg_sn); + v_vc = vaddq_s16(v_vc, v_sn); + + v_diff = vsubq_s16(v_vb,v_vc); + + uint16x8_t vb_cond = vceqq_s16(v_vb,minus1); + uint16x8_t vc_cond = vceqq_s16(v_vc,zero); + vb_cond = vmvnq_u16(vb_cond); + vc_cond = vmvnq_u16(vc_cond); + v_uz = vorrq_s16((int16x8_t)vb_cond, (int16x8_t)vc_cond); + + uint16x8_t v_lz = vceqq_s16(v_diff,zero); + int16x8_t lz_s = vnegq_s16((int16x8_t)v_lz); + + int16x8_t v_gen = vorrq_s16(lz_s,v_uz); + int16x8_t v_len = vandq_s16(lz_s,v_uz); + v_gen = vandq_s16(v_gen,vce); + + vce = veorq_s16(vce,one); + v_len = vandq_s16(v_len,vce); + + v_len = vorrq_s16(v_len,v_gen); + uint16x8_t gen_u = vcgeq_u16((uint16x8_t)v_vb,(uint16x8_t)v_vc); + v_gen = vnegq_s16((int16x8_t)gen_u); + + v_cmp = vandq_s16(v_eq,v_sn); + + vst1q_s16(cmp, v_cmp); + vst1q_s16(len, v_len); + + merge(le, cmp, len, state->comp); + int16x8_t sn_xor = veorq_s16(v_sn,one); + v_cmp = vandq_s16(v_eq,sn_xor); + + vst1q_s16(cmp, v_cmp); + vst1q_s16(gen, v_gen); + vst1q_s16(sn, v_sn); + vst1q_s16(VC, v_vc); + + merge(ge, cmp, gen, state->clip); + + merge(cmp, sn, le, ge); + merge(VACC_L, cmp, (short *)VC, VS); + vector_copy(VD, VACC_L); + + int16x8_t v_ge = vld1q_s16((const int16_t *)ge); + int16x8_t v_le = vld1q_s16((const int16_t *)le); + + vst1q_s16(state->clip,v_ge); + vst1q_s16(state->comp,v_le); + + vst1q_s16(state->ne,zero); + vst1q_s16(state->co,zero); + vst1q_s16(state->vce,zero); + + return; + +#else + + + + for (i = 0; i < N; i++) + VB[i] = VS[i]; + for (i = 0; i < N; i++) + VC[i] = VT[i]; + +/* + for (i = 0; i < N; i++) + ge[i] = clip[i]; + for (i = 0; i < N; i++) + le[i] = comp[i]; +*/ + for (i = 0; i < N; i++) + eq[i] = state->ne[i] ^ 1; + for (i = 0; i < N; i++) + sn[i] = state->co[i]; +/* + * Now that we have extracted all the flags, we will essentially be masking + * them back in where they came from redundantly, unless the corresponding + * NOTEQUAL bit from VCO upper was not set.... + */ + for (i = 0; i < N; i++) + VC[i] = VC[i] ^ -sn[i]; + for (i = 0; i < N; i++) + VC[i] = VC[i] + sn[i]; /* conditional negation, if sn */ + for (i = 0; i < N; i++) + diff[i] = VB[i] - VC[i]; + for (i = 0; i < N; i++) + uz[i] = (VB[i] - VC[i] - 0xFFFF) >> 31; + for (i = 0; i < N; i++) + lz[i] = (diff[i] == 0x0000); + for (i = 0; i < N; i++) + gen[i] = lz[i] | uz[i]; + for (i = 0; i < N; i++) + len[i] = lz[i] & uz[i]; + for (i = 0; i < N; i++) + gen[i] = gen[i] & state->vce[i]; + for (i = 0; i < N; i++) + len[i] = len[i] & (state->vce[i] ^ 1); + for (i = 0; i < N; i++) + len[i] = len[i] | gen[i]; + for (i = 0; i < N; i++) + gen[i] = (VB[i] >= VC[i]); + + for (i = 0; i < N; i++) + cmp[i] = eq[i] & sn[i]; + merge(le, cmp, len, state->comp); + + for (i = 0; i < N; i++) + cmp[i] = eq[i] & (sn[i] ^ 1); + merge(ge, cmp, gen, state->clip); + + merge(cmp, sn, le, ge); + merge(VACC_L, cmp, (short *)VC, VS); + vector_copy(VD, VACC_L); + + for (i = 0; i < N; i++) + state->clip[i] = ge[i]; + for (i = 0; i < N; i++) + state->comp[i] = le[i]; + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = 0; + for (i = 0; i < N; i++) + state->vce[i] = 0; + return; +#endif +} + +static void VCL(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_cl(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vcr.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vcr.h new file mode 100644 index 000000000..b39b7ac6f --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vcr.h @@ -0,0 +1,110 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_cr(usf_state_t * state, short* VD, short* VS, short* VT) +{ + ALIGNED short ge[N], le[N], sn[N]; + ALIGNED short VC[N]; + ALIGNED short cmp[N]; + register int i; + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t v_sn, v_cmp, v_vc; + + int16x8_t zero = vdupq_n_s16(0); + + int16x8_t vs = vld1q_s16((const int16_t *)VS); + int16x8_t vt = vld1q_s16((const int16_t *)VT); + + v_vc = vt; + v_sn = veorq_s16(vs,vt); + v_sn = vshrq_n_s16(v_sn,15); + + v_cmp = vandq_s16(vs, v_sn); + v_cmp = vmvnq_s16(v_cmp); + uint16x8_t v_le = vcleq_s16(vt,v_cmp); + int16x8_t v_le_ = vnegq_s16((int16x8_t)v_le); + + v_cmp = vorrq_s16(vs, v_sn); + uint16x8_t v_ge = vcgeq_s16(v_cmp, vt); + int16x8_t v_ge_ = vnegq_s16((int16x8_t)v_ge); + + v_vc = veorq_s16(v_vc,v_sn); + + vst1q_s16(VC, v_vc); + vst1q_s16(le, v_le_); + vst1q_s16(ge, v_ge_); + + merge(VACC_L, le, VC, VS); + vector_copy(VD, VACC_L); + + vst1q_s16(state->clip, v_ge_); + vst1q_s16(state->comp, v_le_); + vst1q_s16(state->ne,zero); + vst1q_s16(state->co,zero); + vst1q_s16(state->vce,zero); + + return; + +#else + + + for (i = 0; i < N; i++) + VC[i] = VT[i]; + for (i = 0; i < N; i++) + sn[i] = (signed short)(VS[i] ^ VT[i]) >> 15; +#if (0) + for (i = 0; i < N; i++) + le[i] = sn[i] ? (VT[i] <= ~VS[i]) : (VT[i] <= ~0x0000); + for (i = 0; i < N; i++) + ge[i] = sn[i] ? (~0x0000 >= VT[i]) : (VS[i] >= VT[i]); +#else + for (i = 0; i < N; i++) + cmp[i] = ~(VS[i] & sn[i]); + for (i = 0; i < N; i++) + le[i] = (VT[i] <= cmp[i]); + for (i = 0; i < N; i++) + cmp[i] = (VS[i] | sn[i]); + for (i = 0; i < N; i++) + ge[i] = (cmp[i] >= VT[i]); +#endif + for (i = 0; i < N; i++) + VC[i] ^= sn[i]; /* if (sn == ~0) {VT = ~VT;} else {VT = VT;} */ + merge(VACC_L, le, VC, VS); + vector_copy(VD, VACC_L); + + for (i = 0; i < N; i++) + state->clip[i] = ge[i]; + for (i = 0; i < N; i++) + state->comp[i] = le[i]; + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = 0; + for (i = 0; i < N; i++) + state->vce[i] = 0; + return; +#endif +} + +static void VCR(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_cr(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/veq.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/veq.h new file mode 100644 index 000000000..870683960 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/veq.h @@ -0,0 +1,72 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_eq(usf_state_t * state, short* VD, short* VS, short* VT) +{ + register int i; + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t one = vdupq_n_s16(1); + int16x8_t zero = vdupq_n_s16(0); + int16x8_t vs = vld1q_s16((const int16_t *)VS); + int16x8_t vt = vld1q_s16((const int16_t *)VT); + int16x8_t v_ne = vld1q_s16((const int16_t *)state->ne); + + uint16x8_t v_comp = vceqq_s16(vs, vt); + int16x8_t v_comp_ = vnegq_s16((int16x8_t)v_comp); + v_ne = veorq_s16(v_ne, one); + v_comp_ = vandq_s16(v_comp_, v_ne); + + vector_copy(VACC_L, VT); + vector_copy(VD, VACC_L); + + vst1q_s16(state->comp,v_comp_); + vst1q_s16(state->ne,zero); + vst1q_s16(state->co,zero); + + return; + +#else + + for (i = 0; i < N; i++) + state->clip[i] = 0; + for (i = 0; i < N; i++) + state->comp[i] = (VS[i] == VT[i]); + for (i = 0; i < N; i++) + state->comp[i] = state->comp[i] & (state->ne[i] ^ 1); +#if (0) + merge(VACC_L, state->comp, VS, VT); /* correct but redundant */ +#else + vector_copy(VACC_L, VT); +#endif + vector_copy(VD, VACC_L); + + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = 0; + return; +#endif +} + +static void VEQ(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_eq(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vge.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vge.h new file mode 100644 index 000000000..512ec9246 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vge.h @@ -0,0 +1,86 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_ge(usf_state_t * state, short* VD, short* VS, short* VT) +{ + + ALIGNED short ce[N]; + ALIGNED short eq[N]; + register int i; + +#ifdef ARCH_MIN_ARM_NEON + + + int16x8_t zero = vdupq_n_s16(0); + int16x8_t one = vdupq_n_s16(1); + + int16x8_t vs = vld1q_s16((const int16_t *)VS); + int16x8_t vt = vld1q_s16((const int16_t *)VT); + int16x8_t v_ne = vld1q_s16((const int16_t *)state->ne); + int16x8_t v_co = vld1q_s16((const int16_t *)state->co); + + uint16x8_t v_eq_u = vceqq_s16(vs,vt); + int16x8_t v_eq_s = vnegq_s16((int16x8_t)v_eq_u); + + int16x8_t v_ce = vandq_s16(v_ne,v_co); + v_ce = veorq_s16(v_ce,one); + v_eq_s = vandq_s16(v_eq_s, v_ce); + vst1q_s16(state->clip, zero); + uint16x8_t v_comp = vcgtq_s16(vs, vt); + int16x8_t v_comp_s = vnegq_s16((int16x8_t)v_comp); + + v_comp_s = vorrq_s16(v_comp_s, v_eq_s); + vst1q_s16(state->comp, v_comp_s); + + merge(VACC_L, state->comp, VS, VT); + vector_copy(VD, VACC_L); + + vst1q_s16(state->ne,zero); + vst1q_s16(state->co,zero); + + return; +#else + + for (i = 0; i < N; i++) + eq[i] = (VS[i] == VT[i]); + for (i = 0; i < N; i++) + ce[i] = (state->ne[i] & state->co[i]) ^ 1; + for (i = 0; i < N; i++) + eq[i] = eq[i] & ce[i]; + for (i = 0; i < N; i++) + state->clip[i] = 0; + for (i = 0; i < N; i++) + state->comp[i] = (VS[i] > VT[i]); /* greater than */ + for (i = 0; i < N; i++) + state->comp[i] = state->comp[i] | eq[i]; /* ... or equal (commonly) */ + + merge(VACC_L, state->comp, VS, VT); + vector_copy(VD, VACC_L); + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = 0; + return; +#endif +} + +static void VGE(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_ge(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vlt.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vlt.h new file mode 100644 index 000000000..11e4d9742 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vlt.h @@ -0,0 +1,83 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_lt(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t zero = vdupq_n_s16(0); + + int16x8_t vs = vld1q_s16((const int16_t *)VS); + int16x8_t vt = vld1q_s16((const int16_t *)VT); + int16x8_t v_ne = vld1q_s16((const int16_t *)state->ne); + int16x8_t v_co = vld1q_s16((const int16_t *)state->co); + + uint16x8_t v_eq_u = vceqq_s16(vs,vt); + int16x8_t v_cn = vandq_s16(v_ne,v_co); + v_eq_u = vandq_u16(v_eq_u,(uint16x8_t)v_cn); + + vst1q_s16(state->clip, zero); + + uint16x8_t v_comp = vcltq_s16(vs, vt); + int16x8_t v_comp_s = vnegq_s16((int16x8_t)v_comp); + v_comp_s = vorrq_s16(v_comp_s, (int16x8_t)v_eq_u); + + vst1q_s16(state->comp, v_comp_s); + + merge(VACC_L, state->comp, VS, VT); + vector_copy(VD, VACC_L); + + vst1q_s16(state->ne, zero); + vst1q_s16(state->co, zero); + return; + +#else + + ALIGNED short cn[N]; + ALIGNED short eq[N]; + register int i; + + for (i = 0; i < N; i++) + eq[i] = (VS[i] == VT[i]); + for (i = 0; i < N; i++) + cn[i] = state->ne[i] & state->co[i]; + for (i = 0; i < N; i++) + eq[i] = eq[i] & cn[i]; + for (i = 0; i < N; i++) + state->clip[i] = 0; + for (i = 0; i < N; i++) + state->comp[i] = (VS[i] < VT[i]); /* less than */ + for (i = 0; i < N; i++) + state->comp[i] = state->comp[i] | eq[i]; /* ... or equal (uncommonly) */ + + merge(VACC_L, state->comp, VS, VT); + vector_copy(VD, VACC_L); + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = 0; + return; +#endif +} + +static void VLT(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_lt(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacf.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacf.h new file mode 100644 index 000000000..8932996fe --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacf.h @@ -0,0 +1,124 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_macf(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + uint16x8_t vs = vld1q_u16((const uint16_t*)VS); + uint16x8_t vt = vld1q_u16((const uint16_t*)VT); + uint16x4_t v_vaccl_low = vld1_u16((const uint16_t*)VACC_L); + uint16x4_t v_vaccl_high = vld1_u16((const uint16_t*)VACC_L+4); + uint16x4_t v_vaccm_low = vld1_u16((const uint16_t*)VACC_M); + uint16x4_t v_vaccm_high = vld1_u16((const uint16_t*)VACC_M+4); + uint16x4_t v_vacch_low = vld1_u16((const uint16_t*)VACC_H); + uint16x4_t v_vacch_high = vld1_u16((const uint16_t*)VACC_H+4); + int32x4_t zero = vdupq_n_s32(0); + uint32x4_t zero_u = vdupq_n_u32(0); + uint32x4_t highmask = vdupq_n_u32(0x0000ffff); + + uint16x4_t vs_low = vget_low_u16(vs); + uint16x4_t vs_high = vget_high_u16(vs); + uint16x4_t vt_low = vget_low_u16(vt); + uint16x4_t vt_high = vget_high_u16(vt); + + int32x4_t product_L = vqdmlal_s16(zero, (int16x4_t)vs_low, (int16x4_t)vt_low); + int32x4_t product_H = vqdmlal_s16(zero, (int16x4_t)vs_high, (int16x4_t)vt_high); + uint32x4_t addend_L = vandq_u32(highmask, (uint32x4_t)product_L); + uint32x4_t addend_H = vandq_u32(highmask, (uint32x4_t)product_H); + + addend_L = vaddw_u16((uint32x4_t)addend_L, v_vaccl_low); + addend_H = vaddw_u16((uint32x4_t)addend_H, v_vaccl_high); + + uint16x8_t v_vaccl = vcombine_u16(vmovn_u32(addend_L), vmovn_u32(addend_H)); + + + addend_L = vaddl_u16( + vaddhn_u32((uint32x4_t)product_L, zero_u), + vaddhn_u32((uint32x4_t)addend_L, zero_u) + ); + + addend_H = vaddl_u16( + vaddhn_u32((uint32x4_t)product_H, zero_u), + vaddhn_u32((uint32x4_t)addend_H, zero_u) + ); + + addend_L = vaddw_u16(addend_L, v_vaccm_low); + addend_H = vaddw_u16(addend_H, v_vaccm_high); + + uint16x8_t v_vaccm = vcombine_u16(vmovn_u32(addend_L), vmovn_u32(addend_H)); + + //product_L = vshrq_n_s32(product_L, 1); + //product_H = vshrq_n_s32(product_H, 1); + + uint32x4_t cond_L = vcltq_s32(product_L,zero); + int32x4_t cond_L_s = vnegq_s32((int32x4_t)cond_L); + uint32x4_t cond_H = vcltq_s32(product_H,zero); + int32x4_t cond_H_s = vnegq_s32((int32x4_t)cond_H); + + v_vacch_low = vsub_u16(v_vacch_low, vmovn_u32((uint32x4_t)cond_L_s)); + v_vacch_high = vsub_u16(v_vacch_high, vmovn_u32((uint32x4_t)cond_H_s)); + + v_vacch_low = vadd_u16(vshrn_n_u32(addend_L,16), v_vacch_low); + v_vacch_high = vadd_u16(vshrn_n_u32(addend_H,16), v_vacch_high); + + uint16x8_t v_vacch = vcombine_u16(v_vacch_low, v_vacch_high); + + vst1q_s16(VACC_L, (int16x8_t)v_vaccl); + vst1q_s16(VACC_M, (int16x8_t)v_vaccm); + vst1q_s16(VACC_H, (int16x8_t)v_vacch); + + SIGNED_CLAMP_AM(state, VD); + return; + +#else + + ALIGNED int32_t product[N]; + ALIGNED uint32_t addend[N]; + register int i; + + for (i = 0; i < N; i++) + product[i] = VS[i] * VT[i]; + for (i = 0; i < N; i++) + addend[i] = (product[i] << 1) & 0x00000000FFFF; + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_L[i]) + addend[i]; + for (i = 0; i < N; i++) + VACC_L[i] = (short)(addend[i]); + for (i = 0; i < N; i++) + addend[i] = (addend[i] >> 16) + (unsigned short)(product[i] >> 15); + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_M[i]) + addend[i]; + for (i = 0; i < N; i++) + VACC_M[i] = (short)(addend[i]); + for (i = 0; i < N; i++) + VACC_H[i] -= (product[i] < 0); + for (i = 0; i < N; i++) + VACC_H[i] += addend[i] >> 16; + SIGNED_CLAMP_AM(state, VD); + + return; +#endif +} + +static void VMACF(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_macf(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacq.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacq.h new file mode 100644 index 000000000..7c56c7f25 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacq.h @@ -0,0 +1,24 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +static void VMACQ(usf_state_t * state, int vd, int vs, int vt, int e) +{ + (void)state; + vd &= vs &= vt &= e &= 0; /* unused */ + if (vd != vs || vt != e) + return; + message(state, "VMACQ\nUnimplemented.", 3); /* untested, any N64 ROMs use this?? */ + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacu.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacu.h new file mode 100644 index 000000000..90c25bca1 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmacu.h @@ -0,0 +1,124 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_macu(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + uint16x8_t vs = vld1q_u16((const uint16_t*)VS); + uint16x8_t vt = vld1q_u16((const uint16_t*)VT); + uint16x4_t v_vaccl_low = vld1_u16((const uint16_t*)VACC_L); + uint16x4_t v_vaccl_high = vld1_u16((const uint16_t*)VACC_L+4); + uint16x4_t v_vaccm_low = vld1_u16((const uint16_t*)VACC_M); + uint16x4_t v_vaccm_high = vld1_u16((const uint16_t*)VACC_M+4); + uint16x4_t v_vacch_low = vld1_u16((const uint16_t*)VACC_H); + uint16x4_t v_vacch_high = vld1_u16((const uint16_t*)VACC_H+4); + int32x4_t zero = vdupq_n_s32(0); + uint32x4_t zero_u = vdupq_n_u32(0); + uint32x4_t highmask = vdupq_n_u32(0x0000ffff); + + uint16x4_t vs_low = vget_low_u16(vs); + uint16x4_t vs_high = vget_high_u16(vs); + uint16x4_t vt_low = vget_low_u16(vt); + uint16x4_t vt_high = vget_high_u16(vt); + + int32x4_t product_L = vqdmlal_s16(zero, (int16x4_t)vs_low, (int16x4_t)vt_low); + int32x4_t product_H = vqdmlal_s16(zero, (int16x4_t)vs_high, (int16x4_t)vt_high); + uint32x4_t addend_L = vandq_u32(highmask, (uint32x4_t)product_L); + uint32x4_t addend_H = vandq_u32(highmask, (uint32x4_t)product_H); + + addend_L = vaddw_u16((uint32x4_t)addend_L, v_vaccl_low); + addend_H = vaddw_u16((uint32x4_t)addend_H, v_vaccl_high); + + uint16x8_t v_vaccl = vcombine_u16(vmovn_u32(addend_L), vmovn_u32(addend_H)); + + + addend_L = vaddl_u16( + vaddhn_u32((uint32x4_t)product_L, zero_u), + vaddhn_u32((uint32x4_t)addend_L, zero_u) + ); + + addend_H = vaddl_u16( + vaddhn_u32((uint32x4_t)product_H, zero_u), + vaddhn_u32((uint32x4_t)addend_H, zero_u) + ); + + addend_L = vaddw_u16(addend_L, v_vaccm_low); + addend_H = vaddw_u16(addend_H, v_vaccm_high); + + uint16x8_t v_vaccm = vcombine_u16(vmovn_u32(addend_L), vmovn_u32(addend_H)); + + //product_L = vshrq_n_s32(product_L, 1); + //product_H = vshrq_n_s32(product_H, 1); + + uint32x4_t cond_L = vcltq_s32(product_L,zero); + int32x4_t cond_L_s = vnegq_s32((int32x4_t)cond_L); + uint32x4_t cond_H = vcltq_s32(product_H,zero); + int32x4_t cond_H_s = vnegq_s32((int32x4_t)cond_H); + + v_vacch_low = vsub_u16(v_vacch_low, vmovn_u32((uint32x4_t)cond_L_s)); + v_vacch_high = vsub_u16(v_vacch_high, vmovn_u32((uint32x4_t)cond_H_s)); + + v_vacch_low = vadd_u16(vshrn_n_u32(addend_L,16), v_vacch_low); + v_vacch_high = vadd_u16(vshrn_n_u32(addend_H,16), v_vacch_high); + + uint16x8_t v_vacch = vcombine_u16(v_vacch_low, v_vacch_high); + + vst1q_s16(VACC_L, (int16x8_t)v_vaccl); + vst1q_s16(VACC_M, (int16x8_t)v_vaccm); + vst1q_s16(VACC_H, (int16x8_t)v_vacch); + + UNSIGNED_CLAMP(state, VD); + return; + +#else + + + ALIGNED int32_t product[N]; + ALIGNED uint32_t addend[N]; + register int i; + + for (i = 0; i < N; i++) + product[i] = VS[i] * VT[i]; + for (i = 0; i < N; i++) + addend[i] = (product[i] << 1) & 0x00000000FFFF; + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_L[i]) + addend[i]; + for (i = 0; i < N; i++) + VACC_L[i] = (short)(addend[i]); + for (i = 0; i < N; i++) + addend[i] = (addend[i] >> 16) + (unsigned short)(product[i] >> 15); + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_M[i]) + addend[i]; + for (i = 0; i < N; i++) + VACC_M[i] = (short)(addend[i]); + for (i = 0; i < N; i++) + VACC_H[i] -= (product[i] < 0); + for (i = 0; i < N; i++) + VACC_H[i] += addend[i] >> 16; + UNSIGNED_CLAMP(state, VD); + return; +#endif +} + +static void VMACU(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_macu(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadh.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadh.h new file mode 100644 index 000000000..f6e822a7a --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadh.h @@ -0,0 +1,76 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_madh(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs,vt, vaccm, vacch, vacc_h, vacc_m,prod_low,prod_high,one,cond; + uint16x8_t cond_u,res; + + one = vdupq_n_s16(1); + vs = vld1q_s16((const int16_t *)VS); + vt = vld1q_s16((const int16_t *)VT); + vaccm = vld1q_s16((const int16_t *)VACC_M); + vacch = vld1q_s16((const int16_t *)VACC_H); + + prod_low = vmulq_s16(vs,vt); + vacc_m = vaddq_s16(vaccm,prod_low); + + prod_high = vqdmulhq_s16(vs,vt); + prod_high = vshrq_n_s16(prod_high, 1); + + res = vqaddq_u16((uint16x8_t)vaccm, (uint16x8_t)prod_low); + cond_u = vceqq_s16((int16x8_t)res,vacc_m); + cond_u = vaddq_u16(cond_u, (uint16x8_t)one); + + vacc_h = vaddq_s16(prod_high, vacch); + vacc_h = vaddq_s16((int16x8_t)cond_u, vacc_h); + + vst1q_s16(VACC_M, vacc_m); + vst1q_s16(VACC_H, vacc_h); + + SIGNED_CLAMP_AM(state, VD); + return; + +#else + + ALIGNED int32_t product[N]; + ALIGNED uint32_t addend[N]; + register int i; + + for (i = 0; i < N; i++) + product[i] = (signed short)(VS[i]) * (signed short)(VT[i]); + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_M[i]) + (unsigned short)(product[i]); + for (i = 0; i < N; i++) + VACC_M[i] += (short)(VS[i] * VT[i]); + for (i = 0; i < N; i++) + VACC_H[i] += (addend[i] >> 16) + (product[i] >> 16); + SIGNED_CLAMP_AM(state, VD); + return; + +#endif +} + +static void VMADH(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_madh(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadl.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadl.h new file mode 100644 index 000000000..57b2e542f --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadl.h @@ -0,0 +1,100 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_madl(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + uint16x8_t vs = vld1q_u16((const uint16_t*)VS); + uint16x8_t vt = vld1q_u16((const uint16_t*)VT); + uint16x8_t v_vaccl = vld1q_u16((const uint16_t*)VACC_L); + uint16x8_t v_vaccm = vld1q_u16((const uint16_t*)VACC_M); + uint16x8_t v_vacch = vld1q_u16((const uint16_t*)VACC_H); + + uint32x4_t zero = vdupq_n_u32(0); + uint16x4_t vs_low = vget_low_u16(vs); + uint16x4_t vs_high = vget_high_u16(vs); + uint16x4_t vt_low = vget_low_u16(vt); + uint16x4_t vt_high = vget_high_u16(vt); + + uint32x4_t product_L = vmulq_u32( vmovl_u16(vs_low), vmovl_u16(vt_low) ); + uint32x4_t product_H = vmulq_u32( vmovl_u16(vs_high), vmovl_u16(vt_high) ); + + uint16x4_t addend_L = vaddhn_u32(product_L, zero); + uint16x4_t addend_H = vaddhn_u32(product_H, zero); + + uint32x4_t exceed1 = vaddl_u16(addend_L, vget_low_u16(v_vaccl)); + uint32x4_t exceed2 = vaddl_u16(addend_H, vget_high_u16(v_vaccl)); + + v_vaccl = vcombine_u16(vmovn_u32(exceed1), vmovn_u32(exceed2)); + + addend_L = vaddhn_u32(exceed1, zero); + addend_H = vaddhn_u32(exceed2, zero); + + exceed1 = vaddl_u16(addend_L, vget_low_u16(v_vaccm)); + exceed2 = vaddl_u16(addend_H, vget_high_u16(v_vaccm)); + + v_vaccm = vcombine_u16(vmovn_u32(exceed1), vmovn_u32(exceed2)); + + addend_L = vaddhn_u32(exceed1, zero); + addend_H = vaddhn_u32(exceed2, zero); + + uint16x8_t v_vacch2 = vcombine_u16(addend_L, addend_H); + v_vacch = vaddq_u16(v_vacch, v_vacch2); + + vst1q_s16(VACC_L, (int16x8_t)v_vaccl); + vst1q_s16(VACC_M, (int16x8_t)v_vaccm); + vst1q_s16(VACC_H, (int16x8_t)v_vacch); + + SIGNED_CLAMP_AL(state, VD); + return; + +#else + + + ALIGNED int32_t product[N]; + ALIGNED uint32_t addend[N]; + register int i; + + for (i = 0; i < N; i++) + product[i] = (unsigned short)(VS[i]) * (unsigned short)(VT[i]); + for (i = 0; i < N; i++) + addend[i] = (product[i] & 0x0000FFFF0000) >> 16; + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_L[i]) + addend[i]; + for (i = 0; i < N; i++) + VACC_L[i] = (short)(addend[i]); + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(addend[i] >> 16); + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_M[i]) + addend[i]; + for (i = 0; i < N; i++) + VACC_M[i] = (short)(addend[i]); + for (i = 0; i < N; i++) + VACC_H[i] += addend[i] >> 16; + SIGNED_CLAMP_AL(state, VD); + return; +#endif +} + +static void VMADL(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_madl(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadm.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadm.h new file mode 100644 index 000000000..15eb4ce39 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadm.h @@ -0,0 +1,82 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_madm(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + uint32x4_t zero = vdupq_n_u32(0); + int16x4_t vs_low = vld1_s16((const int16_t*)VS); + int16x4_t vs_high = vld1_s16((const int16_t*)VS+4); + uint16x4_t vt_low = vld1_u16((const uint16_t*)VT); + uint16x4_t vt_high = vld1_u16((const uint16_t*)VT+4); + uint16x4_t vaccl_low = vld1_u16((const uint16_t*)VACC_L); + uint16x4_t vaccl_high = vld1_u16((const uint16_t*)VACC_L+4); + uint16x4_t vaccm_low = vld1_u16((const uint16_t*)VACC_M); + uint16x4_t vaccm_high = vld1_u16((const uint16_t*)VACC_M+4); + int16x4_t vacch_low = vld1_s16((const int16_t*)VACC_H); + int16x4_t vacch_high = vld1_s16((const int16_t*)VACC_H+4); + + int32x4_t vaccl_l = vmlaq_s32((int32x4_t)vmovl_u16(vaccl_low),vmovl_s16(vs_low),(int32x4_t)vmovl_u16(vt_low)); + int32x4_t vaccl_h = vmlaq_s32((int32x4_t)vmovl_u16(vaccl_high),vmovl_s16(vs_high),(int32x4_t)vmovl_u16(vt_high)); + uint32x4_t vaccm_l = vaddq_u32(vmovl_u16(vaccm_low), (uint32x4_t)vshrq_n_s32(vaccl_l,16)); + uint32x4_t vaccm_h = vaddq_u32(vmovl_u16(vaccm_high),(uint32x4_t)vshrq_n_s32(vaccl_h,16)); + uint16x4_t vacch_l = vaddhn_u32(vaccm_l, zero); + uint16x4_t vacch_h = vaddhn_u32(vaccm_h, zero); + int16x4_t vacch_low2 = vadd_s16(vacch_low,(int16x4_t)vacch_l); + int16x4_t vacch_high2 = vadd_s16(vacch_high,(int16x4_t)vacch_h); + + int16x8_t vaccl = vcombine_s16(vmovn_s32(vaccl_l),vmovn_s32(vaccl_h)); + uint16x8_t vaccm = vcombine_u16(vmovn_u32(vaccm_l),vmovn_u32(vaccm_h)); + int16x8_t vacch = vcombine_s16(vacch_low2,vacch_high2); + + vst1q_s16(VACC_L, vaccl); + vst1q_s16(VACC_M, (int16x8_t)vaccm); + vst1q_s16(VACC_H, vacch); + SIGNED_CLAMP_AM(state, VD); + + return; +#else + + + ALIGNED uint32_t addend[N]; + register int i; + + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_L[i]) + (unsigned short)(VS[i]*VT[i]); + for (i = 0; i < N; i++) + VACC_L[i] += (short)(VS[i] * VT[i]); + for (i = 0; i < N; i++) + addend[i] = (addend[i] >> 16) + (VS[i]*(unsigned short)(VT[i]) >> 16); + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_M[i]) + addend[i]; + for (i = 0; i < N; i++) + VACC_M[i] = (short)addend[i]; + for (i = 0; i < N; i++) + VACC_H[i] += addend[i] >> 16; + SIGNED_CLAMP_AM(state, VD); + return; +#endif +} + +static void VMADM(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_madm(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadn.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadn.h new file mode 100644 index 000000000..329a5c1c1 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmadn.h @@ -0,0 +1,82 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_madn(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + uint32x4_t zero = vdupq_n_u32(0); + uint16x4_t vs_low = vld1_u16((const uint16_t*)VS); + uint16x4_t vs_high = vld1_u16((const uint16_t*)VS+4); + int16x4_t vt_low = vld1_s16((const int16_t*)VT); + int16x4_t vt_high = vld1_s16((const int16_t*)VT+4); + uint16x4_t vaccl_low = vld1_u16((const uint16_t*)VACC_L); + uint16x4_t vaccl_high = vld1_u16((const uint16_t*)VACC_L+4); + uint16x4_t vaccm_low = vld1_u16((const uint16_t*)VACC_M); + uint16x4_t vaccm_high = vld1_u16((const uint16_t*)VACC_M+4); + int16x4_t vacch_low = vld1_s16((const int16_t*)VACC_H); + int16x4_t vacch_high = vld1_s16((const int16_t*)VACC_H+4); + + int32x4_t vaccl_l = vmlaq_s32((int32x4_t)vmovl_u16(vaccl_low),(int32x4_t)vmovl_u16(vs_low),vmovl_s16(vt_low)); + int32x4_t vaccl_h = vmlaq_s32((int32x4_t)vmovl_u16(vaccl_high),(int32x4_t)vmovl_u16(vs_high),vmovl_s16(vt_high)); + uint32x4_t vaccm_l = vaddq_u32(vmovl_u16(vaccm_low), (uint32x4_t)vshrq_n_s32(vaccl_l,16)); + uint32x4_t vaccm_h = vaddq_u32(vmovl_u16(vaccm_high),(uint32x4_t)vshrq_n_s32(vaccl_h,16)); + uint16x4_t vacch_l = vaddhn_u32(vaccm_l, zero); + uint16x4_t vacch_h = vaddhn_u32(vaccm_h, zero); + int16x4_t vacch_low2 = vadd_s16(vacch_low,(int16x4_t)vacch_l); + int16x4_t vacch_high2 = vadd_s16(vacch_high,(int16x4_t)vacch_h); + + int16x8_t vaccl = vcombine_s16(vmovn_s32(vaccl_l),vmovn_s32(vaccl_h)); + uint16x8_t vaccm = vcombine_u16(vmovn_u32(vaccm_l),vmovn_u32(vaccm_h)); + int16x8_t vacch = vcombine_s16(vacch_low2,vacch_high2); + + vst1q_s16(VACC_L, vaccl); + vst1q_s16(VACC_M, (int16x8_t)vaccm); + vst1q_s16(VACC_H, vacch); + SIGNED_CLAMP_AL(state, VD); + return; + +#else + + + ALIGNED uint32_t addend[N]; + register int i; + + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_L[i]) + (unsigned short)(VS[i]*VT[i]); + for (i = 0; i < N; i++) + VACC_L[i] += (short)(VS[i] * VT[i]); + for (i = 0; i < N; i++) + addend[i] = (addend[i] >> 16) + ((unsigned short)(VS[i])*VT[i] >> 16); + for (i = 0; i < N; i++) + addend[i] = (unsigned short)(VACC_M[i]) + addend[i]; + for (i = 0; i < N; i++) + VACC_M[i] = (short)addend[i]; + for (i = 0; i < N; i++) + VACC_H[i] += addend[i] >> 16; + SIGNED_CLAMP_AL(state, VD); + return; +#endif +} + +static void VMADN(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_madn(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmov.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmov.h new file mode 100644 index 000000000..cadb5f9af --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmov.h @@ -0,0 +1,21 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +static void VMOV(usf_state_t * state, int vd, int de, int vt, int e) +{ + SHUFFLE_VECTOR(VACC_L, state->VR[vt], e); + state->VR[vd][de &= 07] = VACC_L[e & 07]; + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmrg.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmrg.h new file mode 100644 index 000000000..ba9395409 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmrg.h @@ -0,0 +1,30 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_mrg(usf_state_t * state, short* VD, short* VS, short* VT) +{ + merge(VACC_L, state->comp, VS, VT); + vector_copy(VD, VACC_L); + return; +} + +static void VMRG(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_mrg(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudh.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudh.h new file mode 100644 index 000000000..ddd9b93ad --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudh.h @@ -0,0 +1,69 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_mudh(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t zero16 = vdupq_n_s16(0); + int32x4_t zero32 = vdupq_n_s32(0); + + int16x4_t vs_low = vld1_s16((const int16_t *)VS); + int16x4_t vs_high = vld1_s16((const int16_t *)VS+4); + int16x4_t vt_low = vld1_s16((const int16_t *)VT); + int16x4_t vt_high = vld1_s16((const int16_t *)VT+4); + + int32x4_t l1 = vmovl_s16(vs_low); + int32x4_t h1 = vmovl_s16(vs_high); + int32x4_t l2 = vmovl_s16(vt_low); + int32x4_t h2 = vmovl_s16(vt_high); + + int32x4_t l = vmulq_s32(l1,l2); + int32x4_t h = vmulq_s32(h1,h2); + + int16x8_t vaccm = vcombine_s16(vmovn_s32(l),vmovn_s32(h)); + int16x8_t vacch = vcombine_s16(vaddhn_s32(l,zero32),vaddhn_s32(h,zero32)); + + vst1q_s16(VACC_L, zero16); + vst1q_s16(VACC_M, vaccm); + vst1q_s16(VACC_H, vacch); + + SIGNED_CLAMP_AM(state, VD); + return; + +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = 0x0000; + for (i = 0; i < N; i++) + VACC_M[i] = (short)(VS[i]*VT[i] >> 0); + for (i = 0; i < N; i++) + VACC_H[i] = (short)(VS[i]*VT[i] >> 16); + SIGNED_CLAMP_AM(state, VD); + return; +#endif +} + +static void VMUDH(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_mudh(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudl.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudl.h new file mode 100644 index 000000000..e2a6d8501 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudl.h @@ -0,0 +1,58 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_mudl(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + uint16x4_t vs_low = vld1_u16((const uint16_t*)VS); + uint16x4_t vs_high = vld1_u16((const uint16_t*)VS+4); + uint16x4_t vt_low = vld1_u16((const uint16_t*)VT); + uint16x4_t vt_high = vld1_u16((const uint16_t*)VT+4); + int16x8_t zero = vdupq_n_s16(0); + + uint32x4_t lo = vmull_u16(vs_low, vt_low); + uint32x4_t high = vmull_u16(vs_high, vt_high); + uint16x8_t result = vcombine_u16(vshrn_n_u32(lo,16),vshrn_n_u32(high,16)); + vst1q_u16(VACC_L, result); + vst1q_s16(VACC_M, zero); + vst1q_s16(VACC_H, zero); + vector_copy(VD, VACC_L); + return; + +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = (unsigned short)(VS[i])*(unsigned short)(VT[i]) >> 16; + for (i = 0; i < N; i++) + VACC_M[i] = 0x0000; + for (i = 0; i < N; i++) + VACC_H[i] = 0x0000; + vector_copy(VD, VACC_L); /* no possibilities to clamp */ + return; +#endif +} + +static void VMUDL(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_mudl(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudm.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudm.h new file mode 100644 index 000000000..6eda2581c --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudm.h @@ -0,0 +1,71 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_mudm(usf_state_t * state, short* VD, short* VS, short* VT) +{ +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vd, vs,vt,res,four,vacc_l, vacc_m, vacc_h; + + int32x4_t zero = vdupq_n_s32(0); + int16x8_t zero16 = vdupq_n_s16(0); + + int16x4_t vs_low = vld1_s16((const uint16_t *)VS); + int16x4_t vs_high = vld1_s16((const uint16_t *)VS+4); + uint16x4_t vt_low = vld1_u16((const int16_t *)VT); + uint16x4_t vt_high = vld1_u16((const int16_t *)VT+4); + + int32x4_t l1 = vmovl_s16(vs_low); + int32x4_t h1 = vmovl_s16(vs_high); + uint32x4_t l2 = vmovl_u16(vt_low); + uint32x4_t h2 = vmovl_u16(vt_high); + + int32x4_t l = vmulq_s32(l1,(int32x4_t)l2); + int32x4_t h = vmulq_s32(h1,(int32x4_t)h2); + + int16x8_t vaccl = vcombine_s16(vmovn_s32(l),vmovn_s32(h)); + int16x8_t vaccm = vcombine_s16(vaddhn_s32(l,zero),vaddhn_s32(h,zero)); + uint16x8_t uvacch = vcltq_s16(vaccm, zero16); + + vst1q_s16(VACC_L, vaccl); + vst1q_s16(VACC_M, vaccm); + vst1q_s16(VACC_H, (int16x8_t)uvacch); + + vector_copy(VD, VACC_M); /* no possibilities to clamp */ + + return; +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = (VS[i]*(unsigned short)(VT[i]) & 0x00000000FFFF) >> 0; + for (i = 0; i < N; i++) + VACC_M[i] = (VS[i]*(unsigned short)(VT[i]) & 0x0000FFFF0000) >> 16; + for (i = 0; i < N; i++) + VACC_H[i] = -(VACC_M[i] < 0); + vector_copy(VD, VACC_M); /* no possibilities to clamp */ + return; +#endif +} + +static void VMUDM(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_mudm(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudn.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudn.h new file mode 100644 index 000000000..8b9edce23 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmudn.h @@ -0,0 +1,72 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.10.11 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_mudn(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vd, vs,vt,res,four,vacc_l, vacc_m, vacc_h; + + int32x4_t zero = vdupq_n_s32(0); + int16x8_t zero16 = vdupq_n_s16(0); + + uint16x4_t vs_low = vld1_u16((const uint16_t *)VS); + uint16x4_t vs_high = vld1_u16((const uint16_t *)VS+4); + int16x4_t vt_low = vld1_s16((const int16_t *)VT); + int16x4_t vt_high = vld1_s16((const int16_t *)VT+4); + + uint32x4_t l1 = vmovl_u16(vs_low); + uint32x4_t h1 = vmovl_u16(vs_high); + int32x4_t l2 = vmovl_s16(vt_low); + int32x4_t h2 = vmovl_s16(vt_high); + + int32x4_t l = vmulq_s32((int32x4_t)l1,l2); + int32x4_t h = vmulq_s32((int32x4_t)h1,h2); + + int16x8_t vaccl = vcombine_s16(vmovn_s32(l),vmovn_s32(h)); + int16x8_t vaccm = vcombine_s16(vaddhn_s32(l,zero),vaddhn_s32(h,zero)); + uint16x8_t uvacch = vcltq_s16(vaccm, zero16); + vst1q_s16(VACC_L, vaccl); + vst1q_s16(VACC_M, vaccm); + vst1q_s16(VACC_H, (int16x8_t)uvacch); + + vector_copy(VD, VACC_L); /* no possibilities to clamp */ + + return; + +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = ((unsigned short)(VS[i])*VT[i] & 0x00000000FFFF) >> 0; + for (i = 0; i < N; i++) + VACC_M[i] = ((unsigned short)(VS[i])*VT[i] & 0x0000FFFF0000) >> 16; + for (i = 0; i < N; i++) + VACC_H[i] = -(VACC_M[i] < 0); + vector_copy(VD, VACC_L); /* no possibilities to clamp */ + return; +#endif +} + +static void VMUDN(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_mudn(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmulf.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmulf.h new file mode 100644 index 000000000..f6c522bdb --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmulf.h @@ -0,0 +1,89 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +#ifndef SEMIFRAC +/* + * acc = VS * VT; + * acc = acc + 0x8000; // rounding value + * acc = acc << 1; // partial value shifting + * + * Wrong: ACC(HI) = -((INT32)(acc) < 0) + * Right: ACC(HI) = -(SEMIFRAC < 0) + */ + +#define SEMIFRAC (VS[i]*VT[i] + 0x4000) +#endif + +INLINE static void do_mulf(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs,vt,res,four,zero,vacc_l, vacc_m, vacc_h; + uint16x8_t cond_u, vacc_m_cond_u,one; + + one = vdupq_n_u16(1); + four = vdupq_n_s16(0x4000); + zero = vdupq_n_s16(0); + + vs = vld1q_s16((const int16_t *)VS); + vt = vld1q_s16((const int16_t *)VT); + + vacc_m = vqrdmulhq_s16(vs, vt); + vacc_l = vmlaq_s16(four, vs,vt); + vacc_l = vshlq_n_s16(vacc_l,1); + + cond_u = vceqq_s16(vs,vt); + cond_u = vaddq_u16(cond_u, one); + vacc_m_cond_u = vcltq_s16(vacc_m, zero); + cond_u = vandq_u16(vacc_m_cond_u, cond_u); + vacc_h = vqnegq_s16((int16x8_t)cond_u); + + vst1q_s16(VACC_L,vacc_l); + vst1q_s16(VACC_M,vacc_m); + vst1q_s16(VACC_H,vacc_h); + + SIGNED_CLAMP_AM(state, VD); + return; + +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = (SEMIFRAC << 1) >> 0; + for (i = 0; i < N; i++) + VACC_M[i] = (SEMIFRAC << 1) >> 16; + for (i = 0; i < N; i++) + VACC_H[i] = -((VACC_M[i] < 0) & (VS[i] != VT[i])); /* -32768 * -32768 */ +#if !defined ARCH_MIN_SSE2 + vector_copy(VD, VACC_M); + for (i = 0; i < N; i++) + VD[i] -= (VACC_M[i] < 0) & (VS[i] == VT[i]); /* ACC b 31 set, min*min */ +#else + SIGNED_CLAMP_AM(state, VD); +#endif + return; +#endif +} + +static void VMULF(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_mulf(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmulu.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmulu.h new file mode 100644 index 000000000..a83f0b812 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vmulu.h @@ -0,0 +1,97 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +#ifndef SEMIFRAC +/* + * acc = VS * VT; + * acc = acc + 0x8000; // rounding value + * acc = acc << 1; // partial value shifting + * + * Wrong: ACC(HI) = -((INT32)(acc) < 0) + * Right: ACC(HI) = -(SEMIFRAC < 0) + */ +#define SEMIFRAC (VS[i]*VT[i]*2/2 + 0x4000) +#endif + +INLINE static void do_mulu(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vd, vs,vt,res,four,zero,vacc_l, vacc_m, vacc_h; + uint16x8_t cond_u, vacc_m_cond_u,one; + + one = vdupq_n_u16(1); + four = vdupq_n_s16(0x4000); + zero = vdupq_n_s16(0); + + vs = vld1q_s16((const int16_t *)VS); + vt = vld1q_s16((const int16_t *)VT); + + + vacc_m = vqrdmulhq_s16(vs, vt); + vacc_l = vmlaq_s16(four, vs,vt); + vacc_l = vshlq_n_s16(vacc_l,1); + + cond_u = vceqq_s16(vs,vt); + cond_u = vaddq_u16(cond_u, one); + vacc_m_cond_u = vcltq_s16(vacc_m, zero); + cond_u = vandq_u16(vacc_m_cond_u, cond_u); + vacc_h = vqnegq_s16((int16x8_t)cond_u); + + vst1q_s16(VACC_L,vacc_l); + vst1q_s16(VACC_M,vacc_m); + vst1q_s16(VACC_H,vacc_h); + + + vd = vacc_m; + + uint16x8_t vacc_m_u = vshrq_n_u16((uint16x8_t)vacc_m, 15); + vd = vorrq_s16(vd, (int16x8_t)vacc_m_u); + vd = vbicq_s16(vd, vacc_h); + vst1q_s16(VD, vd); + return; + +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = (SEMIFRAC << 1) >> 0; + for (i = 0; i < N; i++) + VACC_M[i] = (SEMIFRAC << 1) >> 16; + for (i = 0; i < N; i++) + VACC_H[i] = -((VACC_M[i] < 0) & (VS[i] != VT[i])); /* -32768 * -32768 */ +#if (0) + UNSIGNED_CLAMP(state, VD); +#else + vector_copy(VD, VACC_M); + for (i = 0; i < N; i++) + VD[i] |= (VACC_M[i] >> 15); /* VD |= -(result == 0x000080008000) */ + for (i = 0; i < N; i++) + VD[i] &= ~(VACC_H[i] >> 0); /* VD &= -(result >= 0x000000000000) */ +#endif + return; +#endif +} + +static void VMULU(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_mulu(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnand.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnand.h new file mode 100644 index 000000000..83a33ea72 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnand.h @@ -0,0 +1,46 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE void do_nand(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + int16x8_t vs, vt,vaccl; + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + vaccl = vandq_s16(vs,vt); + vaccl = vmvnq_s16(vaccl); + vst1q_s16(VACC_L, vaccl); + vector_copy(VD, VACC_L); + return; + +#else + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = ~(VS[i] & VT[i]); + vector_copy(VD, VACC_L); + return; +#endif +} + +static void VNAND(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_nand(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vne.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vne.h new file mode 100644 index 000000000..c24b9a199 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vne.h @@ -0,0 +1,75 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void do_ne(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs, vt,vaccl, ne; + int16x8_t zero = vdupq_n_s16(0); + uint16x8_t cond; + + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + ne = vld1q_s16((const int16_t*)state->ne); + + cond = vceqq_s16(vs,vt); + cond = vmvnq_u16(cond); // this is needed if you need to do "not-equal" + cond = (uint16x8_t)vnegq_s16((int16x8_t)cond); + uint16x8_t comp = vorrq_u16(cond, (uint16x8_t)ne); + + vst1q_s16(state->clip, zero); + vst1q_s16(state->comp, (int16x8_t)cond); + + vector_copy(VACC_L, VS); + vector_copy(VD, VACC_L); + vst1q_s16(state->ne, zero); + vst1q_s16(state->co, zero); + + return; +#else + + register int i; + + for (i = 0; i < N; i++) + state->clip[i] = 0; + for (i = 0; i < N; i++) + state->comp[i] = (VS[i] != VT[i]); + for (i = 0; i < N; i++) + state->comp[i] = state->comp[i] | state->ne[i]; +#if (0) + merge(VACC_L, state->comp, VS, VT); /* correct but redundant */ +#else + vector_copy(VACC_L, VS); +#endif + vector_copy(VD, VACC_L); + + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = 0; + return; +#endif +} + +static void VNE(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_ne(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnop.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnop.h new file mode 100644 index 000000000..92227ee84 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnop.h @@ -0,0 +1,25 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +static void VNOP(usf_state_t * state, int vd, int vs, int vt, int e) +{ + const int WB_inhibit = vd = vs = vt = e = 1; + + (void)state; + + if (WB_inhibit) + return; /* message(state, "VNOP", WB_inhibit); */ + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnor.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnor.h new file mode 100644 index 000000000..0de3c56fa --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnor.h @@ -0,0 +1,46 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE void do_nor(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + int16x8_t vs, vt, vaccl; + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + vaccl = vorrq_s16(vs,vt); + vaccl = vmvnq_s16(vaccl); + + vst1q_s16(VACC_L, vaccl); + return; +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = ~(VS[i] | VT[i]); + vector_copy(VD, VACC_L); + return; +#endif +} + +static void VNOR(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_nor(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnxor.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnxor.h new file mode 100644 index 000000000..54b6a8457 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vnxor.h @@ -0,0 +1,48 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE void do_nxor(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs, vt,vaccl; + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + vaccl = veorq_s16(vs,vt); + vaccl = vmvnq_s16(vaccl); + + vst1q_s16(VACC_L, vaccl); + vector_copy(VD, VACC_L); + return; +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = ~(VS[i] ^ VT[i]); + vector_copy(VD, VACC_L); + return; +#endif +} + +static void VNXOR(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_nxor(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vor.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vor.h new file mode 100644 index 000000000..b93f8098c --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vor.h @@ -0,0 +1,47 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE void do_or(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs, vt,vaccl; + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + vaccl = vorrq_s16(vs,vt); + vst1q_s16(VACC_L, vaccl); + vector_copy(VD, VACC_L); + return; + +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = VS[i] | VT[i]; + vector_copy(VD, VACC_L); + return; +#endif +} + +static void VOR(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_or(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcp.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcp.h new file mode 100644 index 000000000..a34be6010 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcp.h @@ -0,0 +1,25 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" +#include "divrom.h" + +static void VRCP(usf_state_t * state, int vd, int de, int vt, int e) +{ + state->DivIn = (int)state->VR[vt][e & 07]; + do_div(state, state->DivIn, SP_DIV_SQRT_NO, SP_DIV_PRECISION_SINGLE); + SHUFFLE_VECTOR(VACC_L, state->VR[vt], e); + state->VR[vd][de &= 07] = (short)state->DivOut; + state->DPH = SP_DIV_PRECISION_SINGLE; + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcph.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcph.h new file mode 100644 index 000000000..0d18906ba --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcph.h @@ -0,0 +1,24 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" +#include "divrom.h" + +static void VRCPH(usf_state_t * state, int vd, int de, int vt, int e) +{ + state->DivIn = state->VR[vt][e & 07] << 16; + SHUFFLE_VECTOR(VACC_L, state->VR[vt], e); + state->VR[vd][de &= 07] = state->DivOut >> 16; + state->DPH = SP_DIV_PRECISION_DOUBLE; + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcpl.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcpl.h new file mode 100644 index 000000000..b2a987e2f --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrcpl.h @@ -0,0 +1,26 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" +#include "divrom.h" + +static void VRCPL(usf_state_t * state, int vd, int de, int vt, int e) +{ + state->DivIn &= -state->DPH; + state->DivIn |= (unsigned short)state->VR[vt][e & 07]; + do_div(state, state->DivIn, SP_DIV_SQRT_NO, state->DPH); + SHUFFLE_VECTOR(VACC_L, state->VR[vt], e); + state->VR[vd][de &= 07] = (short)state->DivOut; + state->DPH = SP_DIV_PRECISION_SINGLE; + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsq.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsq.h new file mode 100644 index 000000000..e033c7a3d --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsq.h @@ -0,0 +1,26 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" +#include "divrom.h" + +static void VRSQ(usf_state_t * state, int vd, int de, int vt, int e) +{ + message(state, "VRSQ\nUntested.", 1); + state->DivIn = (int)state->VR[vt][e & 07]; + do_div(state, state->DivIn, SP_DIV_SQRT_YES, SP_DIV_PRECISION_SINGLE); + SHUFFLE_VECTOR(VACC_L, state->VR[vt], e); + state->VR[vd][de &= 07] = (short)state->DivOut; + state->DPH = SP_DIV_PRECISION_SINGLE; + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsqh.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsqh.h new file mode 100644 index 000000000..663ab5015 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsqh.h @@ -0,0 +1,24 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" +#include "divrom.h" + +static void VRSQH(usf_state_t * state, int vd, int de, int vt, int e) +{ + state->DivIn = state->VR[vt][e & 07] << 16; + SHUFFLE_VECTOR(VACC_L, state->VR[vt], e); + state->VR[vd][de &= 07] = state->DivOut >> 16; + state->DPH = SP_DIV_PRECISION_DOUBLE; + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsql.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsql.h new file mode 100644 index 000000000..69a21d8f0 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vrsql.h @@ -0,0 +1,26 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" +#include "divrom.h" + +static void VRSQL(usf_state_t * state, int vd, int de, int vt, int e) +{ + state->DivIn &= -state->DPH; + state->DivIn |= (unsigned short)state->VR[vt][e & 07]; + do_div(state, state->DivIn, SP_DIV_SQRT_YES, state->DPH); + SHUFFLE_VECTOR(VACC_L, state->VR[vt], e); + state->VR[vd][de &= 07] = (short)state->DivOut; + state->DPH = SP_DIV_PRECISION_SINGLE; + return; +} diff --git a/Frameworks/lazyusf/lazyusf/rsp_lle/vu/vsaw.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsaw.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/rsp_lle/vu/vsaw.h rename to Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsaw.h diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsub.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsub.h new file mode 100644 index 000000000..d92f61952 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsub.h @@ -0,0 +1,57 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void clr_bi(usf_state_t * state, short* VD, short* VS, short* VT) +{ /* clear CARRY and borrow in to accumulators */ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs, vt, zero, co; + zero = vdupq_n_s16(0); + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + co = vld1q_s16((const int16_t*)state->co); + + vs = vsubq_s16(vs,vt); + vs = vsubq_s16(vs,co); + vst1q_s16(VACC_L, vs); + + SIGNED_CLAMP_SUB(state, VD, VS, VT); + vst1q_s16(state->ne, zero); + vst1q_s16(state->co, zero); + return; +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = VS[i] - VT[i] - state->co[i]; + SIGNED_CLAMP_SUB(state, VD, VS, VT); + for (i = 0; i < N; i++) + state->ne[i] = 0; + for (i = 0; i < N; i++) + state->co[i] = 0; + return; +#endif +} + +static void VSUB(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + clr_bi(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsubc.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsubc.h new file mode 100644 index 000000000..7d46758ca --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vsubc.h @@ -0,0 +1,71 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE static void set_bo(usf_state_t * state, short* VD, short* VS, short* VT) +{ /* set CARRY and borrow out from difference */ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs, vt,vaccl,ne, co2; + uint16x8_t cond; + + int16x8_t zero = vdupq_n_s16(0); + int16x8_t one = vdupq_n_s16(1); + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + + vaccl = vsubq_s16(vs, vt); + uint16x8_t vdif = vqsubq_u16((uint16x8_t)vs, (uint16x8_t)vt); + + vst1q_s16(VACC_L, vaccl); + vector_copy(VD, VACC_L); + + cond = vceqq_s16(vs, vt); + ne = vaddq_s16((int16x8_t)cond, one); + + vdif = vorrq_u16(vdif,cond); + cond = vceqq_u16(vdif, (uint16x8_t)zero); + co2 = vnegq_s16((int16x8_t)cond); + + vst1q_s16(state->ne, ne); + vst1q_s16(state->co, co2); + return; + +#else + + ALIGNED int32_t dif[N]; + register int i; + + for (i = 0; i < N; i++) + dif[i] = (unsigned short)(VS[i]) - (unsigned short)(VT[i]); + for (i = 0; i < N; i++) + VACC_L[i] = VS[i] - VT[i]; + vector_copy(VD, VACC_L); + for (i = 0; i < N; i++) + state->ne[i] = (VS[i] != VT[i]); + for (i = 0; i < N; i++) + state->co[i] = (dif[i] < 0); + return; +#endif +} + +static void VSUBC(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + set_bo(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vu.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vu.h new file mode 100644 index 000000000..b7c282d52 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vu.h @@ -0,0 +1,129 @@ +/******************************************************************************\ +* Project: MSP Emulation Layer for Vector Unit Computational Operations * +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#ifndef _VU_H +#define _VU_H + +#define N 8 +/* N: number of processor elements in SIMD processor */ + +/* + * RSP virtual registers (of vector unit) + * The most important are the 32 general-purpose vector registers. + * The correct way to accurately store these is using big-endian vectors. + * + * For ?WC2 we may need to do byte-precision access just as directly. + * This is amended by using the `VU_S` and `VU_B` macros defined in `rsp.h`. + */ + +/* + * accumulator-indexing macros (inverted access dimensions, suited for SSE) + */ +#define HI 00 +#define MD 01 +#define LO 02 + +#define VACC_L (state->VACC[LO]) +#define VACC_M (state->VACC[MD]) +#define VACC_H (state->VACC[HI]) + +#define ACC_L(i) (VACC_L[i]) +#define ACC_M(i) (VACC_M[i]) +#define ACC_H(i) (VACC_H[i]) + +#include "shuffle.h" +#include "clamp.h" +#include "cf.h" + +static void res_V(usf_state_t * state, int vd, int vs, int vt, int e) +{ + register int i; + + vs = vt = e = 0; + if (vs != vt || vt != e) + return; + message(state, "C2\nRESERVED", 2); /* uncertain how to handle reserved, untested */ + +#ifdef ARCH_MIN_ARM_NEON + int16x8_t zero = vdupq_n_s16(0); + vst1q_s16(state->VR[vd], zero); + return; +#else + + + for (i = 0; i < N; i++) + state->VR[vd][i] = 0x0000; /* override behavior (bpoint) */ + return; +#endif +} +static void res_M(usf_state_t * state, int vd, int vs, int vt, int e) +{ + message(state, "VMUL IQ", 2); + res_V(state, vd, vs, vt, e); + return; /* Ultra64 OS did have these, so one could implement this ext. */ +} + +#include "vabs.h" +#include "vadd.h" +#include "vaddc.h" +#include "vand.h" +#include "vch.h" +#include "vcl.h" +#include "vcr.h" +#include "veq.h" +#include "vge.h" +#include "vlt.h" +#include "vmacf.h" +#include "vmacq.h" +#include "vmacu.h" +#include "vmadh.h" +#include "vmadl.h" +#include "vmadm.h" +#include "vmadn.h" +#include "vmov.h" +#include "vmrg.h" +#include "vmudh.h" +#include "vmudl.h" +#include "vmudm.h" +#include "vmudn.h" +#include "vmulf.h" +#include "vmulu.h" +#include "vnand.h" +#include "vne.h" +#include "vnop.h" +#include "vnor.h" +#include "vnxor.h" +#include "vor.h" +#include "vrcp.h" +#include "vrcph.h" +#include "vrcpl.h" +#include "vrsq.h" +#include "vrsqh.h" +#include "vrsql.h" +#include "vsaw.h" +#include "vsub.h" +#include "vsubc.h" +#include "vxor.h" + +static void (*COP2_C2[64])(usf_state_t *, int, int, int, int) = { + VMULF ,VMULU ,res_M ,res_M ,VMUDL ,VMUDM ,VMUDN ,VMUDH , /* 000 */ + VMACF ,VMACU ,res_M ,VMACQ ,VMADL ,VMADM ,VMADN ,VMADH , /* 001 */ + VADD ,VSUB ,res_V ,VABS ,VADDC ,VSUBC ,res_V ,res_V , /* 010 */ + res_V ,res_V ,res_V ,res_V ,res_V ,VSAW ,res_V ,res_V , /* 011 */ + VLT ,VEQ ,VNE ,VGE ,VCL ,VCH ,VCR ,VMRG , /* 100 */ + VAND ,VNAND ,VOR ,VNOR ,VXOR ,VNXOR ,res_V ,res_V , /* 101 */ + VRCP ,VRCPL ,VRCPH ,VMOV ,VRSQ ,VRSQL ,VRSQH ,VNOP , /* 110 */ + res_V ,res_V ,res_V ,res_V ,res_V ,res_V ,res_V ,res_V , /* 111 */ +}; /* 000 001 010 011 100 101 110 111 */ +#endif diff --git a/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vxor.h b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vxor.h new file mode 100644 index 000000000..a7a9b56b9 --- /dev/null +++ b/Frameworks/lazyusf2/lazyusf2/rsp_lle/vu/vxor.h @@ -0,0 +1,47 @@ +/******************************************************************************\ +* Authors: Iconoclast * +* Release: 2013.11.26 * +* License: CC0 Public Domain Dedication * +* * +* To the extent possible under law, the author(s) have dedicated all copyright * +* and related and neighboring rights to this software to the public domain * +* worldwide. This software is distributed without any warranty. * +* * +* You should have received a copy of the CC0 Public Domain Dedication along * +* with this software. * +* If not, see . * +\******************************************************************************/ +#include "vu.h" + +INLINE void do_xor(usf_state_t * state, short* VD, short* VS, short* VT) +{ + +#ifdef ARCH_MIN_ARM_NEON + + int16x8_t vs, vt; + vs = vld1q_s16((const int16_t*)VS); + vt = vld1q_s16((const int16_t*)VT); + vs = veorq_s16(vs, vt); + vst1q_s16(VACC_L, vs); + vector_copy(VD, VACC_L); + + return; +#else + + register int i; + + for (i = 0; i < N; i++) + VACC_L[i] = VS[i] ^ VT[i]; + vector_copy(VD, VACC_L); + return; +#endif +} + +static void VXOR(usf_state_t * state, int vd, int vs, int vt, int e) +{ + ALIGNED short ST[N]; + + SHUFFLE_VECTOR(ST, state->VR[vt], e); + do_xor(state, state->VR[vd], state->VR[vs], ST); + return; +} diff --git a/Frameworks/lazyusf/lazyusf/si/cic.c b/Frameworks/lazyusf2/lazyusf2/si/cic.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/si/cic.c rename to Frameworks/lazyusf2/lazyusf2/si/cic.c diff --git a/Frameworks/lazyusf/lazyusf/si/cic.h b/Frameworks/lazyusf2/lazyusf2/si/cic.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/si/cic.h rename to Frameworks/lazyusf2/lazyusf2/si/cic.h diff --git a/Frameworks/lazyusf/lazyusf/si/game_controller.c b/Frameworks/lazyusf2/lazyusf2/si/game_controller.c similarity index 100% rename from Frameworks/lazyusf/lazyusf/si/game_controller.c rename to Frameworks/lazyusf2/lazyusf2/si/game_controller.c diff --git a/Frameworks/lazyusf/lazyusf/si/game_controller.h b/Frameworks/lazyusf2/lazyusf2/si/game_controller.h similarity index 100% rename from Frameworks/lazyusf/lazyusf/si/game_controller.h rename to Frameworks/lazyusf2/lazyusf2/si/game_controller.h diff --git a/Frameworks/lazyusf/lazyusf/si/n64_cic_nus_6105.c b/Frameworks/lazyusf2/lazyusf2/si/n64_cic_nus_6105.c similarity index 100% rename from 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