696 lines
13 KiB
C++
696 lines
13 KiB
C++
/*
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* This file is part of libsidplayfp, a SID player engine.
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*
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* Copyright 2011-2016 Leandro Nini <drfiemost@users.sourceforge.net>
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* Copyright 2009-2014 VICE Project
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* Copyright 2007-2010 Antti Lankila
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* Copyright 2001 Simon White
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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// References below are from:
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// The MOS 6567/6569 video controller (VIC-II)
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// and its application in the Commodore 64
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// http://www.uni-mainz.de/~bauec002/VIC-Article.gz
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//
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// MOS 6572 info taken from http://solidstate.com.ar/wp/?p=200
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#include "mos656x.h"
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#include <cstring>
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#include "sidendian.h"
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namespace libsidplayfp
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{
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/// Cycle # at which the VIC takes the bus in a bad line (BA goes low).
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const unsigned int VICII_FETCH_CYCLE = 11;
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const unsigned int VICII_SCREEN_TEXTCOLS = 40;
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const MOS656X::model_data_t MOS656X::modelData[] =
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{
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{262, 64, &MOS656X::clockOldNTSC}, // Old NTSC (MOS6567R56A)
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{263, 65, &MOS656X::clockNTSC}, // NTSC-M (MOS6567R8)
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{312, 63, &MOS656X::clockPAL}, // PAL-B (MOS6569R1, MOS6569R3)
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{312, 65, &MOS656X::clockNTSC}, // PAL-N (MOS6572)
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};
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const char *MOS656X::credits()
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{
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return
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"MOS6567/6569/6572 (VIC II) Emulation:\n"
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"\tCopyright (C) 2001 Simon White\n"
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"\tCopyright (C) 2007-2010 Antti Lankila\n"
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"\tCopyright (C) 2009-2014 VICE Project\n"
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"\tCopyright (C) 2011-2016 Leandro Nini\n";
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}
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MOS656X::MOS656X(EventScheduler &scheduler) :
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Event("VIC Raster"),
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eventScheduler(scheduler),
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sprites(regs),
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badLineStateChangeEvent("Update AEC signal", *this, &MOS656X::badLineStateChange),
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rasterYIRQEdgeDetectorEvent("RasterY changed", *this, &MOS656X::rasterYIRQEdgeDetector)
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{
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chip(MOS6569);
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}
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void MOS656X::reset()
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{
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irqFlags = 0;
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irqMask = 0;
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yscroll = 0;
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rasterY = maxRasters - 1;
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lineCycle = 0;
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areBadLinesEnabled = false;
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isBadLine = false;
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rasterYIRQCondition = false;
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rasterClk = 0;
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vblanking = false;
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lpAsserted = false;
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memset(regs, 0, sizeof(regs));
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lp.reset();
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sprites.reset();
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eventScheduler.cancel(*this);
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eventScheduler.schedule(*this, 0, EVENT_CLOCK_PHI1);
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}
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void MOS656X::chip(model_t model)
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{
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maxRasters = modelData[model].rasterLines;
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cyclesPerLine = modelData[model].cyclesPerLine;
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clock = modelData[model].clock;
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lp.setScreenSize(maxRasters, cyclesPerLine);
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reset();
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}
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uint8_t MOS656X::read(uint_least8_t addr)
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{
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addr &= 0x3f;
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// Sync up timers
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sync();
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switch (addr)
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{
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case 0x11:
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// Control register 1
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return (regs[addr] & 0x7f) | ((rasterY & 0x100) >> 1);
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case 0x12:
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// Raster counter
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return rasterY & 0xFF;
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case 0x13:
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return lp.getX();
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case 0x14:
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return lp.getY();
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case 0x19:
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// Interrupt Pending Register
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return irqFlags | 0x70;
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case 0x1a:
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// Interrupt Mask Register
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return irqMask | 0xf0;
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default:
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// for addresses < $20 read from register directly
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if (addr < 0x20)
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return regs[addr];
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// for addresses < $2f set bits of high nibble to 1
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if (addr < 0x2f)
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return regs[addr] | 0xf0;
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// for addresses >= $2f return $ff
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return 0xff;
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}
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}
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void MOS656X::write(uint_least8_t addr, uint8_t data)
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{
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addr &= 0x3f;
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regs[addr] = data;
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// Sync up timers
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sync();
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switch (addr)
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{
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case 0x11: // Control register 1
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{
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const unsigned int oldYscroll = yscroll;
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yscroll = data & 0x7;
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// This is the funniest part... handle bad line tricks.
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const bool wasBadLinesEnabled = areBadLinesEnabled;
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if (rasterY == FIRST_DMA_LINE && lineCycle == 0)
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{
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areBadLinesEnabled = readDEN();
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}
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if (oldRasterY() == FIRST_DMA_LINE && readDEN())
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{
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areBadLinesEnabled = true;
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}
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if ((oldYscroll != yscroll || areBadLinesEnabled != wasBadLinesEnabled)
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&& rasterY >= FIRST_DMA_LINE
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&& rasterY <= LAST_DMA_LINE)
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{
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// Check whether bad line state has changed.
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const bool wasBadLine = (wasBadLinesEnabled && (oldYscroll == (rasterY & 7)));
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const bool nowBadLine = (areBadLinesEnabled && (yscroll == (rasterY & 7)));
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if (nowBadLine != wasBadLine)
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{
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const bool oldBadLine = isBadLine;
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if (wasBadLine)
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{
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if (lineCycle < VICII_FETCH_CYCLE)
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{
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isBadLine = false;
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}
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}
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else
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{
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if (lineCycle >= VICII_FETCH_CYCLE
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&& lineCycle < VICII_FETCH_CYCLE + VICII_SCREEN_TEXTCOLS + 3)
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{
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isBadLine = true;
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}
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else if (lineCycle <= VICII_FETCH_CYCLE + VICII_SCREEN_TEXTCOLS + 6)
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{
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// Bad line has been generated after fetch interval, but
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// before the raster counter is incremented.
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isBadLine = true;
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}
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}
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if (isBadLine != oldBadLine)
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eventScheduler.schedule(badLineStateChangeEvent, 0, EVENT_CLOCK_PHI1);
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}
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}
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}
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// fall-through
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case 0x12: // Raster counter
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// check raster Y irq condition changes at the next PHI1
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eventScheduler.schedule(rasterYIRQEdgeDetectorEvent, 0, EVENT_CLOCK_PHI1);
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break;
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case 0x17:
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sprites.lineCrunch(data, lineCycle);
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break;
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case 0x19:
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// VIC Interrupt Flag Register
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irqFlags &= (~data & 0x0f) | 0x80;
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handleIrqState();
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break;
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case 0x1a:
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// IRQ Mask Register
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irqMask = data & 0x0f;
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handleIrqState();
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break;
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}
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}
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void MOS656X::handleIrqState()
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{
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// signal an IRQ unless we already signaled it
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if ((irqFlags & irqMask & 0x0f) != 0)
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{
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if ((irqFlags & 0x80) == 0)
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{
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interrupt(true);
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irqFlags |= 0x80;
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}
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}
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else
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{
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if ((irqFlags & 0x80) != 0)
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{
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interrupt(false);
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irqFlags &= 0x7f;
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}
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}
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}
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void MOS656X::event()
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{
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const event_clock_t cycles = eventScheduler.getTime(rasterClk, eventScheduler.phase());
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event_clock_t delay;
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if (cycles)
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{
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// Update x raster
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rasterClk += cycles;
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lineCycle += cycles;
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lineCycle %= cyclesPerLine;
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delay = (this->*clock)();
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}
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else
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delay = 1;
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eventScheduler.schedule(*this, (unsigned int)(delay - eventScheduler.phase()), EVENT_CLOCK_PHI1);
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}
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event_clock_t MOS656X::clockPAL()
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{
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event_clock_t delay = 1;
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switch (lineCycle)
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{
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case 0:
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checkVblank();
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endDma<2>();
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break;
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case 1:
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vblank();
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startDma<5>();
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// No sprites before next compulsory cycle
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if (!sprites.isDma(0xf8))
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delay = 10;
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break;
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case 2:
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endDma<3>();
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break;
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case 3:
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startDma<6>();
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break;
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case 4:
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endDma<4>();
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break;
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case 5:
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startDma<7>();
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break;
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case 6:
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endDma<5>();
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delay = sprites.isDma(0xc0) ? 2 : 4;
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break;
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case 7:
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break;
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case 8:
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endDma<6>();
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delay = 2;
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break;
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case 9:
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break;
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case 10:
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endDma<7>();
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break;
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case 11:
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startBadline();
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delay = 3;
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break;
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case 12:
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delay = 2;
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break;
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case 13:
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break;
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case 14:
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sprites.updateMc();
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break;
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case 15:
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sprites.updateMcBase();
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delay = 39;
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break;
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case 54:
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sprites.checkDma(rasterY, regs);
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startDma<0>();
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break;
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case 55:
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sprites.checkDma(rasterY, regs); // Phi1
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sprites.checkExp(); // Phi2
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startDma<0>();
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break;
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case 56:
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startDma<1>();
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break;
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case 57:
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sprites.checkDisplay();
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// No sprites before next compulsory cycle
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if (!sprites.isDma(0x1f))
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delay = 6;
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break;
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case 58:
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startDma<2>();
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break;
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case 59:
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endDma<0>();
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break;
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case 60:
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startDma<3>();
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break;
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case 61:
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endDma<1>();
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break;
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case 62:
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startDma<4>();
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break;
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default:
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delay = 54 - lineCycle;
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}
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return delay;
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}
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event_clock_t MOS656X::clockNTSC()
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{
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event_clock_t delay = 1;
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switch (lineCycle)
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{
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case 0:
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checkVblank();
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startDma<5>();
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break;
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case 1:
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vblank();
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endDma<3>();
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// No sprites before next compulsory cycle
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if (!sprites.isDma(0xf8))
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delay = 10;
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break;
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case 2:
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startDma<6>();
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break;
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case 3:
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endDma<4>();
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break;
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case 4:
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startDma<7>();
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break;
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case 5:
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endDma<5>();
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delay = sprites.isDma(0xc0) ? 2 : 4;
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break;
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case 6:
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break;
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case 7:
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endDma<6>();
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delay = 2;
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break;
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case 8:
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break;
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case 9:
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endDma<7>();
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delay = 2;
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break;
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case 10:
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break;
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case 11:
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startBadline();
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delay = 3;
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break;
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case 12:
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delay = 2;
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break;
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case 13:
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break;
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case 14:
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sprites.updateMc();
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break;
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case 15:
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sprites.updateMcBase();
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delay = 40;
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break;
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case 55:
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sprites.checkDma(rasterY, regs); // Phi1
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sprites.checkExp(); // Phi2
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startDma<0>();
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break;
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case 56:
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sprites.checkDma(rasterY, regs);
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startDma<0>();
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break;
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case 57:
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startDma<1>();
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break;
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case 58:
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sprites.checkDisplay();
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// No sprites before next compulsory cycle
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if (!sprites.isDma(0x1f))
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delay = 7;
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break;
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case 59:
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startDma<2>();
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break;
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case 60:
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endDma<0>();
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break;
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case 61:
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startDma<3>();
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break;
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case 62:
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endDma<1>();
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break;
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case 63:
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startDma<4>();
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break;
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case 64:
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endDma<2>();
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break;
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default:
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delay = 55 - lineCycle;
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}
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return delay;
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}
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event_clock_t MOS656X::clockOldNTSC()
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{
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event_clock_t delay = 1;
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switch (lineCycle)
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{
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case 0:
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checkVblank();
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endDma<2>();
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break;
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case 1:
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vblank();
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startDma<5>();
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// No sprites before next compulsory cycle
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if (!sprites.isDma(0xf8))
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delay = 10;
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break;
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case 2:
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endDma<3>();
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break;
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case 3:
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startDma<6>();
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break;
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case 4:
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endDma<4>();
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break;
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case 5:
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startDma<7>();
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break;
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case 6:
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endDma<5>();
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delay = sprites.isDma(0xc0) ? 2 : 4;
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break;
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case 7:
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break;
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case 8:
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endDma<6>();
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delay = 2;
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break;
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case 9:
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break;
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case 10:
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endDma<7>();
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break;
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case 11:
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startBadline();
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delay = 3;
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break;
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case 12:
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delay = 2;
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break;
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case 13:
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break;
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case 14:
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sprites.updateMc();
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break;
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case 15:
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sprites.updateMcBase();
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delay = 40;
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break;
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case 55:
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sprites.checkDma(rasterY, regs); // Phi1
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sprites.checkExp(); // Phi2
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startDma<0>();
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break;
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case 56:
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sprites.checkDma(rasterY, regs);
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startDma<0>();
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break;
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case 57:
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sprites.checkDisplay();
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startDma<1>();
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// No sprites before next compulsory cycle
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delay = (!sprites.isDma(0x1f)) ? 7 : 2;
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break;
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case 58:
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break;
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case 59:
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startDma<2>();
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break;
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case 60:
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endDma<0>();
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break;
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|
|
case 61:
|
|
startDma<3>();
|
|
break;
|
|
|
|
case 62:
|
|
endDma<1>();
|
|
break;
|
|
|
|
case 63:
|
|
startDma<4>();
|
|
break;
|
|
|
|
default:
|
|
delay = 55 - lineCycle;
|
|
}
|
|
|
|
return delay;
|
|
}
|
|
|
|
void MOS656X::triggerLightpen()
|
|
{
|
|
// Synchronise simulation
|
|
sync();
|
|
|
|
lpAsserted = true;
|
|
|
|
if (lp.trigger(lineCycle, rasterY))
|
|
{
|
|
activateIRQFlag(IRQ_LIGHTPEN);
|
|
}
|
|
}
|
|
|
|
void MOS656X::clearLightpen()
|
|
{
|
|
lpAsserted = false;
|
|
}
|
|
|
|
}
|