142 lines
3.8 KiB
Plaintext
142 lines
3.8 KiB
Plaintext
/*
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* This file is part of libsidplayfp, a SID player engine.
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*
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* Copyright 2011-2014 Leandro Nini <drfiemost@users.sourceforge.net>
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* Copyright 2007-2010 Antti Lankila
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* Copyright 2000 Simon White
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#ifndef MMU_H
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#define MMU_H
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#include <stdint.h>
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#include "sidplayfp/event.h"
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#include "sidendian.h"
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#include "sidmemory.h"
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#include "Banks/Bank.h"
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#include "Banks/SystemRAMBank.h"
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#include "Banks/SystemROMBanks.h"
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#include "Banks/ZeroRAMBank.h"
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#include "sidcxx11.h"
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#include <string.h>
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namespace libsidplayfp
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{
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/**
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* The C64 MMU chip.
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*/
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class MMU : public PLA, public sidmemory
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{
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private:
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EventContext &context;
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/// CPU port signals
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bool loram, hiram, charen;
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/// CPU read memory mapping in 4k chunks
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Bank* cpuReadMap[16];
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/// CPU write memory mapping in 4k chunks
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Bank* cpuWriteMap[16];
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/// IO region handler
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Bank* ioBank;
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/// Kernal ROM
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KernalRomBank kernalRomBank;
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/// BASIC ROM
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BasicRomBank basicRomBank;
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/// Character ROM
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CharacterRomBank characterRomBank;
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/// RAM
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SystemRAMBank ramBank;
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/// RAM bank 0
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ZeroRAMBank zeroRAMBank;
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private:
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void setCpuPort(int state) override;
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uint8_t getLastReadByte() const override { return 0; }
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event_clock_t getPhi2Time() const override { return context.getTime(EVENT_CLOCK_PHI2); }
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void updateMappingPHI2();
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public:
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MMU(EventContext *context, Bank* ioBank);
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~MMU() {}
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void reset();
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void setRoms(const uint8_t* kernal, const uint8_t* basic, const uint8_t* character)
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{
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kernalRomBank.set(kernal);
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basicRomBank.set(basic);
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characterRomBank.set(character);
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}
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// RAM access methods
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uint8_t readMemByte(uint_least16_t addr) override { return ramBank.peek(addr); }
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uint_least16_t readMemWord(uint_least16_t addr) override { return endian_little16(ramBank.ram+addr); }
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void writeMemByte(uint_least16_t addr, uint8_t value) override { ramBank.poke(addr, value); }
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void writeMemWord(uint_least16_t addr, uint_least16_t value) override { endian_little16(ramBank.ram+addr, value); }
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void fillRam(uint_least16_t start, uint8_t value, unsigned int size) override
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{
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memset(ramBank.ram+start, value, size);
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}
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void fillRam(uint_least16_t start, const uint8_t* source, unsigned int size) override
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{
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memcpy(ramBank.ram+start, source, size);
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}
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// SID specific hacks
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void installResetHook(uint_least16_t addr) override { kernalRomBank.installResetHook(addr); }
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void installBasicTrap(uint_least16_t addr) override { basicRomBank.installTrap(addr); }
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void setBasicSubtune(uint8_t tune) override { basicRomBank.setSubtune(tune); }
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/**
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* Access memory as seen by CPU.
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*
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* @param addr the address where to read from
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* @return value at address
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*/
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uint8_t cpuRead(uint_least16_t addr) const { return cpuReadMap[addr >> 12]->peek(addr); }
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/**
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* Access memory as seen by CPU.
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*
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* @param addr the address where to write
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* @param data the value to write
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*/
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void cpuWrite(uint_least16_t addr, uint8_t data) { cpuWriteMap[addr >> 12]->poke(addr, data); }
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};
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}
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#endif
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