97 lines
2.5 KiB
C++
97 lines
2.5 KiB
C++
// $package. http://www.slack.net/~ant/
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#include "Sap_Core.h"
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#include "blargg_endian.h"
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//#define CPU_LOG_MAX 100000
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//#include "nes_cpu_log.h"
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/* Copyright (C) 2003-2008 Shay Green. This module is free software; you
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can redistribute it and/or modify it under the terms of the GNU Lesser
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General Public License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version. This
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module is distributed in the hope that it will be useful, but WITHOUT ANY
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WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public License for more
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details. You should have received a copy of the GNU Lesser General Public
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License along with this module; if not, write to the Free Software Foundation,
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Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA */
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#include "blargg_source.h"
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// functions defined in same file as CPU emulator to help compiler's optimizer
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int Sap_Core::read_d40b()
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{
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//dprintf( "D40B read\n" );
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check( cpu.time() >= frame_start );
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return ((unsigned) (cpu.time() - frame_start) / scanline_period % lines_per_frame) / 2;
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}
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void Sap_Core::write_D2xx( int d2xx, int data )
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{
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addr_t const base = 0xD200;
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if ( d2xx < apu_.io_size )
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{
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apu_.write_data( time(), d2xx + base, data );
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return;
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}
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if ( (unsigned) (d2xx - 0x10) < apu2_.io_size && info.stereo )
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{
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apu2_.write_data( time(), d2xx + (base - 0x10), data );
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return;
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}
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if ( d2xx == 0xD40A - base )
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{
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dprintf( "D40A write\n" );
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time_t t = cpu.time();
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time_t into_line = (t - frame_start) % scanline_period;
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cpu.set_end_time( t - into_line + scanline_period );
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return;
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}
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if ( (d2xx & ~0x0010) != 0x0F || data != 0x03 )
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dprintf( "Unmapped write $%04X <- $%02X\n", d2xx + base, data );
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}
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inline int Sap_Core::read_mem( addr_t addr )
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{
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int result = mem.ram [addr];
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if ( addr == 0xD40B )
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result = read_d40b();
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else if ( (addr & 0xF900) == 0xD000 )
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dprintf( "Unmapped read $%04X\n", addr );
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return result;
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}
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#define READ_LOW( addr ) (ram [addr])
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#define WRITE_LOW( addr, data ) (ram [addr] = data)
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#define READ_MEM( addr ) read_mem( addr )
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#define WRITE_MEM( addr, data ) \
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{\
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ram [addr] = data;\
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int d2xx = addr - 0xD200;\
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if ( (unsigned) d2xx < 0x100 )\
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write_D2xx( d2xx, data );\
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}
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#define CPU cpu
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#define FLAT_MEM ram
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#define CPU_BEGIN \
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bool Sap_Core::run_cpu( time_t end )\
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{\
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CPU.set_end_time( end );\
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byte* const ram = this->mem.ram; /* cache */
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#include "Nes_Cpu_run.h"
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return cpu.time_past_end() < 0;
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}
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