Notes pertaining to T480/3050 FSP licensing
Signed-off-by: Leah Rowe <info@minifree.org>master
parent
6447f5d183
commit
19fab47201
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@ -82,7 +82,7 @@ Build ROM image from source
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The build target, when building from source, is thus:
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./mk -b coreboot dell3050micro_fsp_16mb
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./mk -b coreboot dell3050micro_vfsp_16mb
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Mate Kukri's *deguard* utility disables the Intel Boot Guard on this
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machine. Libreboot uses this by default, along with `me_cleaner` to provide
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@ -215,3 +215,67 @@ SMT is rarely of benefit in practise, but can be useful in some circumstances.
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For example, if you're compiling a large codebase from source that takes hours,
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SMT increases the building speed by about 15 percent; for example, a 3 hour
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build job might take about 2 hours and 40 minutes instead.
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Intel FSP copyright
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===================
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Abstract
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--------
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The initial Libreboot 20241206 release included Intel FSP directly inside the
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ROM images. Intel provides the FSP under a license which states (and I
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paraphrase): you must not modify it, but you can redistribute it freely, so
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long as the license notice is retained.
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The FSP is a concatenation of three modules: FSP-T, FSP-S and FSP-M. T basically
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does CAR, S is essentially romstage components, and M is raminit. Due to how
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coreboot works, these components must be split into single components. Coreboot
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doesn't use T by default (it implements CAR itself), but has the option to
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use it. It will use M and S, only.
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Technically, the process of splitting FSP into these three files counts as
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a modification. Furthermore, coreboot also rebases the M module by modifying
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certain pointers, so that it can integrate with coreboot to provide raminit.
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Intel *themselves* own the copyright to the tool for splitting FSP,
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at `3rdparty/fsp/Tools/SplitFspBin.py`, and it seems that they do intend for
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the FSP to be used this way. However, until now, those using the Intel FSP
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have built coreboot images from source, so the issue of modified distributions
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didn't come up.
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By the strictest possible interpretation of Intel's licensing, Libreboot was
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technically in violation. To mitigate this, Libreboot 20241206 *revision 8* and
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newer, will no longer include the Intel FSP inside images. Instead, the vendor
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inject script is used for inserting the FSP into release images, which is what
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we already do for several other components.
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`_fsp` vs `_vfsp` targets
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-------------------------
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The original 20241206 release images had `_fsp` in the file name. From rev8
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onward, `_vfsp` is specified instead.
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Libreboot's inject script verifies checksums on files, when inserting into the
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images. Because of this, if we inject FSP after the fact, that means anyone
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using the old images will find errors when they try.
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To mitigate this, the build targets containing `_fsp` in the name have been
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retained, but these targets are set `release="n"` so that no ROM images are
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provided in releases. The `_vfsp` images are provided pre-compiled, instead.
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With this re-design, modern lbmk (from Libreboot 20241206 rev8 onward) can still
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reliably inject Intel ME into the old `_fsp` images, if you already downloaded
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those before.
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Therefore, you must be especially careful to get this right. If you're running
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the inject script into a tarball, it will generally detect the right one, but
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inserting manually into individual image files is also possible; if you do this,
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you must remember to correctly specify `dell3050micro_vfsp_16mb`,
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or to specify the `_fsp` targets if you're doing this on older images.
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It is extremely unlikely that Intel would have ever cracked down on Libreboot
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for its previous mistake, since many other projects exist that include FSP
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directly in coreboot images, even commercially. However, Libreboot wishes to
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respect Intel's license, in the
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most [technically correct](https://www.youtube.com/watch?v=0ZEuWJ4muYc) way
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possible.
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@ -127,8 +127,8 @@ Please refer to the standard [build instructions](../build/) first.
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The build target, when building from source, is thus:
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./mk -b coreboot t480_fsp_16mb
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./mk -b coreboot t480s_fsp_16mb
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./mk -b coreboot t480_vfsp_16mb
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./mk -b coreboot t480s_vfsp_16mb
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**NOTE: The T480 and T480s may be similar, but they do have several critical
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differences in their wiring, so you MUST flash the correct image. Please
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@ -518,6 +518,14 @@ git add config/coreboot/t480s_fsp_16mb/
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git commit -s -m "experimental/unstable t480 thunderbolt support"
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```
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**NOTE: With the above change, or if using the branch referenced below,
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the build targets will be `t480_fsp_16mb` and `t480s_fsp_16mb`,
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not `t480_vfsp_16mb` and `t480s_vfsp_16mb`; see notes regarding fsp/vfsp
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elsewhere on this page. This branch also does not contain other fixes from
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Libreboot 20231206 rev8/newer, since it's based on 20241206 rev2. A rebase will
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not be conducted; instead, ThunderBolt PCI-E support will simply be added in
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a subsequent release, and revision to the 20241206 release.**
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You can now follow standard [build instructions](../build/).
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The branch named `20241206-t480-thunderbolt-unstable` already has the above
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@ -551,3 +559,66 @@ If you encounter this issue, check\
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[this page](../../faq.md#thinkpad-acpi)
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for details as to how to fix this.
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Intel FSP copyright
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===================
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Abstract
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--------
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The initial Libreboot 20241206 release included Intel FSP directly inside the
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ROM images. Intel provides the FSP under a license which states (and I
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paraphrase): you must not modify it, but you can redistribute it freely, so
|
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long as the license notice is retained.
|
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|
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The FSP is a concatenation of three modules: FSP-T, FSP-S and FSP-M. T basically
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does CAR, S is essentially romstage components, and M is raminit. Due to how
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coreboot works, these components must be split into single components. Coreboot
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doesn't use T by default (it implements CAR itself), but has the option to
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use it. It will use M and S, only.
|
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|
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Technically, the process of splitting FSP into these three files counts as
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a modification. Furthermore, coreboot also rebases the M module by modifying
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certain pointers, so that it can integrate with coreboot to provide raminit.
|
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Intel *themselves* own the copyright to the tool for splitting FSP,
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at `3rdparty/fsp/Tools/SplitFspBin.py`, and it seems that they do intend for
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the FSP to be used this way. However, until now, those using the Intel FSP
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have built coreboot images from source, so the issue of modified distributions
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didn't come up.
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|
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By the strictest possible interpretation of Intel's licensing, Libreboot was
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technically in violation. To mitigate this, Libreboot 20241206 *revision 8* and
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newer, will no longer include the Intel FSP inside images. Instead, the vendor
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inject script is used for inserting the FSP into release images, which is what
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we already do for several other components.
|
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|
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`_fsp` vs `_vfsp` targets
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-------------------------
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The original 20241206 release images had `_fsp` in the file name. From rev8
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onward, `_vfsp` is specified instead.
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|
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Libreboot's inject script verifies checksums on files, when inserting into the
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images. Because of this, if we inject FSP after the fact, that means anyone
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using the old images will find errors when they try.
|
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|
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To mitigate this, the build targets containing `_fsp` in the name have been
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retained, but these targets are set `release="n"` so that no ROM images are
|
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provided in releases. The `_vfsp` images are provided pre-compiled, instead.
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|
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With this re-design, modern lbmk (from Libreboot 20241206 rev8 onward) can still
|
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reliably inject Intel ME into the old `_fsp` images, if you already downloaded
|
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those before.
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|
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Therefore, you must be especially careful to get this right. If you're running
|
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the inject script into a tarball, it will generally detect the right one, but
|
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inserting manually into individual image files is also possible; if you do this,
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you must remember to correctly specify `t480_vfsp_16mb` or `t480s_vfsp_16mb`,
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or to specify the `_fsp` targets if you're doing this on older images.
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It is extremely unlikely that Intel would have ever cracked down on Libreboot
|
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for its previous mistake, since many other projects exist that include FSP
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directly in coreboot images, even commercially. However, Libreboot wishes to
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respect Intel's license, in the
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most [technically correct](https://www.youtube.com/watch?v=0ZEuWJ4muYc) way
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possible.
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