Merge pull request 'Update link for chromebook closed case debugging.' (#96) from weimzh/lbwww:master into master
Reviewed-on: https://codeberg.org/libreboot/lbwww/pulls/96master
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2311db3d90
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@ -88,7 +88,7 @@ Chromebooks may have 1.8V as the supply voltage for the SPI NOR chip, be
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extra careful about that.
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On newer Chromebooks, there is a root-of-trust chip providing a
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[Closed Case Debugging](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md)
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[Closed Case Debugging](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_gsc.md)
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mechanism that lets you flash externally using a special USB debugging
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cable. However, most boards that Libreboot supports do not have this.
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@ -109,7 +109,7 @@ by the fact that it bridges electrical contacts, but finding and
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removing it might require you to disassemble most of the board.
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Newer boards have a root-of-trust chip enforcing write-protection. The
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[Closed Case Debugging](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md)
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[Closed Case Debugging](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_gsc.md)
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mechanism should be used to disable hardware write-protection. Opening
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the case and disconnecting the battery might also disable it.
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@ -151,7 +151,7 @@ first (like Intel ME firmware). This is not yet documented here.
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You can flash the ROM image both internally and externally. For the
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latter, see the [external flashing guide](spi.md) and the ChromiumOS
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[Closed Case Debugging](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_cr50.md)
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[Closed Case Debugging](https://chromium.googlesource.com/chromiumos/platform/ec/+/cr50_stab/docs/case_closed_debugging_gsc.md)
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documentation if your board supports it.
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To flash the entire ROM image internally, run within ChromeOS:
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