finish adding to the todo page
i finally copied all the notes from my diary this should be enough for now. there is plenty to work on. i'll always add more when i think of anything else, or if i find more notes elsewhere. Signed-off-by: Leah Rowe <leah@libreboot.org>master
parent
ce62a34fcb
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6e009f3818
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@ -18,6 +18,12 @@ how to submit patches, and it describes the Libreboot project infrastructure.
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You may also benefit from *assimilating* all knowledge contained in
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the *[lbmk maintenance manual](../docs/maintain/).*
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U-Boot test/lib/strlcat.c
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=========================
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Delete this file, in U-Boot trees, before the next release
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after Libreboot 20231106.
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S3 on ivy/sandy/haswell
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=======================
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@ -225,6 +231,7 @@ already supported by coreboot:
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northbridges. Many of these can boot blobless.
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Dell Latitude/Precision:
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-----------------------
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* Dell Latitude laptops: E4200, E4300, E5400, E5500, E6500, Precision M4400,
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@ -234,6 +241,39 @@ SuperIO: at least M6500 is known to use ECE5028. I have a bunch of these
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Dells at my lab, they are high priority for porting because they would be
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easily flashable, and blob-free configs (Canoeboot could also support them).
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E4200 SPD
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---------
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NOTE: Some of this may be inaccurate, because it's copied from handwritten
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notes that were written very hastily and are barely legible.
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The SPD EEPROM is on the back of the board, between the CPU backplate and the
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RAM chips. SOIC-8 chip labelled U2. It's a 24XX IC, should be possible to
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dump using a 3.3v-modded CH341A (on the 24xx socket).
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or
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```
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modprobe eeprom
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```
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look in e.g. 0-0058 or 0-0052 in `/sys/bus/i2c/devices`
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May need other modules like at25 and i2c-i801
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The eeprom file in these should contain the SPD data. Just look through a bunch
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of them until the file is found and seems to be correct.
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decode-dimms (utility) can also read eeprom and decode SPD data but doesn't dump
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the ram eeprom (dumping it in a ch341a as above would do so)
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see <https://unix.stackexchange.com/questions/92037/how-to-view-rams-spd-timings-table#92044>
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(yes, that url was also handwritten)
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modprobe i2c-dev and sudo i2cdump 0 0x50 works in libreboot, but not the
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vendor bios.
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Other Dells (Ivybridge and Sandybridge)
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------------------------
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@ -915,6 +955,10 @@ believe it was because I didn't insert the MRC firmware at the correct offset
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during that test. Libreboot's build system now handles that correctly, in
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the vendorfile inject script at `script/vendor/inject`.
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In IFD-based systems, CS1 and CS2 are separate, but data lines like
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MOSI/MISO are shared, and the PCH/southbridge will enable or disable the given
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flash IC to access the region needed.
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ME Cleaner status page
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======================
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@ -1410,6 +1454,24 @@ is described there), we can expand it to configure c-states differently on
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imac52. This config is used to enable efficient power management, on these
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machines.
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How to dump c-state config
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--------------------------
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```
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i2cdump 0x69
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```
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dump the c-state config from apple efi firmware
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imac5,2 breaks with the current c-state patch used in libreboot, according
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to `f_` on IRC.
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powertop can give info about available c-states
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also: don't use efi grub or anything efi on non-macos operating systems on
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these machines, doesn't work well in apple's firmware. mentioned by avph in
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the gerrit link (see above)
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Check file ownership in builds
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==============================
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@ -1738,3 +1800,173 @@ on supported Libreboot hardware. AMD has them too. These are errata documents
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that define which bugs exist in each CPU, and which ones have been fixed by
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microcode updates - they also generally provide information for OS developers,
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to know how certain bugs should be mitigated, whenever possible.
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Macbook2,1 backlight controls
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=============================
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Was reported broken in linux 6.1, but works in 5.x
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Since linux 6.1, the backlight subsystem was revamped. Try one of the
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cmdline options:
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* `acpi_backlight=video`
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* `acpi_backlight=vendor`
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* `acpi_backlight=native`
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More testing is needed on this. So far, nothing seems broken on other machines
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tested and no user reports have come in. The way backlight controls work on
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coreboot can differ a bit from the vendor firmware on some boards.
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Not really a major issue, but it does need to be addressed.
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TODO: test other platforms too
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-------------------------------
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Test other platforms.
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Document CH341A variants
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========================
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All CH341A variants are garbage for ISP-based flashing, because of weak
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drive strength and poor board layout, also the WP/HOLD pins are often held
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high via straight connections to VCC on these boards (rather than going through
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a pull-up resistor, as safe electrical design would dictate).
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However, Libreboot currently only documents the black and gold one, that comes
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with 5V logic levels by default, and it has information for how to modify it
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so that the logic level are 3.3v - in addition, there are 1.8V logic level
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adapters, that just come with logic level converters on them.
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The original green variant is 3.3v by default, and some newer variants have
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adjustable voltage for the logic levels.
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For socket-based flashing, they're actually quite decent flashers. Quite
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convenient, because you don't have to mess with a breadboard or anything,
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because they already have ZIF sockets on them for DIP-8 ICs, on which you can
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also use adapters for SOIC-8, SOIC-16 and WSON-8.
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E6400 VGA ROM (Nvidia)
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----------------------
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See: <https://bugs.debian.org/cgi-bin/bugreport.cgi?bug=990662#22>
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Although we couldn't reproduce it after testing, a redditor did report that
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following these steps caused nouveau to work.
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Also: `e6400nvidia_4mb` works better on that setup, nouveau is actually stable
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in some cases. Check the E6400 page for libreboot, it lists issues with nouveau
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on those machines.
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Test Crystalwell CPUs on T440p
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------------------------------
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Coreboot has support for these, but they have not been tested as far as I know,
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and no reports have been made for them by Libreboot users. These offer higher
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performance and the machine is already very nice.
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Ditto W541.
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How to extract VBT data
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-----------------------
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See:
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* <https://manpages.debian.org/bullseye/intel-gpu-tools/intel_vbt_decode.1.en.html>
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Extract it from the vga rom, the vbt header is in there, and the number of bytes
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will be in the size field, so that one can know how many bytes to extract. One
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of these tools linked above prints it.
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The VBT table is needed on machines where intel libgfxinit is used. It can just
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be extracted and included in a coreboot port.
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Guix: use debootstrap
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=====================
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GCC-Gnat is unavailable in Guix, due to the distro's requirement for sources
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to be bootstrapped. GCC-Gnat is also required, for building GCC-Gnat. We build
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it in libreboot, to provide libgfxinit, because it's written in Ada.
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Therefore, lbmk cannot be used reliably in Guix. It's possible to just add
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a binary for Gnat to the host, and then use that, but there is another idea:
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Guix *does* have debootstrap, which could be used to bootstrap a Debian system,
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and install everything in that, including GCC-Gnat. Of course, we don't need
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to do anything for this in lbmk, but it would be nice to document.
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In fact, it wouldn't necessarily need to be specific to Guix, because many
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systems have debootstrap; FreeBSD also has it, and it's even mentioned here
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on this page, though in the context of *porting* lbmk to FreeBSD.
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Perhaps this could be done:
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In the logic for `./build dependencies distroname`, add an option for Guix,
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but on that one, make lbmk automatically set up debootstrap if it's being
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run for Guix (and it would detect whether the host actually is Guix System).
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docs/build/clean.md
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===================
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Add this section, telling the user (of lbmk specifically) how to clean various
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directories. This isn't handled universally, due to lbmk's design. When
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updating revisions, a lot of manual intervention is needed if an existing
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revision was already downloaded, especially if it was built.
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For example, if you already compiled GRUB at a given revision, it will be
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present under `elf/grub/`. If you're updating the revision in lbmk, you must
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delete `elf/grub` first. Similarly, if you're testing out code changes, you
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have to know to do that and re-make GRUB.
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This section relates to another section on this page, about automatically
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handling such updates in lbmk when it runs. Until that is done, this section
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is also here. We should document how this is handled, under the current scheme.
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A lot of development on lbmk requires the operator to *know* how lbmk works.
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The preference however is to simplify and automate everything as much as possible.
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That is Libreboot's philosophy, that the user should never have to do more than
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is absolutely necessary when someonething could just as easily be done in code.
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E6400 security
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==============
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See other section on this page about write protection.
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Setting PR registers for write protection is a valid way to write protect on
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Dell E6400, and it would not be affected by the flash-unlock utilitiy.
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SMM methods
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-----------
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Tere are two SMM write protect methods:
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The old lock enable bit, which causes an SMI to be triggered whenever BIOS write
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enable is changed back to 1. Then SMM needs to change the BISO write enable back
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to 0. Not the best option as it is vulnerable to timing attacks where a write gets
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through before SMM can change it back.
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On newer chipsets (5 series and newer, basically everything newer than GM45),
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there's a new bit called SMM BIOS write protection, which prevents flash
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from being written to unless all cores are in SMM, which is better than the other
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method.
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^ These notes were supplied by Nicholas Chin via IRC.
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PCI-E REBAR
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===========
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See: <https://github.com/xCuri0/ReBarUEFI>
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This is *required* on some newer graphics cards, and can otherwise improve
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performance when supported. Support supports
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PCI-E REBAR - apparently some GPUs need it.
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It allows the host CPU to access all of VRAM at once, without 32-bit legacy
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code. The above repository is a proof of concept that shows it working, though
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the work there is not directly applicable to us.
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This feature is only supported commercially on much newer mainboards, and is
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unavailable on many older mainboards, but it can be added if the firmware is
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updated. This is one of the benefits of the *freedom* coreboot gives you. We
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could enable this on all the older desktop machines, where otherwise their
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factory firmware does not and will not enable it (and the above link is for
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UEFI systems only).
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Loading…
Reference in New Issue