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172e989463
commit
a1f31c8932
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@ -241,6 +241,18 @@ SuperIO: at least M6500 is known to use ECE5028. I have a bunch of these
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Dells at my lab, they are high priority for porting because they would be
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Dells at my lab, they are high priority for porting because they would be
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easily flashable, and blob-free configs (Canoeboot could also support them).
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easily flashable, and blob-free configs (Canoeboot could also support them).
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Dell Latitude E7240
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-------------------
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See: <https://review.coreboot.org/c/coreboot/+/79746>
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Haswell latitude, works with `dell-flash-unlock`, uses MEC5055 EC. Documentation
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is included with that patch. It should be possible to re-use the existing
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MRC extraction logic. It will have to be backported to the branch used for
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libremrc in lbmk.
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NOTE: Iru Cai is the person working on this.
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E4200 SPD
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E4200 SPD
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---------
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---------
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@ -324,10 +336,19 @@ getting it to boot reliably on custom firmware builds.
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OpenSIL and AMD Ryzen
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OpenSIL and AMD Ryzen
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---------------------
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---------------------
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Of interest: coreboot has started imported AMD's *OpenSIL*, to support the
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Coreboot is importing OpenSIL code from AMD, to support Epyc Genoa (server
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Ryzen-based chromebooks, and there is interest in adapting that code for
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platform).
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Ryzen-based desktops. AMD Ryzen CPUs are quite powerful, currently among the
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best available at least on consumer-grade hardware.
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There are also chromebooks now with AMD Ryzen CPUs.
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<https://github.com/coreboot/coreboot/commit/a859057db8d2eaf59a7575e303d7af35979d12d7>
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<https://github.com/coreboot/coreboot/commit/9e45e32420eda750afea9f6e4a3e6de42ba4152b>
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NOTE:
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9elements seems to be the main entity working on OpenSIL integration in
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coreboot, under the direction of Arthur Heymans.
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AMD Family16 boards
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AMD Family16 boards
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-------------------
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-------------------
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@ -1999,3 +2020,21 @@ right now we have:
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The `-m serprog` and `-m serprogsrc` arguments would apply the same logic,
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The `-m serprog` and `-m serprogsrc` arguments would apply the same logic,
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but only handle serprog sources. Specifically, pico-serprog and stm32-vserprog,
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but only handle serprog sources. Specifically, pico-serprog and stm32-vserprog,
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which Riku already automated the handling of in lbmk.
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which Riku already automated the handling of in lbmk.
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Shrink FSP size (Intel)
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=========================
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See: <https://blog.osfw.foundation/breaking-the-boundary-a-way-to-create-your-own-fsp-binary/>
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Remove modules from FSP that coreboot doesn't use. This will especially be
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useful on setups where linuxboot is to be enabled. Initially done on Alderlake
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but possible on other platforms.
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Thanks go to Nicholas Chin for linking this.
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Chromebooks
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-----------
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Especially useful here, if using the default setup. In the default setup,
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there are essentially three copies of the firmware in flash: a recovery
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image, an "A" image and a "B" image, according to Nicholas Chin.
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Reference in New Issue