diff --git a/arch/mips64/getcontext.S b/arch/mips64/getcontext.S index 0dc24a3..1084aa6 100644 --- a/arch/mips64/getcontext.S +++ b/arch/mips64/getcontext.S @@ -25,19 +25,19 @@ FUNC(__getcontext) PUSH_FRAME(__getcontext) /* set registers */ - sd $s0, ((16 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s1, ((17 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s2, ((18 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s3, ((19 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s4, ((20 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s5, ((21 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s6, ((22 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s7, ((23 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $s0, REG_OFFSET(16)($a0) + sd $s1, REG_OFFSET(17)($a0) + sd $s2, REG_OFFSET(18)($a0) + sd $s3, REG_OFFSET(19)($a0) + sd $s4, REG_OFFSET(20)($a0) + sd $s5, REG_OFFSET(21)($a0) + sd $s6, REG_OFFSET(22)($a0) + sd $s7, REG_OFFSET(23)($a0) - sd $a2, ((28 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $a3, ((29 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $a4, ((30 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $ra, ((31 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $a2, REG_OFFSET(28)($a0) + sd $a3, REG_OFFSET(29)($a0) + sd $a4, REG_OFFSET(30)($a0) + sd $ra, REG_OFFSET(31)($a0) sd $ra, (MCONTEXT_PC)($a0) POP_FRAME(__getcontext) diff --git a/arch/mips64/makecontext.S b/arch/mips64/makecontext.S index e528f83..482176d 100644 --- a/arch/mips64/makecontext.S +++ b/arch/mips64/makecontext.S @@ -40,7 +40,7 @@ FUNC(__makecontext) /* set $zero in the mcontext to 1. */ li $v0, 1 - sd $v0, ((0 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $v0, REG_OFFSET(0)($a0) /* ensure the stack is aligned on a quad-word boundary. */ ld $t0, UCONTEXT_STACK_PTR($a0) @@ -86,16 +86,16 @@ no_more_arguments: /* copy link pointer as $s0... */ ld $v1, UCONTEXT_UC_LINK($a0) - sd $v1, ((16 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $v1, REG_OFFSET(16)($a0) /* set our $sp */ - sd $t0, ((29 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $t0, REG_OFFSET(29)($a0) /* $gp is copied as $s1 */ - sd $gp, ((17 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $gp, REG_OFFSET(17)($a0) /* set our $ra */ - sd $t9, ((31 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $t9, REG_OFFSET(31)($a0) /* set our $pc */ sd $a1, MCONTEXT_PC($a0) diff --git a/arch/mips64/setcontext.S b/arch/mips64/setcontext.S index c300f20..cd55f36 100644 --- a/arch/mips64/setcontext.S +++ b/arch/mips64/setcontext.S @@ -23,28 +23,28 @@ FUNC(__setcontext) move $v0, $a0 /* load the registers */ - ld $a0, ((4 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a1, ((5 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a2, ((6 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a3, ((7 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a4, ((8 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a5, ((9 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a6, ((10 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a7, ((11 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $a0, REG_OFFSET(4)($v0) + ld $a1, REG_OFFSET(5)($v0) + ld $a2, REG_OFFSET(6)($v0) + ld $a3, REG_OFFSET(7)($v0) + ld $a4, REG_OFFSET(8)($v0) + ld $a5, REG_OFFSET(9)($v0) + ld $a6, REG_OFFSET(10)($v0) + ld $a7, REG_OFFSET(11)($v0) - ld $s0, ((16 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s1, ((17 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s2, ((18 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s3, ((19 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s4, ((20 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s5, ((21 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s6, ((22 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s7, ((23 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $s0, REG_OFFSET(16)($v0) + ld $s1, REG_OFFSET(17)($v0) + ld $s2, REG_OFFSET(18)($v0) + ld $s3, REG_OFFSET(19)($v0) + ld $s4, REG_OFFSET(20)($v0) + ld $s5, REG_OFFSET(21)($v0) + ld $s6, REG_OFFSET(22)($v0) + ld $s7, REG_OFFSET(23)($v0) - ld $gp, ((28 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $sp, ((29 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $fp, ((30 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $ra, ((31 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $gp, REG_OFFSET(28)($v0) + ld $sp, REG_OFFSET(29)($v0) + ld $fp, REG_OFFSET(30)($v0) + ld $ra, REG_OFFSET(31)($v0) ld $t9, (MCONTEXT_PC)($v0) move $v0, $zero diff --git a/arch/mips64/swapcontext.S b/arch/mips64/swapcontext.S index 2968c61..9d04635 100644 --- a/arch/mips64/swapcontext.S +++ b/arch/mips64/swapcontext.S @@ -27,19 +27,19 @@ FUNC(__swapcontext) PUSH_FRAME(__swapcontext) /* set registers */ - sd $s0, ((16 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s1, ((17 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s2, ((18 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s3, ((19 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s4, ((20 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s5, ((21 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s6, ((22 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $s7, ((23 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $s0, REG_OFFSET(16)($a0) + sd $s1, REG_OFFSET(17)($a0) + sd $s2, REG_OFFSET(18)($a0) + sd $s3, REG_OFFSET(19)($a0) + sd $s4, REG_OFFSET(20)($a0) + sd $s5, REG_OFFSET(21)($a0) + sd $s6, REG_OFFSET(22)($a0) + sd $s7, REG_OFFSET(23)($a0) - sd $a2, ((28 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $a3, ((29 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $a4, ((30 * REG_SZ) + MCONTEXT_GREGS)($a0) - sd $ra, ((31 * REG_SZ) + MCONTEXT_GREGS)($a0) + sd $a2, REG_OFFSET(28)($a0) + sd $a3, REG_OFFSET(29)($a0) + sd $a4, REG_OFFSET(30)($a0) + sd $ra, REG_OFFSET(31)($a0) sd $ra, (MCONTEXT_PC)($a0) /* copy new context address in $a1 to stack */ @@ -49,28 +49,28 @@ FUNC(__swapcontext) ld $v0, A1_OFFSET($sp) /* load the registers */ - ld $a0, ((4 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a1, ((5 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a2, ((6 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a3, ((7 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a4, ((8 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a5, ((9 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a6, ((10 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $a7, ((11 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $a0, REG_OFFSET(4)($v0) + ld $a1, REG_OFFSET(5)($v0) + ld $a2, REG_OFFSET(6)($v0) + ld $a3, REG_OFFSET(7)($v0) + ld $a4, REG_OFFSET(8)($v0) + ld $a5, REG_OFFSET(9)($v0) + ld $a6, REG_OFFSET(10)($v0) + ld $a7, REG_OFFSET(11)($v0) - ld $s0, ((16 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s1, ((17 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s2, ((18 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s3, ((19 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s4, ((20 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s5, ((21 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s6, ((22 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $s7, ((23 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $s0, REG_OFFSET(16)($v0) + ld $s1, REG_OFFSET(17)($v0) + ld $s2, REG_OFFSET(18)($v0) + ld $s3, REG_OFFSET(19)($v0) + ld $s4, REG_OFFSET(20)($v0) + ld $s5, REG_OFFSET(21)($v0) + ld $s6, REG_OFFSET(22)($v0) + ld $s7, REG_OFFSET(23)($v0) - ld $gp, ((28 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $sp, ((29 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $fp, ((30 * REG_SZ) + MCONTEXT_GREGS)($v0) - ld $ra, ((31 * REG_SZ) + MCONTEXT_GREGS)($v0) + ld $gp, REG_OFFSET(28)($v0) + ld $sp, REG_OFFSET(29)($v0) + ld $fp, REG_OFFSET(30)($v0) + ld $ra, REG_OFFSET(31)($v0) ld $t9, (MCONTEXT_PC)($v0) move $v0, $zero