b75490f8fc
I've rebased the workaround-mx patch as follows. See:
commit 9a11cbf21a5078bcdb8db7584c44a9ee17020db4
Author: Nico Huber <nico.h@gmx.de>
Date: Fri Jan 13 01:19:07 2023 +0100
Let the flash context directly point to the used master
This change, now upstream in flashprog, made me have to do this in
the patch. I changed this:
flash->mst->spi.command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
to this:
flash->mst.spi->command(flash, sizeof(cmd), sizeof(buf), cmd, buf);
It should work fine. This update imports the following upstream
patches from flashprog:
* 5b4fdd1 z60_flashprog.rules: Add udev rule for CH347
* 72c9e40 meson: Check for CPU families with known raw mem access
* 3458220 platform/meson: Port pciutils/pci.h workaround to Meson
* f279762 platform/meson: Check for libi386 on NetBSD
* 14da5f7 README: Convert to Markdown
* 8ddea57 README: Document branching and release policy
* 2522456 util/list_yet_unsupported_chips.sh: Fix path
* cbf9c11 spi: Don't cross 16MiB boundaries with long writes
* 823a704 dediprog: Skip warning on first attempt to read device string
* e8463c8 dediprog: Revise prefix check for given programmer id
* 38af1a1 dediprog: Revise id matching
* 4661e7c amd_spi100: Use flashprog_read_chunked() for progress reporting
* cdcfda2 read_memmapped: Use flashprog_read_chunked() for progress reporting
* 7679b5c spi25: Replace spi_read_chunked() with more abstract version
* ca1c7fd spi25: Normalize parameters of spi_nbyte_read()
* e36e3dc dediprog: Use default_spi_write_256
* 522a86d linux_spi: Use default_spi_read()/_write_256()
* 806509b cli_classic: Turn progress reporting into a progress bar
* 842d678 libflashrom: Return progress state to the library user
* aa714dd flashprog.c: Let select_erase_functions() return byte count
* 2eed4cf serprog: Add SPI Mode and CS Mode commands
* 821a085 dediprog: Implement id reading for SF600 and later
* 274e655 dediprog: Read device string early
* 0057822 dediprog: Add protocol detection for SF700 & SF600Plus-G2
* fb176d2 dediprog: Use more general 4BA write mode for newer protocols
* 0ab5c3d dediprog: Split device type and version parsing
* bdef5c2 dediprog: Use unsigned conversions to parse device string
* 5262e29 dediprog: Try to request 32B device string (instead of 16B)
* e76e21f dediprog: Get rid of some unnecessary hex constants
* 5a09d1e udelay: Lower the sleep vs delay threshold
* 03ad4a4 linux_mtd: Provide no-op delay implementation
* 211c6ec serprog: Refine flushing before synchronization
* 383b7fe serprog: Test synchronicity before trying to synchronize
* d7318ea serprog: Move synchronicity test into separate function
* 9a11cbf Let the flash context directly point to the used master
* aabb3e0 writeprotect: Hook wp functions into the chip driver
* 89569d6 memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`
* 929d2e1 internal: Pass programmer context down into chipset enables
* 7c717c3 internal: Pass programmer context down into board enables
* e3a2688 Pass programmer context to programmer->init()
* 2b66ad9 Start implementing struct flashprog_programmer
* 4517e92 memory_bus: Drop stale `size == 0` workaround and FIXME
* b197402 memory_bus: Split register mapping into own function
* 0e76d99 memory_bus: Move (un)map_flash_region into par master
* 9eec407 Perform default mapping only for respective chips
* 56b53dd wbsio_spi: Request memory mapping locally
* 5596190 it87spi: Request memory mapping locally
* 46449b4 spi25: Drop stale `bus == SPI` guards
* ab6b18f spi25: Move 4BA preparations into spi_prepare_4ba() hook
* 901fb95 Add prepare/finish_access() hooks for chip drivers
* a96aaa3 dediprog: Support long writes of 16MiB and more
* 1338936 Consider 4BA support when filtering erase functions
* 8d36db6 flashprog.8: Fix up serprog example
* d2ac303 flashprog.8: document new serprog cs parameter
* d1b9153 chipset_enable.c: Add Genoa to mendocino entry
Signed-off-by: Leah Rowe <leah@libreboot.org>
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| include | ||
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| util | ||
| .gitignore | ||
| COPYING | ||
| README.md | ||
| build | ||
| projectname | ||
| update | ||
README.md
Canoeboot
Find canoeboot documentation at https://canoeboot.org/
The canoeboot project provides
libre boot
firmware that initializes the hardware (e.g. memory controller, CPU,
peripherals) on specific Intel/AMD x86 and ARM targets, which
then starts a bootloader for your operating system. Linux/BSD are
well-supported. It replaces proprietary BIOS/UEFI firmware. Help is available
via #canoeboot IRC
on Libera IRC.
Canoeboot is maintained in parallel with Libreboot, by the same developer. Strictly speaking, it is a fork of Libreboot, but with a twist:
Canoeboot is provided for the purists who absolutely wish to have no proprietary software of any kind. Regardless of any other firmware that exists outside of it, the boot flash on your system will be entirely free software if you install Canoeboot on it. That includes a complete lack of CPU microcode updates, as per FSF policy.
More specifically: Canoeboot is engineered to comply with the GNU Free System Distribution Guidelines. It has, as of November 2023 releases, been strictly audited by FSF licensing staff (Craig Topham lead the audit), and it is listed on the FSF's own Free Software Directory.
Libreboot previously complied with that same policy, but changed to a different one permitting binary blobs in limited circumstances, so as to support more newer machines. Canoeboot is, then, a continuation of the traditional Libreboot project prior to that policy change. Some users still want it, so, Canoeboot releases are rigoriously maintained, re-basing on newer Libreboot releases over time, just like how, say, Trisquel, re-bases itself on each new Ubuntu release.
Project goals
- Obviously, support as much hardware as possible (within the limitations imposed by GNU FSDG, and using what coreboot happens to have in its source tree - Canoeboot also heavily patches coreboot, sometimes adding new mainboards out-of-tree).
- Make coreboot easy to use. Coreboot is notoriously difficult to install, due to an overall lack of user-focused documentation and support. Most people will simply give up before attempting to install coreboot. Canoeboot's automated build system and user-friendly installation instructions solves this problem.
Canoeboot attempts to bridge this divide by providing a build system automating much of the coreboot image creation and customization. Secondly, the project produces documentation aimed at non-technical users. Thirdly, the project attempts to provide excellent user support via IRC.
Canoeboot already comes with a payload (GRUB), flashprog and other needed parts. Everything is fully integrated, in a way where most of the complicated steps that are otherwise required, are instead done for the user in advance.
You can download ROM images for your canoeboot system and install them without having to build anything from source. If, however, you are interested in building your own image, the build system makes it relatively easy to do so.
Not a coreboot fork!
Canoeboot is not a fork of coreboot. Every so often, the project re-bases on the latest version of coreboot, by virtue of maintaining sync with Libreboot releases (minus un-GNU parts), with the number of custom patches in use minimized. Tested, stable (static) releases are then provided in Canoeboot, based on specific coreboot revisions.
LICENSE FOR THIS README
It's just a README file. This README file is released under the terms of the Creative Commons Zero license, version 1.0 of the license, which you can read here:
https://creativecommons.org/publicdomain/zero/1.0/legalcode.txt
The documentation in Canoeboot will use a mix of other licenses, so you should check that for more information.