57 lines
2.0 KiB
Diff
57 lines
2.0 KiB
Diff
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From 412f1d68c610f69384b156f09f0b326af984b7cc Mon Sep 17 00:00:00 2001
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From: Bill XIE <persmule@hardenedlinux.org>
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Date: Sat, 7 Oct 2023 01:32:51 +0800
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Subject: [PATCH 1/2] drivers/pc80/rtc/option.c: Stop resetting CMOS during s3
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resume
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After commit e12b313844da ("drivers/pc80/rtc/option.c: Allow CMOS
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defaults to extend to bank 1"), Thinkpad X200 with
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CONFIG(STATIC_OPTION_TABLE) can no longer resume from s3 (detected via
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bisect).
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Further inspection shows that DRAM training result of GM45 is stored
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in CMOS above 128 bytes in raminit_read_write_training.c, for s3 resume
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to restore, but it will be erased by sanitize_cmos(), which now clears
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both bank 0 and bank 1, leaving only "untrained" result restored, so s3
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resume will fail.
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However, resetting CMOS seems unnecessary during s3 resume. Now,
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cmos_need_reset will be negated when acpi_is_wakeup_s3() returns true.
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Tested: Thinkpad X200 with CONFIG(STATIC_OPTION_TABLE) can resume from
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s3 again with these changes.
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Change-Id: I533e83f3b95f327b0e24f4d750f8812325b7770b
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Signed-off-by: Bill XIE <persmule@hardenedlinux.org>
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Reviewed-on: https://review.coreboot.org/c/coreboot/+/78288
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Reviewed-by: Jonathon Hall <jonathon.hall@puri.sm>
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Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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---
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src/drivers/pc80/rtc/option.c | 4 +++-
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1 file changed, 3 insertions(+), 1 deletion(-)
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diff --git a/src/drivers/pc80/rtc/option.c b/src/drivers/pc80/rtc/option.c
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index e8e2345133..e6cfa175ad 100644
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--- a/src/drivers/pc80/rtc/option.c
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+++ b/src/drivers/pc80/rtc/option.c
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@@ -1,5 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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+#include <acpi/acpi.h>
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#include <console/console.h>
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#include <string.h>
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#include <cbfs.h>
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@@ -200,7 +201,8 @@ void sanitize_cmos(void)
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{
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const unsigned char *cmos_default;
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const bool cmos_need_reset =
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- CONFIG(STATIC_OPTION_TABLE) || cmos_error() || !cmos_lb_cks_valid();
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+ (CONFIG(STATIC_OPTION_TABLE) || cmos_error() || !cmos_lb_cks_valid())
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+ && !acpi_is_wakeup_s3();
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size_t length = 128;
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size_t i;
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--
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2.39.2
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