1557 lines
83 KiB
Diff
1557 lines
83 KiB
Diff
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From dac71d8ed89f1f1d295157aa62c678e35a320222 Mon Sep 17 00:00:00 2001
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From: Iru Cai <mytbk920423@gmail.com>
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Date: Tue, 5 Mar 2019 16:27:36 +0800
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Subject: [PATCH] mb/hp: Add Elitebook 8560w as an HP Sandy/Ivy Bridge laptop
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variant
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Change-Id: I15181792b1efa45a2a94d78e43c6257da1acf950
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Signed-off-by: Iru Cai <mytbk920423@gmail.com>
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---
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Documentation/mainboard/hp/8560w.md | 82 +++++++
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Documentation/mainboard/hp/8560w_flash.webp | Bin 0 -> 51432 bytes
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Documentation/mainboard/index.md | 1 +
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src/mainboard/hp/snb_ivb_laptops/Kconfig | 10 +-
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src/mainboard/hp/snb_ivb_laptops/Kconfig.name | 3 +
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.../variants/8560w/board_info.txt | 7 +
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.../variants/8560w/early_init.c | 36 +++
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.../hp/snb_ivb_laptops/variants/8560w/gpio.c | 224 ++++++++++++++++++
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.../snb_ivb_laptops/variants/8560w/hda_verb.c | 25 ++
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.../variants/8560w/overridetree.cb | 51 ++++
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10 files changed, 438 insertions(+), 1 deletion(-)
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create mode 100644 Documentation/mainboard/hp/8560w.md
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create mode 100644 Documentation/mainboard/hp/8560w_flash.webp
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create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
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create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
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create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
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create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
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create mode 100644 src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
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diff --git a/Documentation/mainboard/hp/8560w.md b/Documentation/mainboard/hp/8560w.md
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new file mode 100644
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index 0000000000..cc35a0be1f
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--- /dev/null
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+++ b/Documentation/mainboard/hp/8560w.md
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@@ -0,0 +1,82 @@
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+# HP EliteBook 8560w
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+
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+This page describes how to run coreboot on the [HP EliteBook 8560w].
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+
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+## Required proprietary blobs
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+
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+- Intel Firmware Descriptor, ME and GbE firmware
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+- EC: please read [HP Laptops with KBC1126 Embedded Controller](hp_kbc1126_laptops)
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+
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+## Flashing instructions
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+
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+HP EliteBook 8560w has an 8MiB SOIC-8 flash chip on the bottom of the
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+mainboard. You just need to remove the service cover, and use an SOIC-8
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+clip to read and flash the chip.
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+
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+
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+
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+```eval_rst
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++---------------------+------------+
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+| Type | Value |
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++=====================+============+
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+| Socketed flash | no |
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++---------------------+------------+
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+| Model | MX25L6406E |
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++---------------------+------------+
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+| Size | 8 MiB |
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++---------------------+------------+
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+| Package | SOIC-8 |
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++---------------------+------------+
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+| Write protection | no |
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++---------------------+------------+
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+| Dual BIOS feature | no |
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++---------------------+------------+
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+| In circuit flashing | yes |
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++---------------------+------------+
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+| Internal flashing | yes |
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++---------------------+------------+
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+```
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+
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+## Untested
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+
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+- mainboards with 4 memory slots
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+
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+## Working
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+
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+- i7-2720QM, 8G+8G
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+- Arch Linux boot from SeaBIOS payload
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+- EHCI debug: the port is beside the eSATA port
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+- SATA
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+- eSATA
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+- USB2 and USB3
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+- keyboard
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+- Gigabit Ethernet
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+- WLAN
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+- WWAN
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+- VGA and DisplayPort
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+- audio
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+- EC ACPI
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+- Using `me_cleaner`
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+- dock: PS/2 keyboard, USB, DisplayPort
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+- TPM
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+- S3 suspend/resume
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+
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+## Technology
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+
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+```eval_rst
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++------------------+--------------------------------------------------+
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+| Northbridge | :doc:`../../northbridge/intel/sandybridge/index` |
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++------------------+--------------------------------------------------+
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+| Southbridge | bd82x6x |
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++------------------+--------------------------------------------------+
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+| CPU | model_206ax |
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++------------------+--------------------------------------------------+
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+| Super I/O | SMSC LPC47n217 |
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++------------------+--------------------------------------------------+
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+| EC | SMSC KBC1126 |
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++------------------+--------------------------------------------------+
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+| Coprocessor | Intel Management Engine |
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++------------------+--------------------------------------------------+
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+```
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+
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+[HP EliteBook 8560w]: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
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diff --git a/Documentation/mainboard/hp/8560w_flash.webp b/Documentation/mainboard/hp/8560w_flash.webp
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new file mode 100644
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index 0000000000000000000000000000000000000000..b8295bc6e920a4c59c4282e419200569672e8267
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GIT binary patch
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zFw5r-Iat{9p^(=)PTv)dRiQ;269bUyDtNB)ZqJ>@@k8_}*JJ#liH*-T?=%sx!Cj#e
|
||
|
|
z|H(78)H-RY+Bix`K7Raiwcx)huG)l5SUu)a9y0M|-&uPnTxN$}5%sZy0|y_e!A~6d
|
||
|
|
zo^RCRsA^g8V9s-jl{$c0Xui*OymQEy@gPnS$j1)~8YNuTEkmncI{yS&x;Jxekz%-1
|
||
|
|
z-R-hUQFsb_s8J1?RdkpO&|luGmQeMW$*j;}*_N^Ep$#!^QTlhq{T{<mynD%TmTr5w
|
||
|
|
zTr^S9Wo~tt<rLeT7_oM-zq~&S=Wftg2fR8Ksg9`^=Vtf<%z0)U*Vs~JH_}D--GcD>
|
||
|
|
zs_{RZ@93rL`t#7l`g^K*B!$OkoZ6n`NEzg3-+IBGRrAr?l$FO@0$8q3p+rBd((COT
|
||
|
|
zID`*fYr^E03jO69cm~6-Ii3U$ga~lgn(H(<Ujo_TI#)p(*{kVmFPFp}NVELCR$>$0
|
||
|
|
zrg67LhJZytuRHZm{Z1#<zTH)kUjHvZ1(ZN&$>&UuB1rh*-FjyzULm$3SO4fr-fcVh
|
||
|
|
zeVM(iMPuZxZ63usCqONV_jbVpuC4JJl0U|Ub*PAmm~hjXeQdMKZ^K=;08;GL0AOhf
|
||
|
|
zE@0;TnBmaX*xb|+s>ZA{Nx5l5BRnfuY<9Nl<_-ffRR3a-&^!jqdyvDbgWFThko^eb
|
||
|
|
z{1z$(T)SKs4W%bshT<j+ZGW?Wj3q#q>Ey+RFMlXAC(ujDw6$bgjX+l}J`8}xUaAU)
|
||
|
|
zcT+mMq87VcO|09J)G<#%%G#uI87*yAZN4Lq*@IUj0yn=p;rG+d!N$RwqJjbsgyNM@
|
||
|
|
z=J!-`3SF?1FS^_QHTE}Ax63_jV%(7>+cnqLvh^`}kIH3g3O3ka0j*s^OkjKIxWg*o
|
||
|
|
zs7j{E<S<Z*uxN=z3RQX{0<Y|J2qkwVc#TD_vqXm{<ZzmPD3!(9o2)GUeHRguHz4xd
|
||
|
|
z?%w@=7U|NV+tx7f5R=@7_&_kRu7=(?R&zca8s;UP#r4(1wWdPOT&eSV=-lu7xDI0?
|
||
|
|
zLJdbi-4(g1PrS?PeEy=ynSiO2G8dn6-7spu#gT_hD93P|ETZeHLx#_GT-8}B%UDNo
|
||
|
|
zUCO?Tx`mB6+-?pCIAW3U;%!YRocl?y#}QO;v^Wfe<n3y0*^E2?-{{B3Gag<MPBM5_
|
||
|
|
z(@Zih?peVPPdr`>eoiLw%I{T(P5sS{?OAlMqEJl~W)epxj#$Zl!E1))>2o)Y)!Tt_
|
||
|
|
zLwpN-LyY{H0k5oGr%})QcH0vf_S-|X-9tui!nKMOx7Ej^$1Xz&Udf414Eh#}i{&b#
|
||
|
|
z4J6d!U}hPU;RRIhLFeMMEQ307lvvB+mYn_Fae){cGPWKkR$UT04jX=jr-q#v*LnA#
|
||
|
|
zDdQ9E{_J)<9gyBx4Cw<6AYKWO%diEUAPtb~tKeA~))=*Ua5&!_(Imd8-p3|8+$v$8
|
||
|
|
z7tmI>G1`Mv1EJpDnz7^4sF!vbpnP2`U>qnpn}<^~a597z6DSjxL}IiHHp9=OfmD&X
|
||
|
|
z(=hBw=72skK{1Nx^~pww$T5#!yvWq%Ocw8ypjK>@X);Oxb6=?ekSaqPJ89*wth|N_
|
||
|
|
zv-Xy#*8Q_H+5=)ic5N?=-B0*XIgf?mW;|=w2$aHgnY`jYsAX^6^C8^df2LOEMCpva
|
||
|
|
z)V<5n5U%#7zTrrA*N_X}*{FjrA?5TJ_fS#4X9RoRmdu%M+G!xaAmc=9+48@3$6wmQ
|
||
|
|
z8e6PCUDt@XztquQw6-~pbZOKgJhmyF+_e!>5M8Zy!Lk6KEtR)Xrk|N|y(e*+U5s8v
|
||
|
|
zf^|n^gtCak0#dZuJ)~MW8t<Gk|M7MHhq>{WW1S8t=hq=wWsCnF1m@42J6cV@wk$s%
|
||
|
|
z`+B}Qo=Z`{an0m(rlMOyZ)EFx2c|t|ky6epm`z)ALDQtyem<+8Y^PBl%7~P%yoDV0
|
||
|
|
zD~*9x=C?h57t4!6Cq^??1SS_M<sx0tALj1Dm$;=Bm})(=!6)slk+Cm;8#0cCroG@u
|
||
|
|
zJi%uI<6}w~#H1Mh?=`)MKKukZD=C`@D|NcwyXhG}GWGj6t|mR2^%*S|->Zvj&BNtT
|
||
|
|
z<EG@0O-8-8{VEjkZHWv%7M@4q*yJB^Fo7T^#QW7WqcrdB8YA{zi?H5BX!k{|0;&g*
|
||
|
|
z2kh#R{La`xVC_!1`VX5Er5OF^g%hh$_yNh*OOpma<;vOWp|4i7B6*QV<URUEiC;BT
|
||
|
|
z@;9|4oJ<nwC&W;)I!R4#1!M`|R~hM;cpIx6fR4i8yPr)W5%i5@;_33L_f_qQh%&5m
|
||
|
|
z*0nY^!-><6-8bvA?aG+@$~&ZSy8hfnDW6N>+L{b38BUO@0re;K_<j%PvkP1flq$Rq
|
||
|
|
zftok+&dtQ1rzZ$w#-D6@P_+CIwpB)vriS(}3*K$tk^9~bTFFZ5kF(ueipSWI=ow`E
|
||
|
|
z%!U!Zx6<Ghk8M5Md%mvbO5l!y##cCv(NEJ#fQOUQfPi7EL~_SFvMx}xEnJZ=88dIv
|
||
|
|
z$hXw>?U<V$d}`w--0l*7CdYWV71!iageFbRn8qZ-2TT&t2dqQAEswHS$#OQ?1#R|f
|
||
|
|
zOA@!<3G0mw#=Fg}qlL`s#SLLDhJtFo4?$ybVZUGz-<>}%B9{J-044|7_-`ZcMhwm{
|
||
|
|
z18@|M_2$<11|oci#_mr!B>I|IuVfFzgN&M%?plS9No`r;e=)9n$iwtKhaUXZYmI(G
|
||
|
|
zYbM4XVIXe|eo#FHa1v^#2ls%M?Tk|<)k$0_Ir`GMT&l;TL#h^4E#<4XT#W9=dThF}
|
||
|
|
zks~HXVxWK+3;|wfm-3I}Y>q)4aZmo#U`aDLp@dR9d!1SdkZ)j6XM#BA`qpjL^j8si
|
||
|
|
zHsg5*ASgU>$;Z;UIW-_g(By)7_7vMmWtL_|EJ5QVj1T_+Ra8)<mqO`QHx0k<1B3W+
|
||
|
|
zUWxFWG1qljK;}I<Qa>?V2~!$lxvxn0P>v?n<WM#(kyj_LBxCtj(%5uYzP(RdhT41W
|
||
|
|
zJ<?eWmr(7@42m(1Mh-d=Lcth<8LY0iFqsFEzyY~)!(*J%Nj>hdY}4ts{y{=kJC=|J
|
||
|
|
zB~CGn9E|$bX0sd+cwbDuxk*jJ%&yW#+a$@{P6+p-l^aH++vUE8Qyra^{i3@>%^ag8
|
||
|
|
zS=;hF*DvuDCBKF>AOYCAd&UNTyvjeNXvyL`O*c#fOSZVwBY<VhV;~NsmON&;4~QDY
|
||
|
|
z_4kD@WIAiXZ8Q-NFvtl3pCIw;iY#XtP2TTIGr(ZDf;lkLAsO|rPw-ZaVd6V!16#p-
|
||
|
|
zsLG}mIZ}Q3uPKh+GI}r573_Zq(mO~l=0dB2q<}G=wCXmZ&U36^hk6`Ap69|g8vw~E
|
||
|
|
zgOApu)ijMWPtp9lI~#RGPmrg|7oNhpv#aj6eWi!WLk-yrSXZm&>FlqNOhgVc39fjz
|
||
|
|
zam!6Ed41|LM!Rjq<9G~*u05)we`kQfns_As>0$@ud98cPDWyk^OGfI!m6T@$R2#KO
|
||
|
|
z(8kckGM)<)`t#DdfUjxgmi^Rh#~*x>aZ@r7xiq%I<TA8`D91o^nscwrdB!_Z0;G}W
|
||
|
|
z102>yp`+U0wq}o&=t04)<B~Jq9cmU%dILZl()eD-1O;=S_Nt}6muCd(WU{(&8M0M!
|
||
|
|
z2+6LrCf3d~>?pOlV{8E=?PecLF%+5_F<KoUU=14J`}u$Udao_6nIJoKTd|)-$MvqC
|
||
|
|
z&m?0%UTKRn;BrV5xk|aoOQyiU1k&%64?sEnYE-m>ILZwc<mbDQn(9ofMt3%TwF#B>
|
||
|
|
z`x-ey=RNji3$$oc5I@`F`PEr0Ev}_=_IJ11c9{3{uAk0uFk3&3W&nQCaK{Asq<eG}
|
||
|
|
zB!t<PG?*78838@_8e!6H$>pE^`mJ_c`hEhK$&S@rsGGAXw2Mz!G4-SxExvLdPi|{d
|
||
|
|
zW=S2rX{9}lE>ssY#+3rAe)>(vjPcT=8a2BdG_oJWR*_%Ny)niB<m7e~Sq|kz(XAAW
|
||
|
|
zE4j}?YRoGPYqlf`bNn>8bMmP?^{0g>G1DU%rjUr(W=xO{MS7>gSb?zD9|PtPC+5by
|
||
|
|
zw5H?N>t4I?o)7q^wIUdgGVa|s4x<M@)|9q2qx?ncdUVoS$1IR6ZTE)p9D#X0*&mHn
|
||
|
|
z)vWFHi+dY#vUwZJl#Gm!qZ@x-)Z1&PxRz+zc>^E?PEdx=Zkf#_ld?j$OD)Q@EXn1%
|
||
|
|
zqV@FSAHpeI>Qs4My8i&0Bzvc`S#9C6Zy*dTTQ~!6P7h8EdFPF1k}rpzTk!sLP-CwO
|
||
|
|
zWFzzfyV<o#ZJ>(a$ltyvKPr>*@#$PA#O%T0*r46NH);VR9U}Js0D6VEsza8WcDMWn
|
||
|
|
zj{%R4dG@bh_)ig<&rxh}yBLqgyoNEA{C~#1tKjGY&s4zw0G2@hwCAzFdKB?SVs9-P
|
||
|
|
zHQC5L%~ggn_+EKEPh(fz+DmzN9PKzB!lQ)c0Y0_M9fv*2R~mJ?l~EYpGm-~dn$p_9
|
||
|
|
zurpf3(jK{9e!r=!OaX32YQ4|N<+||Rzl9C9t#QTK+`B%3rb>fttSWPyga)`T8|e1h
|
||
|
|
zZPl!n$`DGVGJ%E2uJvV*M7U%3b6k&)U5Z<Rax>}lsH4oMX3gbi3!E`fNEy$yMYkOO
|
||
|
|
zbz#5~E(cLjo;O!<fhE1MxDv2<&_x+@yyH0RJxQk6>ArP{n{fckAUMY#F{qQSDkx@=
|
||
|
|
zA}FrGeAnO~dQ1^wTOTa_@y{b1)n|(Yk4kW2$1HMjK>2~sVL;062^@Zv5k~rs^=OQ+
|
||
|
|
z2RI(|#vgy!59LfmAxA=SRJ^rWZU8y`=l;qn{&Szss*Zf~-+2E3&_y63C{I1<jJfMm
|
||
|
|
zo((q@M3u_+qi_EJuBN~yntD(KUSB+s^``6u)Zh<J)PxN5pkyL2qvaSh74Pd(o|FIx
|
||
|
|
z&w4;YtF^E(gVw!g;eF<p2ZygMF7+6#W_yt$hH$3<3?6vvURQyUP9)K5l^HbdkEDg(
|
||
|
|
zp2`5%ZOG&JqwUh2HRY24((6`?qazQnj(-~YuW=m-rDtq)G^~sEv;LAkko!)VDyshg
|
||
|
|
zY3a<X%8V`t{ykoE@n+@*x3P{Z$Zj3wl2`J`z~MmdeJjlaxA%|dOma?gb48G)QcYR2
|
||
|
|
G|JeY!zvB4-
|
||
|
|
|
||
|
|
literal 0
|
||
|
|
HcmV?d00001
|
||
|
|
|
||
|
|
diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md
|
||
|
|
index 519d88873c..a6be27ae09 100644
|
||
|
|
--- a/Documentation/mainboard/index.md
|
||
|
|
+++ b/Documentation/mainboard/index.md
|
||
|
|
@@ -84,6 +84,7 @@ The boards in this section are not real mainboards, but emulators.
|
||
|
|
- [HP Sure Start](hp/hp_sure_start.md)
|
||
|
|
- [EliteBook 2170p](hp/2170p.md)
|
||
|
|
- [EliteBook 2560p](hp/2560p.md)
|
||
|
|
+- [EliteBook 8560w](hp/8560w.md)
|
||
|
|
- [EliteBook 8760w](hp/8760w.md)
|
||
|
|
- [EliteBook Folio 9480m](hp/folio_9480m.md)
|
||
|
|
- [EliteBook 820 G2](hp/elitebook_820_g2.md)
|
||
|
|
diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig b/src/mainboard/hp/snb_ivb_laptops/Kconfig
|
||
|
|
index f0bd55f64f..f180bca87f 100644
|
||
|
|
--- a/src/mainboard/hp/snb_ivb_laptops/Kconfig
|
||
|
|
+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig
|
||
|
|
@@ -69,6 +69,12 @@ config BOARD_HP_8470P
|
||
|
|
select SOUTHBRIDGE_INTEL_C216
|
||
|
|
select SUPERIO_SMSC_LPC47N217
|
||
|
|
|
||
|
|
+config BOARD_HP_8560W
|
||
|
|
+ select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
|
||
|
|
+ select BOARD_ROMSIZE_KB_8192
|
||
|
|
+ select SOUTHBRIDGE_INTEL_BD82X6X
|
||
|
|
+ select SUPERIO_SMSC_LPC47N217
|
||
|
|
+
|
||
|
|
config BOARD_HP_8770W
|
||
|
|
select BOARD_HP_SNB_IVB_LAPTOPS_COMMON
|
||
|
|
select BOARD_ROMSIZE_KB_16384
|
||
|
|
@@ -118,6 +124,7 @@ config VARIANT_DIR
|
||
|
|
default "2760p" if BOARD_HP_2760P
|
||
|
|
default "8460p" if BOARD_HP_8460P
|
||
|
|
default "8470p" if BOARD_HP_8470P
|
||
|
|
+ default "8560w" if BOARD_HP_8560W
|
||
|
|
default "8770w" if BOARD_HP_8770W
|
||
|
|
default "folio_9470m" if BOARD_HP_FOLIO_9470M
|
||
|
|
default "probook_6360b" if BOARD_HP_PROBOOK_6360B
|
||
|
|
@@ -130,6 +137,7 @@ config MAINBOARD_PART_NUMBER
|
||
|
|
default "EliteBook 2760p" if BOARD_HP_2760P
|
||
|
|
default "EliteBook 8460p" if BOARD_HP_8460P
|
||
|
|
default "EliteBook 8470p" if BOARD_HP_8470P
|
||
|
|
+ default "EliteBook 8560w" if BOARD_HP_8560W
|
||
|
|
default "EliteBook 8770w" if BOARD_HP_8770W
|
||
|
|
default "EliteBook Folio 9470m" if BOARD_HP_FOLIO_9470M
|
||
|
|
default "ProBook 6360b" if BOARD_HP_PROBOOK_6360B
|
||
|
|
@@ -146,7 +154,7 @@ config VGA_BIOS_ID
|
||
|
|
config USBDEBUG_HCD_INDEX
|
||
|
|
int
|
||
|
|
default 0 if BOARD_HP_2170P || BOARD_HP_FOLIO_9470M
|
||
|
|
- default 1 if BOARD_HP_2560P || BOARD_HP_2760P || BOARD_HP_8460P
|
||
|
|
+ default 1 if BOARD_HP_2560P || BOARD_HP_2760P || BOARD_HP_8460P || BOARD_HP_8560W
|
||
|
|
default 2 if BOARD_HP_2570P || BOARD_HP_8470P || BOARD_HP_8770W
|
||
|
|
default 1 if BOARD_HP_PROBOOK_6360B # FIXME: check this
|
||
|
|
default 2 if BOARD_HP_REVOLVE_810_G1 # FIXME: check this
|
||
|
|
diff --git a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
|
||
|
|
index f72e0f622a..fdd1b93bd7 100644
|
||
|
|
--- a/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
|
||
|
|
+++ b/src/mainboard/hp/snb_ivb_laptops/Kconfig.name
|
||
|
|
@@ -18,6 +18,9 @@ config BOARD_HP_8460P
|
||
|
|
config BOARD_HP_8470P
|
||
|
|
bool "EliteBook 8470p"
|
||
|
|
|
||
|
|
+config BOARD_HP_8560W
|
||
|
|
+ bool "EliteBook 8560w"
|
||
|
|
+
|
||
|
|
config BOARD_HP_8770W
|
||
|
|
bool "EliteBook 8770w"
|
||
|
|
|
||
|
|
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
|
||
|
|
new file mode 100644
|
||
|
|
index 0000000000..558e904a94
|
||
|
|
--- /dev/null
|
||
|
|
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/board_info.txt
|
||
|
|
@@ -0,0 +1,7 @@
|
||
|
|
+Category: laptop
|
||
|
|
+Board URL: https://support.hp.com/us-en/product/hp-elitebook-8560w-mobile-workstation/5071171
|
||
|
|
+ROM package: SOIC-8
|
||
|
|
+ROM protocol: SPI
|
||
|
|
+ROM socketed: n
|
||
|
|
+Flashrom support: y
|
||
|
|
+Release year: 2011
|
||
|
|
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
|
||
|
|
new file mode 100644
|
||
|
|
index 0000000000..20c4b68911
|
||
|
|
--- /dev/null
|
||
|
|
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/early_init.c
|
||
|
|
@@ -0,0 +1,36 @@
|
||
|
|
+/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||
|
|
+
|
||
|
|
+#include <bootblock_common.h>
|
||
|
|
+#include <southbridge/intel/bd82x6x/pch.h>
|
||
|
|
+#include <superio/smsc/lpc47n217/lpc47n217.h>
|
||
|
|
+#include <ec/hp/kbc1126/ec.h>
|
||
|
|
+
|
||
|
|
+#define SERIAL_DEV PNP_DEV(0x4e, LPC47N217_SP1)
|
||
|
|
+
|
||
|
|
+const struct southbridge_usb_port mainboard_usb_ports[] = {
|
||
|
|
+ { 1, 1, 0 }, /* USB0 */
|
||
|
|
+ { 1, 1, 0 }, /* USB1 */
|
||
|
|
+ { 1, 1, 1 }, /* eSATA */
|
||
|
|
+ { 1, 1, 1 }, /* camera */
|
||
|
|
+ { 0, 0, 2 },
|
||
|
|
+ { 1, 0, 2 }, /* bluetooth */
|
||
|
|
+ { 0, 0, 3 },
|
||
|
|
+ { 1, 0, 3 },
|
||
|
|
+ { 0, 1, 4 },
|
||
|
|
+ { 1, 1, 4 }, /* WWAN */
|
||
|
|
+ { 1, 0, 5 },
|
||
|
|
+ { 1, 0, 5 }, /* dock */
|
||
|
|
+ { 1, 0, 6 },
|
||
|
|
+ { 1, 0, 6 },
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+void bootblock_mainboard_early_init(void)
|
||
|
|
+{
|
||
|
|
+ lpc47n217_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
|
||
|
|
+ kbc1126_enter_conf();
|
||
|
|
+ kbc1126_mailbox_init();
|
||
|
|
+ kbc1126_kbc_init();
|
||
|
|
+ kbc1126_ec_init();
|
||
|
|
+ kbc1126_pm1_init();
|
||
|
|
+ kbc1126_exit_conf();
|
||
|
|
+}
|
||
|
|
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
|
||
|
|
new file mode 100644
|
||
|
|
index 0000000000..560d668d6f
|
||
|
|
--- /dev/null
|
||
|
|
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/gpio.c
|
||
|
|
@@ -0,0 +1,224 @@
|
||
|
|
+/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||
|
|
+
|
||
|
|
+#include <southbridge/intel/common/gpio.h>
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
|
||
|
|
+ .gpio0 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio1 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio2 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio3 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio4 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio5 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio6 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio7 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio8 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio9 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio10 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio11 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio12 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio13 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio14 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio15 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio16 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio17 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio18 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio19 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio20 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio21 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio22 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio23 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio24 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio25 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio26 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio27 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio28 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio29 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio30 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio31 = GPIO_MODE_NATIVE,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
|
||
|
|
+ .gpio0 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio1 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio2 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio3 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio4 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio6 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio7 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio8 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio10 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio11 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio13 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio14 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio15 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio16 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio17 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio19 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio21 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio22 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio23 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio24 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio27 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio28 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio29 = GPIO_DIR_OUTPUT,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
|
||
|
|
+ .gpio0 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio11 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio17 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio22 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio24 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio27 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio28 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio29 = GPIO_LEVEL_HIGH,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
|
||
|
|
+ .gpio24 = GPIO_RESET_RSMRST,
|
||
|
|
+ .gpio30 = GPIO_RESET_RSMRST,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
|
||
|
|
+ .gpio1 = GPIO_INVERT,
|
||
|
|
+ .gpio3 = GPIO_INVERT,
|
||
|
|
+ .gpio6 = GPIO_INVERT,
|
||
|
|
+ .gpio7 = GPIO_INVERT,
|
||
|
|
+ .gpio10 = GPIO_INVERT,
|
||
|
|
+ .gpio13 = GPIO_INVERT,
|
||
|
|
+ .gpio14 = GPIO_INVERT,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
|
||
|
|
+ .gpio32 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio33 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio34 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio35 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio36 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio37 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio38 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio39 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio40 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio41 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio42 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio43 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio44 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio45 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio46 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio47 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio48 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio49 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio50 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio51 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio52 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio53 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio54 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio55 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio56 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio57 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio58 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio59 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio60 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio61 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio62 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio63 = GPIO_MODE_NATIVE,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
|
||
|
|
+ .gpio33 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio34 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio35 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio37 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio38 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio39 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio44 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio46 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio48 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio49 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio50 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio51 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio52 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio53 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio54 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio55 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio57 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio60 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio61 = GPIO_DIR_OUTPUT,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
|
||
|
|
+ .gpio33 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio35 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio37 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio49 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio53 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio57 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio60 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio61 = GPIO_LEVEL_HIGH,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
|
||
|
|
+ .gpio64 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio65 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio66 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio67 = GPIO_MODE_NATIVE,
|
||
|
|
+ .gpio68 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio69 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio70 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio71 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio72 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio73 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio74 = GPIO_MODE_GPIO,
|
||
|
|
+ .gpio75 = GPIO_MODE_NATIVE,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
|
||
|
|
+ .gpio68 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio69 = GPIO_DIR_INPUT,
|
||
|
|
+ .gpio70 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio71 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio72 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio73 = GPIO_DIR_OUTPUT,
|
||
|
|
+ .gpio74 = GPIO_DIR_OUTPUT,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
|
||
|
|
+ .gpio68 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio70 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio71 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio72 = GPIO_LEVEL_LOW,
|
||
|
|
+ .gpio73 = GPIO_LEVEL_HIGH,
|
||
|
|
+ .gpio74 = GPIO_LEVEL_HIGH,
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+const struct pch_gpio_map mainboard_gpio_map = {
|
||
|
|
+ .set1 = {
|
||
|
|
+ .mode = &pch_gpio_set1_mode,
|
||
|
|
+ .direction = &pch_gpio_set1_direction,
|
||
|
|
+ .level = &pch_gpio_set1_level,
|
||
|
|
+ .blink = &pch_gpio_set1_blink,
|
||
|
|
+ .invert = &pch_gpio_set1_invert,
|
||
|
|
+ .reset = &pch_gpio_set1_reset,
|
||
|
|
+ },
|
||
|
|
+ .set2 = {
|
||
|
|
+ .mode = &pch_gpio_set2_mode,
|
||
|
|
+ .direction = &pch_gpio_set2_direction,
|
||
|
|
+ .level = &pch_gpio_set2_level,
|
||
|
|
+ .reset = &pch_gpio_set2_reset,
|
||
|
|
+ },
|
||
|
|
+ .set3 = {
|
||
|
|
+ .mode = &pch_gpio_set3_mode,
|
||
|
|
+ .direction = &pch_gpio_set3_direction,
|
||
|
|
+ .level = &pch_gpio_set3_level,
|
||
|
|
+ .reset = &pch_gpio_set3_reset,
|
||
|
|
+ },
|
||
|
|
+};
|
||
|
|
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
|
||
|
|
new file mode 100644
|
||
|
|
index 0000000000..2f5469fc84
|
||
|
|
--- /dev/null
|
||
|
|
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/hda_verb.c
|
||
|
|
@@ -0,0 +1,25 @@
|
||
|
|
+/* SPDX-License-Identifier: GPL-2.0-or-later */
|
||
|
|
+
|
||
|
|
+#include <device/azalia_device.h>
|
||
|
|
+
|
||
|
|
+const u32 cim_verb_data[] = {
|
||
|
|
+ 0x111d7605, /* Codec Vendor / Device ID: IDT */
|
||
|
|
+ 0x103c1631, /* Subsystem ID */
|
||
|
|
+
|
||
|
|
+ 11, /* Number of 4 dword sets */
|
||
|
|
+ AZALIA_SUBVENDOR(0, 0x103c1631),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x0a, 0x40f000f0),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x0b, 0x0421401f),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x0c, 0x04a11020),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x0e, 0x40f000f0),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x0f, 0x40f000f0),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x10, 0x40f000f0),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x11, 0x90a60130),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x1f, 0x40f000f0),
|
||
|
|
+ AZALIA_PIN_CFG(0, 0x20, 0x40f000f0),
|
||
|
|
+};
|
||
|
|
+
|
||
|
|
+const u32 pc_beep_verbs[0] = {};
|
||
|
|
+
|
||
|
|
+AZALIA_ARRAY_SIZES;
|
||
|
|
diff --git a/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
|
||
|
|
new file mode 100644
|
||
|
|
index 0000000000..4264270ad0
|
||
|
|
--- /dev/null
|
||
|
|
+++ b/src/mainboard/hp/snb_ivb_laptops/variants/8560w/overridetree.cb
|
||
|
|
@@ -0,0 +1,51 @@
|
||
|
|
+# SPDX-License-Identifier: GPL-2.0-or-later
|
||
|
|
+
|
||
|
|
+chip northbridge/intel/sandybridge
|
||
|
|
+ register "spd_addresses" = "{0x50, 0x51, 0x52, 0x53}"
|
||
|
|
+ device domain 0 on
|
||
|
|
+ subsystemid 0x103c 0x1631 inherit
|
||
|
|
+ device pci 01.0 on end # PCIe Bridge for discrete graphics
|
||
|
|
+ device pci 02.0 off end # Internal graphics
|
||
|
|
+
|
||
|
|
+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
|
||
|
|
+ register "docking_supported" = "0"
|
||
|
|
+ register "gen1_dec" = "0x007c0201"
|
||
|
|
+ register "gen2_dec" = "0x000c0101"
|
||
|
|
+ register "gen3_dec" = "0x00fcfe01"
|
||
|
|
+ register "gen4_dec" = "0x000402e9"
|
||
|
|
+ register "gpi6_routing" = "2"
|
||
|
|
+ register "pcie_hotplug_map" = "{ 0, 1, 1, 0, 0, 0, 0, 0 }"
|
||
|
|
+ # HDD(0), ODD(1), eSATA(4)
|
||
|
|
+ register "sata_port_map" = "0x3b"
|
||
|
|
+
|
||
|
|
+ device pci 1c.0 on end # PCIe Port #1, WWAN
|
||
|
|
+ device pci 1c.1 on end # PCIe Port #2, ExpressCard
|
||
|
|
+ device pci 1c.2 on end # PCIe Port #3, SD/MMC
|
||
|
|
+ device pci 1c.3 on end # PCIe Port #4, WLAN
|
||
|
|
+ device pci 1c.4 off end # PCIe Port #5
|
||
|
|
+ device pci 1c.5 off end # PCIe Port #6
|
||
|
|
+ device pci 1c.6 off end # PCIe Port #7
|
||
|
|
+ device pci 1c.7 on end # PCIe Port #8, NEC USB 3.0 Host Controller
|
||
|
|
+ device pci 1f.0 on # LPC bridge
|
||
|
|
+ chip ec/hp/kbc1126
|
||
|
|
+ register "ec_data_port" = "0x60"
|
||
|
|
+ register "ec_cmd_port" = "0x64"
|
||
|
|
+ register "ec_ctrl_reg" = "0xca"
|
||
|
|
+ register "ec_fan_ctrl_value" = "0x6b"
|
||
|
|
+ device pnp ff.1 off end
|
||
|
|
+ end
|
||
|
|
+ chip superio/smsc/lpc47n217
|
||
|
|
+ device pnp 4e.3 on # Parallel
|
||
|
|
+ io 0x60 = 0x378
|
||
|
|
+ irq 0x70 = 7
|
||
|
|
+ end
|
||
|
|
+ device pnp 4e.4 on # COM1
|
||
|
|
+ io 0x60 = 0x3f8
|
||
|
|
+ irq 0x70 = 4
|
||
|
|
+ end
|
||
|
|
+ device pnp 4e.5 off end # COM2
|
||
|
|
+ end
|
||
|
|
+ end
|
||
|
|
+ end
|
||
|
|
+ end
|
||
|
|
+end
|
||
|
|
--
|
||
|
|
2.43.0
|
||
|
|
|