ich9m mainboards: use pre-assembled ifd/gbe files

This cuts down on build time, and it will allow libreboot
to remove large chunks of code.

these ifd/gbe configs are just binary-encoded config files,
in a format well-understood. they can easily be opened up
and displayed, using ich9show or ifdtool, and manipulated
by these tools; bincfg can generate them from scratch, and
nvmutil can change mac addresses, for example.

so, do this and remove from lbmk the following:

* ich9utils (which contains ich9gen) - not needed anymore
* code in lbmk for handling ich9gen and insertions; the
  coreboot build system is now used, for this same purpose,
  so remove such code from lbmk

this results in a massive code size reduction (thousands of
lines) in lbmk; smaller when only looking at the build
system, but much larger when you consider that ich9utils
is also removed (about 3k sloc)

Signed-off-by: Leah Rowe <leah@libreboot.org>
btrfsvols
Leah Rowe 2023-09-03 19:55:58 +01:00
parent af8d8cda7d
commit 19efdf9eeb
71 changed files with 440 additions and 5175 deletions

View File

@ -133,6 +133,7 @@ CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
CONFIG_BOARD_DELL_E6400=y CONFIG_BOARD_DELL_E6400=y
# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
@ -147,13 +148,15 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_VGA_BIOS_FILE="../../pciroms/pci10de,06eb.rom" CONFIG_VGA_BIOS_FILE="../../pciroms/pci10de,06eb.rom"
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -306,7 +309,13 @@ CONFIG_EC_DELL_MEC5035=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -560,6 +569,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -131,6 +131,7 @@ CONFIG_USBDEBUG_HCD_INDEX=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
CONFIG_BOARD_DELL_E6400=y CONFIG_BOARD_DELL_E6400=y
# CONFIG_BOARD_DELL_LATITUDE_E6430 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set # CONFIG_BOARD_DELL_OPTIPLEX_9010 is not set
# CONFIG_BOARD_DELL_PRECISION_T1650 is not set # CONFIG_BOARD_DELL_PRECISION_T1650 is not set
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000 CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
@ -145,13 +146,15 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_VGA_BIOS_FILE="../../pciroms/pci10de,06eb.rom" CONFIG_VGA_BIOS_FILE="../../pciroms/pci10de,06eb.rom"
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Latitude E6400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -304,7 +307,13 @@ CONFIG_EC_DELL_MEC5035=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -556,6 +565,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,13 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd_nogbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,6 +352,11 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -604,6 +610,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,13 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd_nogbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad R500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,6 +350,11 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -600,6 +606,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T400"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad T500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -351,7 +353,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -605,6 +613,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W500"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -601,6 +609,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -606,6 +614,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -347,7 +349,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -602,6 +610,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -606,6 +614,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -347,7 +349,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -602,6 +610,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -606,6 +614,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X200"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -347,7 +349,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -602,6 +610,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -606,6 +614,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/16_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -347,7 +349,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -602,6 +610,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -606,6 +614,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/4_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -347,7 +349,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -602,6 +610,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -147,12 +147,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -349,7 +351,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -606,6 +614,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -145,12 +145,14 @@ CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_SPI_FLASH_WINBOND=y CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_IFD_BIN_PATH="../../blobs/ich9m/8_ifd.bin"
CONFIG_GBE_BIN_PATH="../../blobs/ich9m/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_CARDBUS_PLUGIN_SUPPORT=y CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_GIGADEVICE=y CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_STMICRO=y CONFIG_SPI_FLASH_STMICRO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301" CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad X301"
# CONFIG_HAVE_IFD_BIN is not set CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=8 CONFIG_PCIEXP_HOTPLUG_BUSES=8
CONFIG_PCIEXP_HOTPLUG_MEM=0x800000 CONFIG_PCIEXP_HOTPLUG_MEM=0x800000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000 CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x10000000
@ -347,7 +349,13 @@ CONFIG_EC_LENOVO_PMH7=y
# #
# Intel Firmware # Intel Firmware
# #
# CONFIG_HAVE_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_ARCH_X86=y CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y CONFIG_ARCH_VERSTAGE_X86_32=y
@ -602,6 +610,8 @@ CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SPI_FLASH is not set # CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set # CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set # CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set # CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging # end of Debugging

View File

@ -1,42 +0,0 @@
#!/usr/bin/env sh
# Copyright (C) 2020, 2023 Leah Rowe <info@minifree.org>
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
[ "x${DEBUG+set}" = 'xset' ] && set -v
set -u -e
. "include/err.sh"
ich9gen="util/ich9utils/ich9gen"
main()
{
[ -f "${ich9gen}" ] || ./handle make file -b ich9utils || \
err "ich9utils make"
[ ! -f "${ich9gen}" ] && err "ich9gen doesn't exist"
[ -d "descriptors/ich9m/" ] || mkdir -p "descriptors/ich9m/" || \
err "can't create directory: descriptors/ich9m"
rm -f descriptors/ich9m/* || err "rm-rf"
(
cd descriptors/ich9m/ || err "cd2"
../../"${ich9gen}" || err "ich9gen"
)
}
main $@

View File

@ -162,7 +162,7 @@ purge_files()
err "purge_files: ${p}: cannot clean the source trees" err "purge_files: ${p}: cannot clean the source trees"
done done
for p in bios_extract flashrom grub ich9utils uefitool; do for p in bios_extract flashrom grub uefitool; do
./handle make file -c "${p}" || \ ./handle make file -c "${p}" || \
err "purge_files: !./handle make file -c ${p}" err "purge_files: !./handle make file -c ${p}"
done done
@ -170,7 +170,7 @@ purge_files()
./handle make file -c "memtest86plus/build${p}" || \ ./handle make file -c "memtest86plus/build${p}" || \
err "purge_files: cannot clean memtest86+ build${p}" err "purge_files: cannot clean memtest86+ build${p}"
done done
for p in "nvmutil" "ich9utils" "spkmodem_recv" "e6400-flash-unlock"; do for p in "nvmutil" "spkmodem_recv" "e6400-flash-unlock"; do
make clean -C "util/${p}" || \ make clean -C "util/${p}" || \
err "purge_files 2: !make clean -C ${util}/p" err "purge_files 2: !make clean -C ${util}/p"
done done

View File

@ -310,23 +310,6 @@ modify_coreboot_rom()
count=64k conv=notrunc || \ count=64k conv=notrunc || \
err "modify_coreboot_rom: can't write i945 bootblock" err "modify_coreboot_rom: can't write i945 bootblock"
fi fi
for romsize in 4 8 16; do
ifddir="descriptors/ich9m"
for bs in "4" "12"; do
ifdgbe="${ifddir}/ich9fdnogbe_${romsize}m.bin"
cmpstr="${romsize}MiB ICH9 IFD NOGBE NOR flash"
if [ "${bs}" = "12" ]; then
cmpstr="${romsize}MiB ICH9 IFD NOR flash"
ifdgbe="${ifddir}/ich9fdgbe_${romsize}m.bin"
fi
[ "${romtype}" = "${cmpstr}" ] || continue
[ -f "${ifdgbe}" ] || ./build descriptors ich9m || \
err "modify_coreboot_rom: can't create ich9m ifd"
dd if="${ifdgbe}" of="${rompath}" bs=${bs}k count=1 \
conv=notrunc || \
err "modify_coreboot_rom: can't insert ich9m ifd"
done
done
rm -f "${tmprom}" || \ rm -f "${tmprom}" || \
err "modify_coreboot_rom: cannot remove tmprom" err "modify_coreboot_rom: cannot remove tmprom"
} }

View File

@ -44,7 +44,6 @@ main()
done done
[ -z "${project}" ] && err "project name not specified" [ -z "${project}" ] && err "project name not specified"
[ "${project}" = "ich9utils" ] && project="util/ich9utils"
handle_dependencies handle_dependencies
run_make_command run_make_command

View File

@ -1,674 +0,0 @@
GNU GENERAL PUBLIC LICENSE
Version 3, 29 June 2007
Copyright (C) 2007 Free Software Foundation, Inc. <https://fsf.org/>
Everyone is permitted to copy and distribute verbatim copies
of this license document, but changing it is not allowed.
Preamble
The GNU General Public License is a free, copyleft license for
software and other kinds of works.
The licenses for most software and other practical works are designed
to take away your freedom to share and change the works. By contrast,
the GNU General Public License is intended to guarantee your freedom to
share and change all versions of a program--to make sure it remains free
software for all its users. We, the Free Software Foundation, use the
GNU General Public License for most of our software; it applies also to
any other work released this way by its authors. You can apply it to
your programs, too.
When we speak of free software, we are referring to freedom, not
price. Our General Public Licenses are designed to make sure that you
have the freedom to distribute copies of free software (and charge for
them if you wish), that you receive source code or can get it if you
want it, that you can change the software or use pieces of it in new
free programs, and that you know you can do these things.
To protect your rights, we need to prevent others from denying you
these rights or asking you to surrender the rights. Therefore, you have
certain responsibilities if you distribute copies of the software, or if
you modify it: responsibilities to respect the freedom of others.
For example, if you distribute copies of such a program, whether
gratis or for a fee, you must pass on to the recipients the same
freedoms that you received. You must make sure that they, too, receive
or can get the source code. And you must show them these terms so they
know their rights.
Developers that use the GNU GPL protect your rights with two steps:
(1) assert copyright on the software, and (2) offer you this License
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For the developers' and authors' protection, the GPL clearly explains
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Some devices are designed to deny users access to install or run
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Finally, every program is threatened constantly by software patents.
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The precise terms and conditions for copying, distribution and
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How to Apply These Terms to Your New Programs
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<one line to give the program's name and a brief idea of what it does.>
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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Also add information on how to contact you by electronic and paper mail.
If the program does terminal interaction, make it output a short
notice like this when it starts in an interactive mode:
<program> Copyright (C) <year> <name of author>
This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
This is free software, and you are welcome to redistribute it
under certain conditions; type `show c' for details.
The hypothetical commands `show w' and `show c' should show the appropriate
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You should also get your employer (if you work as a programmer) or school,
if any, to sign a "copyright disclaimer" for the program, if necessary.
For more information on this, and how to apply and follow the GNU GPL, see
<https://www.gnu.org/licenses/>.
The GNU General Public License does not permit incorporating your program
into proprietary programs. If your program is a subroutine library, you
may consider it more useful to permit linking proprietary applications with
the library. If this is what you want to do, use the GNU Lesser General
Public License instead of this License. But first, please read
<https://www.gnu.org/licenses/why-not-lgpl.html>.

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@ -1,105 +0,0 @@
#
# Makefile for ich9deblob utility from libreboot project
#
# Copyright (C) 2014, 2015, 2019 Leah Rowe <info@minifree.org>
#
# This program is free software: you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation, either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program. If not, see <http://www.gnu.org/licenses/>.
#
CC=gcc
FORCEC99=-std=c99
CFLAGS=-I. -Wall -Wextra -g $(FORCEC99)
NOLINKER=-c
all: ich9deblob ich9gen demefactory ich9show
ich9deblob: obj/ich9deblob.o obj/common/descriptor_gbe.o \
obj/descriptor/descriptor.o obj/gbe/gbe.o obj/common/x86compatibility.o
$(CC) $(CFLAGS) obj/ich9deblob.o obj/common/descriptor_gbe.o \
obj/common/x86compatibility.o obj/descriptor/descriptor.o obj/gbe/gbe.o \
-o ich9deblob
ich9gen: obj/ich9gen.o obj/ich9gen/mkdescriptor.o obj/ich9gen/mkgbe.o \
obj/common/descriptor_gbe.o \
obj/descriptor/descriptor.o obj/gbe/gbe.o obj/common/x86compatibility.o
$(CC) $(CFLAGS) obj/ich9gen.o obj/ich9gen/mkdescriptor.o obj/ich9gen/mkgbe.o \
obj/common/descriptor_gbe.o \
obj/common/x86compatibility.o obj/descriptor/descriptor.o obj/gbe/gbe.o \
-o ich9gen
demefactory: obj/demefactory.o obj/common/descriptor_gbe.o \
obj/descriptor/descriptor.o obj/gbe/gbe.o obj/common/x86compatibility.o
$(CC) $(CFLAGS) obj/demefactory.o obj/common/descriptor_gbe.o \
obj/common/x86compatibility.o obj/descriptor/descriptor.o obj/gbe/gbe.o \
-o demefactory
ich9show: obj/ich9show.o obj/common/descriptor_gbe.o \
obj/descriptor/descriptor.o obj/gbe/gbe.o obj/common/x86compatibility.o
$(CC) $(CFLAGS) obj/ich9show.o obj/common/descriptor_gbe.o \
obj/common/x86compatibility.o obj/descriptor/descriptor.o obj/gbe/gbe.o \
-o ich9show
# for demefactory
# ----------------------------------------------------------------------
obj/demefactory.o:
$(CC) $(CFLAGS) $(NOLINKER) src/demefactory.c -o obj/demefactory.o
# for ich9deblob
# ----------------------------------------------------------------------
obj/ich9deblob.o:
$(CC) $(CFLAGS) $(NOLINKER) src/ich9deblob.c -o obj/ich9deblob.o
# for ich9show
# ----------------------------------------------------------------------
obj/ich9show.o:
$(CC) $(CFLAGS) $(NOLINKER) src/ich9show.c -o obj/ich9show.o
# for ich9gen
# ----------------------------------------------------------------------
obj/ich9gen.o:
$(CC) $(CFLAGS) $(NOLINKER) src/ich9gen.c -o obj/ich9gen.o
obj/ich9gen/mkdescriptor.o:
$(CC) $(CFLAGS) $(NOLINKER) src/ich9gen/mkdescriptor.c -o obj/ich9gen/mkdescriptor.o
obj/ich9gen/mkgbe.o:
$(CC) $(CFLAGS) $(NOLINKER) src/ich9gen/mkgbe.c -o obj/ich9gen/mkgbe.o
# for demefactory, ich9deblob and ich9gen:
# ----------------------------------------------------------------------
obj/common/descriptor_gbe.o:
$(CC) $(CFLAGS) $(NOLINKER) src/common/descriptor_gbe.c -o obj/common/descriptor_gbe.o
obj/common/x86compatibility.o:
$(CC) $(CFLAGS) $(NOLINKER) src/common/x86compatibility.c -o obj/common/x86compatibility.o
obj/descriptor/descriptor.o:
$(CC) $(CFLAGS) $(NOLINKER) src/descriptor/descriptor.c -o obj/descriptor/descriptor.o
obj/gbe/gbe.o:
$(CC) $(CFLAGS) $(NOLINKER) src/gbe/gbe.c -o obj/gbe/gbe.o
# make clean
# ----------------------------------------------------------------------
clean:
rm -Rf ich9deblob ich9gen demefactory ich9show obj/*.o obj/*/*.o *.bin

View File

@ -1,90 +0,0 @@
/*
* descriptor_gbe.c
* This file is part of the ich9deblob utility from the libreboot project
*
* Purpose: common descriptor/gbe functions used by ich9deblob
*
* Copyright (C) 2014, 2015 Leah Rowe <info@minifree.org>
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "descriptor_gbe.h"
/*
* create 12KiB file with descriptor, and then gbe immediately after.
*/
int notCreatedDescriptorGbeFile(struct DESCRIPTORREGIONRECORD descriptorStruct, struct GBEREGIONRECORD_8K gbeStruct8k, char* fileName)
{
FILE* fileStream = NULL;
/* delete old file before continuing */
remove(fileName);
/* open new file for writing the descriptor+gbe */
fileStream = fopen(fileName, "ab");
/* write the descriptor region into the first part */
if (DESCRIPTORREGIONSIZE != fwrite((uint8_t*)&descriptorStruct, 1, sizeof(descriptorStruct), fileStream))
{
printf("\nerror: writing descriptor region failed\n");
return 1;
}
/* add gbe to the end of the file */
if (GBEREGIONSIZE_8K != fwrite((uint8_t*)&gbeStruct8k, 1, sizeof(gbeStruct8k), fileStream))
{
printf("\nerror: writing GBe region failed\n");
return 1;
}
fclose(fileStream);
printf("descriptor and gbe successfully written to the file: %s\n", fileName);
printf("Now do: dd if=%s of=libreboot.rom bs=1 count=12k conv=notrunc\n", fileName);
printf("(in other words, add the modified descriptor+gbe to your ROM image)\n\n");
return 0;
}
/*
* create 4KiB file with descriptor
*/
int notCreated4kDescriptorFile(struct DESCRIPTORREGIONRECORD descriptorStruct, char* fileName)
{
FILE* fileStream = NULL;
/* delete old file before continuing */
remove(fileName);
/* open new file for writing the descriptor+gbe */
fileStream = fopen(fileName, "ab");
/* write the descriptor region into the first part */
if (DESCRIPTORREGIONSIZE != fwrite((uint8_t*)&descriptorStruct, 1, sizeof(descriptorStruct), fileStream))
{
printf("\nerror: writing descriptor region failed\n");
return 1;
}
fclose(fileStream);
printf("descriptor successfully written to the file: %s\n", fileName);
printf("Now do: dd if=%s of=yourrom.rom bs=1 count=4k conv=notrunc\n", fileName);
printf("(in other words, add the modified descriptor to your ROM image)\n\n");
return 0;
}

View File

@ -1,37 +0,0 @@
/*
* gbe_descriptor.h
* This file is part of the ich9deblob utility from the libreboot project
*
* Purpose: header file for descriptor_gbe.c
*
* Copyright (C) 2014, 2015 Leah Rowe <info@minifree.org>
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef COMMON_DESCRIPTOR_GBE_H
#define COMMON_DESCRIPTOR_GBE_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "../descriptor/descriptor.h" /* structs describing what's in the descriptor region */
#include "../gbe/gbe.h" /* structs describing what's in the gbe region */
int notCreatedDescriptorGbeFile(struct DESCRIPTORREGIONRECORD descriptorStruct, struct GBEREGIONRECORD_8K gbeStruct8k, char* fileName);
int notCreated4kDescriptorFile(struct DESCRIPTORREGIONRECORD descriptorStruct, char* fileName);
#endif

View File

@ -1,161 +0,0 @@
/*
* x86compatibility.c
* This file is part of the ich9deblob utility from the libreboot project
*
* Purpose: compiler/cpu compatibility checks. ich9deblob is not portable, yet.
*
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
* Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "x86compatibility.h"
/*
* ---------------------------------------------------------------------
* x86 compatibility checking:
* ---------------------------------------------------------------------
*/
/* fail if struct size is incorrect */
int structSizesIncorrect(struct DESCRIPTORREGIONRECORD descriptorDummy, struct GBEREGIONRECORD_8K gbe8kDummy)
{
unsigned int descriptorRegionStructSize = sizeof(descriptorDummy);
unsigned int gbeRegion8kStructSize = sizeof(gbe8kDummy);
/* check compiler bit-packs in a compatible way. basically, it is expected that this code will be used on x86 */
if (DESCRIPTORREGIONSIZE != descriptorRegionStructSize){
printf("\nerror: compiler incompatibility: descriptor struct length is %i bytes (should be %i)\n", descriptorRegionStructSize, DESCRIPTORREGIONSIZE);
return 1;
}
if (GBEREGIONSIZE_8K != gbeRegion8kStructSize){
printf("\nerror: compiler incompatibility: gbe struct length is %i bytes (should be %i)\n", gbeRegion8kStructSize, GBEREGIONSIZE_8K);
return 1;
}
return 0;
}
/* fail if members are presented in the wrong order */
int structMembersWrongOrder()
{
int i;
struct DESCRIPTORREGIONRECORD descriptorDummy;
uint8_t *meVsccTablePtr = (uint8_t*)&descriptorDummy.meVsccTable;
/* These do not use bitfields. */
descriptorDummy.meVsccTable.jid0 = 0x01020304; /* unsigned int 32-bit */
descriptorDummy.meVsccTable.vscc0 = 0x10203040; /* unsigned int 32-bit */
descriptorDummy.meVsccTable.jid1 = 0x11223344; /* unsigned int 32-bit */
descriptorDummy.meVsccTable.vscc1 = 0x05060708; /* unsigned int 32-bit */
descriptorDummy.meVsccTable.jid2 = 0x50607080; /* unsigned int 32-bit */
descriptorDummy.meVsccTable.vscc2 = 0x55667788; /* unsigned int 32-bit */
descriptorDummy.meVsccTable.padding[0] = 0xAA; /* unsigned char 8-bit */
descriptorDummy.meVsccTable.padding[1] = 0xBB; /* unsigned char 8-bit */
descriptorDummy.meVsccTable.padding[2] = 0xCC; /* unsigned char 8-bit */
descriptorDummy.meVsccTable.padding[3] = 0xDD; /* unsigned char 8-bit */
/*
* Look from the top down, and concatenate the unsigned ints but
* with each unsigned in little endian order.
* Then, concatenate the unsigned chars in big endian order. (in the padding array)
*
* combined, these should become:
* 01020304 10203040 11223344 05060708 50607080 55667788 AA BB CC DD (ignore this. big endian. just working it out manually:)
* 04030201 40302010 44332211 08070605 80706050 88776655 AA BB CC DD (ignore this. not byte-separated, just working it out:)
* 04 03 02 01 40 30 20 10 44 33 22 11 08 07 06 05 80 70 60 50 88 77 66 55 AA BB CC DD <-- it should match this
*/
if (
!
(
*meVsccTablePtr == 0x04 && *(meVsccTablePtr+1) == 0x03 && *(meVsccTablePtr+2) == 0x02 && *(meVsccTablePtr+3) == 0x01
&& *(meVsccTablePtr+4) == 0x40 && *(meVsccTablePtr+5) == 0x30 && *(meVsccTablePtr+6) == 0x20 && *(meVsccTablePtr+7) == 0x10
&& *(meVsccTablePtr+8) == 0x44 && *(meVsccTablePtr+9) == 0x33 && *(meVsccTablePtr+10) == 0x22 && *(meVsccTablePtr+11) == 0x11
&& *(meVsccTablePtr+12) == 0x08 && *(meVsccTablePtr+13) == 0x07 && *(meVsccTablePtr+14) == 0x06 && *(meVsccTablePtr+15) == 0x05
&& *(meVsccTablePtr+16) == 0x80 && *(meVsccTablePtr+17) == 0x70 && *(meVsccTablePtr+18) == 0x60 && *(meVsccTablePtr+19) == 0x50
&& *(meVsccTablePtr+20) == 0x88 && *(meVsccTablePtr+21) == 0x77 && *(meVsccTablePtr+22) == 0x66 && *(meVsccTablePtr+23) == 0x55
&& *(meVsccTablePtr+24) == 0xAA && *(meVsccTablePtr+25) == 0xBB && *(meVsccTablePtr+26) == 0xCC && *(meVsccTablePtr+27) == 0xDD
)
) {
printf("\nStruct member order check (descriptorDummy.meVsccTable) with junk/dummy data:");
printf("\nShould be: 04 03 02 01 40 30 20 10 44 33 22 11 08 07 06 05 80 70 60 50 88 77 66 55 aa bb cc dd ");
printf("\nAnd it is: ");
for (i = 0; i < 28; i++) {
printf("%02x ", *(meVsccTablePtr + i));
}
printf("\nIncorrect order.\n");
return 1;
}
return 0;
}
/* fail if bit fields are presented in the wrong order */
int structBitfieldWrongOrder()
{
int i;
struct DESCRIPTORREGIONRECORD descriptorDummy;
uint8_t *flMap0Ptr = (uint8_t*)&descriptorDummy.flMaps.flMap0;
descriptorDummy.flMaps.flMap0.FCBA = 0xA2; /* :8 --> 10100010 */
descriptorDummy.flMaps.flMap0.NC = 0x02; /* :2 --> 10 */
descriptorDummy.flMaps.flMap0.reserved1 = 0x38; /* :6 --> 111000 */
descriptorDummy.flMaps.flMap0.FRBA = 0xD2; /* :8 --> 11010010 */
descriptorDummy.flMaps.flMap0.NR = 0x05; /* :3 --> 101 */
descriptorDummy.flMaps.flMap0.reserved2 = 0x1C; /* :5 --> 11100 */
/*
* Look from the top bottom up, and concatenate the binary strings.
* Then, convert the 8-bit groups to hex and reverse the (8-bit)byte order
*
* combined, these should become (in memory), in binary:
* 10100010 11100010 11010010 11100101
* or in hex:
* A2 E2 D2 E5
*/
if (!(*flMap0Ptr == 0xA2 && *(flMap0Ptr+1) == 0xE2 && *(flMap0Ptr+2) == 0xD2 && *(flMap0Ptr+3) == 0xE5))
{
printf("\nBitfield order check (descriptorDummy.flMaps.flMaps0) with junk/dummy data:");
printf("\nShould be: a2 e2 d2 e5 ");
printf("\nAnd it is: ");
for (i = 0; i < 4; i++) {
printf("%02x ", *(flMap0Ptr + i));
}
printf("\nIncorrect order.\n");
return 1;
}
return 0;
}
/* Compatibility checks. This version of ich9deblob is not yet porable. */
int systemOrCompilerIncompatible(struct DESCRIPTORREGIONRECORD descriptorStruct, struct GBEREGIONRECORD_8K gbeStruct8k)
{
if (structSizesIncorrect(descriptorStruct, gbeStruct8k)) return 1;
if (IS_BIG_ENDIAN) {
printf("big endian not supported\n");
return 1;
}
if (structBitfieldWrongOrder()) return 1;
if (structMembersWrongOrder()) return 1;
return 0;
}

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@ -1,42 +0,0 @@
/*
* x86compatibility.h
* This file is part of the ich9deblob utility from the libreboot project
*
* Purpose: keep gcc/make happy. no actual code here, just function definitions.
*
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
* Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef X86COMPATIBILITY_H
#define X86COMPATIBILITY_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
/* http://esr.ibiblio.org/?p=5095 */
#define IS_BIG_ENDIAN (*(uint16_t *)"\0\xff" < 0x100)
#include "../descriptor/descriptor.h" /* structs describing what's in the descriptor region */
#include "../gbe/gbe.h" /* structs describing what's in the gbe region */
int structSizesIncorrect(struct DESCRIPTORREGIONRECORD descriptorDummy, struct GBEREGIONRECORD_8K gbe8kDummy);
int structMembersWrongOrder();
int structBitfieldWrongOrder();
int systemOrCompilerIncompatible(struct DESCRIPTORREGIONRECORD descriptorStruct, struct GBEREGIONRECORD_8K gbeStruct8k);
#endif

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@ -1,141 +0,0 @@
/*
* demefactory.c
* This file is part of the demefactory utility from the libreboot project
*
* Purpose: disable ME on GM45 factory firmware, but leave region intact
* enable read-write on all regions
*
* Copyright (C) 2014, 2015 Leah Rowe <info@minifree.org>
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* demfactory utility - main
*/
#include "demefactory.h"
int main()
{
struct DESCRIPTORREGIONRECORD descriptorStruct;
uint8_t* descriptorBuffer = (uint8_t*)&descriptorStruct;
struct GBEREGIONRECORD_8K gbeStruct8k; /* not needed, except for compatibility checking */
char* romFilename = "factory.rom";
char* descriptorFilename = "demefactory_4kdescriptor.bin";
unsigned int bufferLength;
unsigned int romSize;
/*
* ------------------------------------------------------------------
* Compatibility checks. This version of ich9deblob is not yet portable.
* ------------------------------------------------------------------
*/
if (systemOrCompilerIncompatible(descriptorStruct, gbeStruct8k)) return 1;
/* If true, fail with error message */
/*
* ------------------------------------------------------------------
* Extract the descriptor region from the factory.rom dump
* ------------------------------------------------------------------
*/
FILE* fp = NULL;
fp = fopen(romFilename, "rb"); /* open factory.rom */
if (NULL == fp)
{
printf("\nerror: could not open %s\n", romFilename);
fclose(fp);
return 1;
}
printf("\n%s opened successfully\n", romFilename);
/*
* Get the descriptor region dump from the factory.rom
* (goes in factoryDescriptorBuffer variable)
*/
bufferLength = fread(descriptorBuffer, 1, DESCRIPTORREGIONSIZE, fp);
if (DESCRIPTORREGIONSIZE != bufferLength) //
{
printf("\nerror: could not read descriptor from %s (%i) bytes read\n", romFilename, bufferLength);
fclose(fp);
return 1;
}
printf("\ndescriptor region read successfully\n");
/* ------------------------------------------------- */
fseek(fp, 0L, SEEK_END);
romSize = ftell(fp);
printf("\n%s size: [%i] bytes\n", romFilename, romSize);
/* -------------------------------------------------- */
fclose(fp);
/* Debugging (before modification) */
printDescriptorRegionLocations(descriptorStruct, "Original");
/*
* ------------------------------------------------------------------
* Modify the descriptor region, ready to go in the modified factory.rom
* ------------------------------------------------------------------
*/
// Disable the ME/TPM:
descriptorStruct = descriptorDisableMe(descriptorStruct);
descriptorStruct = descriptorDisableTpm(descriptorStruct);
/* Host/CPU is allowed to read/write all regions. */
descriptorStruct = descriptorHostRegionsUnlocked(descriptorStruct);
/* The ME is disallowed read-write access to all regions
* (this is probably redundant, since the ME is already removed from libreboot) */
descriptorStruct = descriptorMeRegionsForbidden(descriptorStruct);
/* Debugging (after modifying the descriptor region) */
printDescriptorRegionLocations(descriptorStruct, "Modified");
/*
* ------------------------------------------------------------------
* Create the file with the modified descriptor inside
* ------------------------------------------------------------------
*/
printf("\n");
if (notCreated4kDescriptorFile(descriptorStruct, descriptorFilename)) {
return 1;
}
/*
* ------------------------------------------------------------------
* Generate ich9gen data (C code that will recreate the deactivatedME descriptor from scratch)
* ------------------------------------------------------------------
*/
/* Code for generating the Descriptor struct */
/* mkdescriptor.h */
if (notCreatedHFileForDescriptorCFile("mkdescriptor.h", "mkdescriptor.c")) {
return 1;
} /* and now mkdescriptor.c */
if (notCreatedCFileFromDescriptorStruct(descriptorStruct, "mkdescriptor.c", "mkdescriptor.h")) {
return 1;
}
printf("The modified descriptor region has also been dumped as src files: mkdescriptor.c, mkdescriptor.h\n\n");
return 0;
}

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@ -1,34 +0,0 @@
/*
* Copyright (C) 2015 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* Header file for demefactory.c */
#ifndef DEMEFACTORY_H
#define DEMEFACTORY_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "common/descriptor_gbe.h" /* common descriptor/gbe functions used by ich9deblob */
#include "common/x86compatibility.h" /* system/compiler compatibility checks. This code is not portable. */
#include "descriptor/descriptor.h" /* structs describing what's in the descriptor region */
#include "gbe/gbe.h" /* structs describing what's in the gbe region */
int main();
#endif

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/*
* descriptor/descriptor.h
* This file is part of the ich9deblob utility from the libreboot project
*
* Copyright (C) 2014, 2015, 2019 Leah Rowe <info@minifree.org>
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Purpose: provide struct representing descriptor region.
* Map actual buffers of this regions, directly to instances of these
* structs. This makes working with descriptor really easy.
*
* bit fields used, corresponding to datasheet. See links to datasheets
* and documentation in ich9deblob.c
*/
/*
* See docs/hardware/x200_remove_me.html for info plus links to datasheet (also linked below)
*
* Info about flash descriptor (read page 845 onwards):
* http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf
*/
#ifndef DESCRIPTORSTRUCT_H
#define DESCRIPTORSTRUCT_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "../gbe/gbe.h" /* Needed for GBEREGIONSIZE_4K/8K define */
/* size of the descriptor in bytes */
#define DESCRIPTORREGIONSIZE 0x1000
/* ROM image sizes in bytes */
#define ROMSIZE_512KB 0x80000
#define ROMSIZE_1MB 0x100000
#define ROMSIZE_2MB 0x200000
#define ROMSIZE_4MB 0x400000
#define ROMSIZE_8MB 0x800000
#define ROMSIZE_16MB 0x1000000
/*
* Related to the flash descriptor
* bits 12(0xC)-24(0x18) are represented for words found in the flash descriptor
* To manipulate these easily in C, we shift them by FLREGIONBITSHIFT and then shift them back when done
* (because this is how data is stored in the flash descriptor)
*/
#define FLREGIONBITSHIFT 0xC
/*
* ---------------------------------------------------------------------
* Descriptor struct representing the data
* ---------------------------------------------------------------------
*/
/* Flash Valid Signature Register */
struct FLVALSIG
{
/*
* 4 bytes.
* descriptor mode = 0FF0A55A (hex, big endian). Note: stored in ROM in little endian order.
* Anything else is considered invalid and will put the system in non-descriptor mode.
*/
uint32_t signature; /* Put 0x0FF0A55A here. confirmed in deblobbed_descriptor.bin */
};
/* */
struct FLMAP0
{
/* least signicant bits */
uint8_t FCBA : 8;
uint8_t NC : 2;
uint8_t reserved1 : 6;
uint8_t FRBA : 8;
uint8_t NR : 3;
uint8_t reserved2 : 5;
/* most significant bits. */
};
struct FLMAP1
{
/* least significant bits */
uint8_t FMBA : 8;
uint8_t NM : 3;
uint8_t reserved : 5;
uint8_t FISBA : 8;
uint8_t ISL : 8;
/* most significant bits */
};
struct FLMAP2
{
/* least significant bits */
uint8_t FMSBA : 8;
uint8_t MSL : 8;
uint16_t reserved : 16;
/* most significant bits */
};
/* Flash Map Registers */
struct FLMAPS
{
struct FLMAP0 flMap0;
struct FLMAP1 flMap1;
struct FLMAP2 flMap2;
};
/* Flash Components Register */
struct FLCOMP
{
/* least significant bits */
uint8_t component1Density : 3;
uint8_t component2Density : 3;
uint8_t reserved1 : 2;
uint8_t reserved2 : 8;
uint8_t reserved3 : 1;
uint8_t readClockFrequency : 3;
uint8_t fastReadSupport : 1;
uint8_t fastreadClockFrequency : 3;
uint8_t writeEraseClockFrequency : 3;
uint8_t readStatusClockFrequency : 3;
uint8_t reserved4 : 2;
/* most significant bits */
};
struct COMPONENTSECTIONRECORD
{
struct FLCOMP flcomp;
uint32_t flill;
uint32_t flpb;
uint8_t padding[36];
};
struct FLREG
{
/* least significant bits */
uint16_t BASE : 13;
uint16_t reserved1 : 3;
uint16_t LIMIT : 13;
uint16_t reserved2 : 3;
/* most significant bits */
};
/* Flash Descriptor Region Section */
/*
* Defines where all the regions begin/end.
* This is very important for disabling ME/AMT
*/
struct REGIONSECTIONRECORD
{
struct FLREG flReg0; /* Descriptor */
struct FLREG flReg1; /* BIOS */
struct FLREG flReg2; /* ME */
struct FLREG flReg3; /* Gbe */
struct FLREG flReg4; /* Platform */
uint8_t padding[12];
};
struct FLMSTR
{
/* least significant bits */
uint16_t requesterId : 16;
uint8_t fdRegionReadAccess : 1;
uint8_t biosRegionReadAccess : 1;
uint8_t meRegionReadAccess : 1;
uint8_t gbeRegionReadAccess : 1;
uint8_t pdRegionReadAccess : 1;
uint8_t reserved1 : 3; /* Must be zero, according to datasheet */
uint8_t fdRegionWriteAccess : 1;
uint8_t biosRegionWriteAccess : 1;
uint8_t meRegionWriteAccess : 1;
uint8_t gbeRegionWriteAccess : 1;
uint8_t pdRegionWriteAccess : 1;
uint8_t reserved2 : 3; /* Must be zero, according to datasheet */
/* most significant bits */
};
/* Master Access Section */
struct MASTERACCESSSECTIONRECORD
{
struct FLMSTR flMstr1; /* Flash Master 1 (Host CPU / BIOS) */
struct FLMSTR flMstr2; /* Flash Master 2 (ME) */
struct FLMSTR flMstr3; /* Flash Master 3 (Gbe) */
uint8_t padding[148];
};
struct ICHSTRAP0
{
/* least significant bits */
/* todo: add MeSmBus2Sel (boring setting) */
uint8_t meDisable : 1; /* If true, ME is disabled. */
uint8_t reserved1 : 6;
uint8_t tcoMode : 1; /* TCO Mode: (Legacy,TCO Mode) The TCO Mode, along with the BMCMODE strap, determines the behavior of the IAMT SmBus controller. */
uint8_t smBusAddress : 7; /* The ME SmBus 7-bit address. */
uint8_t bmcMode : 1; /* BMC mode: If true, device is in BMC mode. If Intel(R) AMT or ASF using Intel integrated LAN then this should be false. */
uint8_t tripPointSelect : 1; /* Trip Point Select: false the NJCLK input buffer is matched to 3.3v signal from the external PHY device, true is matched to 1.8v. */
uint8_t reserved2 : 2;
uint8_t integratedGbe : 1; /* Integrated GbE or PCI Express select: (PCI Express,,Integrated GbE) Defines what PCIe Port 6 is used for. */
uint8_t lanPhy : 1; /* LANPHYPC_GP12_SEL: Set to 0 for GP12 to be used as GPIO (General Purpose Input/Output), or 1 for GP12 to be used for native mode as LAN_PHYPC for 82566 LCD device */
uint8_t reserved3 : 3;
uint8_t dmiRequesterId : 1; /* DMI requestor ID security check disable: The primary purpose of this strap is to support server environments with multiple CPUs that each have a different RequesterID that can access the Flash. */
uint8_t smBus2Address : 7; /* The ME SmBus 2 7-bit address. */
/* most significant bits */
};
struct ICHSTRAP1
{
/* least significant bits */
uint8_t northMlink : 1; /* North MLink Dynamic Clock Gate Disable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers. */
uint8_t southMlink : 1; /* South MLink Dynamic Clock Gate Enable : Sets the default value for the South MLink Dynamic Clock Gate Enable registers. */
uint8_t meSmbus : 1; /* ME SmBus Dynamic Clock Gate Enable : Sets the default value for the ME SMBus Dynamic Clock Gate Enable for both the ME SmBus controllers. */
uint8_t sstDynamic : 1; /* SST Dynamic Clock Gate Enable : Sets the default value for the SST Clock Gate Enable registers. */
uint8_t reserved1 : 4;
uint8_t northMlink2 : 1; /* North MLink 2 Non-Posted Enable : 'true':North MLink supports two downstream non-posted requests. 'false':North MLink supports one downstream non-posted requests. */
uint8_t reserved2 : 7;
uint16_t reserved3 : 16;
/* most significant bits */
};
/* ICH straps */
struct ICHSTRAPSRECORD
{
struct ICHSTRAP0 ichStrap0;
struct ICHSTRAP1 ichStrap1;
uint8_t padding[248];
};
struct MCHSTRAP0
{
/* least significant bits */
uint8_t meDisable : 1; /* If true, ME is disabled. */
uint8_t meBootFromFlash : 1; /* ME boot from Flash - guessed location */
uint8_t tpmDisable : 1; /* iTPM Disable : When set true, iTPM Host Interface is disabled. When set false (default), iTPM is enabled. */
uint8_t reserved1 : 3;
uint8_t spiFingerprint : 1; /* SPI Fingerprint Sensor Present: Indicates if an SPI Fingerprint sensor is present at CS#1. */
uint8_t meAlternateDisable : 1; /* ME Alternate Disable: Setting this bit allows ME to perform critical chipset functions but prevents loading of any ME FW applications. */
uint8_t reserved2 : 8;
uint16_t reserved3 : 16;
/* most significant bits */
};
/* MCH straps */
struct MCHSTRAPSRECORD
{
struct MCHSTRAP0 mchStrap0;
uint8_t padding[3292];
};
/* ME VSCC Table */
struct MEVSCCTABLERECORD
{
uint32_t jid0;
uint32_t vscc0;
uint32_t jid1;
uint32_t vscc1;
uint32_t jid2;
uint32_t vscc2;
uint8_t padding[4];
};
/* Descriptor Map 2 Record */
struct DESCRIPTORMAP2RECORD
{
/* least significant bits */
uint8_t meVsccTableBaseAddress : 8;
uint8_t meVsccTableLength : 8;
uint16_t reserved : 16;
/* most significant bits */
};
/* OEM section */
struct OEMSECTIONRECORD
{
uint8_t magicString[8];
uint8_t padding[248];
};
/* 4KiB descriptor region, goes at the beginning of the ROM image */
struct DESCRIPTORREGIONRECORD
{
struct FLVALSIG flValSig; /* Flash Valid Signature Register */
struct FLMAPS flMaps; /* Flash Map Registers */
struct COMPONENTSECTIONRECORD componentSection; /* Component Section Record */
struct REGIONSECTIONRECORD regionSection; /* Flash Descriptor Region Section */
struct MASTERACCESSSECTIONRECORD masterAccessSection; /* Master Access Section */
struct ICHSTRAPSRECORD ichStraps; /* ICH straps */
struct MCHSTRAPSRECORD mchStraps; /* MCH straps */
struct MEVSCCTABLERECORD meVsccTable; /* ME VSCC Table */
struct DESCRIPTORMAP2RECORD descriptor2Map; /* Descriptor Map 2 Record */
struct OEMSECTIONRECORD oemSection; /* OEM section */
};
/*
* ---------------------------------------------------------------------
* Function declarations (keep gcc/make happy. check them in descriptor.c)
* ---------------------------------------------------------------------
*/
int validDescriptor(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorHostRegionsUnlocked(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorHostRegionsReadOnly(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorMeRegionsForbidden(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorMeRegionRemoved(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorPlatformRegionRemoved(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorDisableMe(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorDisableTpm(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorMoveGbeToStart(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorGbeRegionRemoved(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD descriptorBiosRegionFillImageAfterGbe(struct DESCRIPTORREGIONRECORD descriptorStruct, unsigned int romSize);
struct DESCRIPTORREGIONRECORD descriptorBiosRegionFillImageAfterDescriptor(struct DESCRIPTORREGIONRECORD descriptorStruct, unsigned int romSize);
struct DESCRIPTORREGIONRECORD descriptorOemString(struct DESCRIPTORREGIONRECORD descriptorStruct);
int descriptorDefinesGbeRegion(struct DESCRIPTORREGIONRECORD descriptorStruct);
struct DESCRIPTORREGIONRECORD librebootSetGbeBiosDescriptorRegions(struct DESCRIPTORREGIONRECORD descriptorStruct, unsigned int romSize);
uint8_t componentDensity(unsigned int romSizeInBytes);
struct DESCRIPTORREGIONRECORD librebootDescriptorStructFromFactory(struct DESCRIPTORREGIONRECORD descriptorStruct, unsigned int romSize);
int notCreatedHFileForDescriptorCFile(char* outFileName, char* cFileName);
int notCreatedCFileFromDescriptorStruct(struct DESCRIPTORREGIONRECORD descriptorStruct, char* outFileName, char* headerFileName);
void printDescriptorRegionLocations(struct DESCRIPTORREGIONRECORD descriptorStruct, char* romName);
int showDescriptorData(struct DESCRIPTORREGIONRECORD descriptorStruct);
#endif

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@ -1,748 +0,0 @@
/*
* gbe/gbe.c
* This file is part of the ich9deblob utility from the libreboot project
*
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
* 2014,2019 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Provide gbe related functions.
*/
/* structs describing the data from gbe region */
#include "gbe.h"
/*
* ---------------------------------------------------------------------
* Gbe functions:
* ---------------------------------------------------------------------
*/
/* gbe checksum calculation (algorithm based on datasheet) */
uint16_t gbeGetChecksumFrom4kBuffer(uint16_t* gbeWord, uint16_t desiredValue, int gbeRegionBase)
{
int wordOffset;
uint16_t total = 0;
for (wordOffset = 0; wordOffset < 0x3F; wordOffset++)
total += gbeWord[wordOffset + (gbeRegionBase>>1)];
return desiredValue - total;
}
/* checksum calculation for 4k gbe struct (algorithm based on datasheet) */
uint16_t gbeGetChecksumFrom4kStruct(struct GBEREGIONRECORD_4K gbeStruct4k, uint16_t desiredValue)
{
return gbeGetChecksumFrom4kBuffer((uint16_t*)&gbeStruct4k, desiredValue, 0);
}
/* modify the gbe region extracted from a factory.rom dump */
struct GBEREGIONRECORD_8K deblobbedGbeStructFromFactory(struct GBEREGIONRECORD_8K gbeStruct8k)
{
unsigned int i;
/*
* http://www.intel.co.uk/content/dam/doc/application-note/82573-nvm-map-appl-note.pdf
* That is a datasheet for a later chipset. Word 40H-53H seems (as per this datasheet) to be for AMT.
* Writing over it doesn't seem to cause any harm, since the ME/AMT is already removed in libreboot.
*/
for(i = 0; i < sizeof(gbeStruct8k.backup.padding); i++) {
gbeStruct8k.backup.padding[i] = 0xFF; /* FF is correct. In the struct, this is a char buffer. */
} /* We really only need to do this for words 40h-53h, but let's just nuke the whole lot. It's all 0xFF anyway. */
/* Fix the checksum */
gbeStruct8k.backup.checkSum = gbeGetChecksumFrom4kStruct(gbeStruct8k.backup, GBECHECKSUMTOTAL);
/* Main Gbe region on X200 (as shipped by Lenovo) is broken. Fix it by over-writing it with the contents of the backup */
memcpy(&gbeStruct8k.main, &gbeStruct8k.backup, GBEREGIONSIZE_4K);
return gbeStruct8k;
}
/*
* ---------------------------------------------------------------------
* C code generator (self-writing code)
* ---------------------------------------------------------------------
*/
/*
* Generate a C (.h) header file for the C source file made by notCreatedCFileFromGbeStruct4k()
*
* Output it to a file.
*/
int notCreatedHFileForGbeCFile(char* outFileName, char* cFileName)
{
remove(outFileName); /* Remove the old file before continuing */
/* Open the file that will be written to */
FILE* fp = fopen(outFileName, "w+");
/* ------------------------------ */
fprintf(fp, "/* %s: generated C code from ich9deblob */\n", outFileName);
fprintf(fp, "/* .h header file for the gbe-generating C code (%s) */\n\n", cFileName);
fprintf(fp, "#ifndef ICH9GEN_MKGBE_H\n");
fprintf(fp, "#define ICH9GEN_MKGBE_H\n\n");
fprintf(fp, "#include <stdio.h>\n");
fprintf(fp, "#include <string.h>\n");
fprintf(fp, "#include \"../gbe/gbe.h\"\n\n");
fprintf(fp, "struct GBEREGIONRECORD_4K generatedGbeStruct4k();\n");
fprintf(fp, "struct GBEREGIONRECORD_8K generatedGbeStruct8k();\n\n");
fprintf(fp, "#endif\n");
/* ------------------------------ */
fclose(fp); /* Always close the file when done. */
return 0;
}
/*
* Generate a C source file that initializes the same data from a given
* 4KiB Gbe data structure.
*
* It will simply copy the 4KiB struct at the end to make a full 8KiB struct.
* So just pass a working 4KiB Gbe struct here and you're good to go.
*
* Output it to a file.
*/
int notCreatedCFileFromGbeStruct4k(struct GBEREGIONRECORD_4K gbeStruct4k, char* outFileName, char* headerFileName)
{
int i;
int paddingSize;
int paddingIdentical;
remove(outFileName); /* Remove the old file before continuing */
/* Open the file that will be written to */
FILE* fp = fopen(outFileName, "w+");
/* ------------------------------ */
fprintf(fp, "/* %s: generated C code from ich9deblob */\n", outFileName);
fprintf(fp, "/* .c source file for the gbe-generating C code */\n\n");
fprintf(fp, "#include \"%s\"\n\n", headerFileName);
fprintf(fp, "/* Generate a 4KiB Gbe struct, with default values. */\n");
fprintf(fp, "/* Read ../gbe/gbe.h for an explanation of the default values used here */\n\n");
fprintf(fp, "struct GBEREGIONRECORD_4K generatedGbeStruct4k()\n");
fprintf(fp, "{\n");
fprintf(fp, " int i;\n");
fprintf(fp, " struct GBEREGIONRECORD_4K gbeStruct4k;\n");
fprintf(fp, "\n");
/* Words 00h to 02h: MAC Address */
fprintf(fp, " /* MAC address (words 00h to 02h) */\n");
fprintf(fp, " /* see ../gbe/gbe.c */\n");
for (i = 0; i < 6; i++) {
fprintf(fp, " gbeStruct4k.macAddress[%d] = 0x%02x;\n", i, gbeStruct4k.macAddress[i]);
}
fprintf(fp, "\n");
/* Word 03h (Reserved) */
fprintf(fp, " /* Word 03h (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord03h.reserved1_0 = 0x%02x;\n", gbeStruct4k.reservedWord03h.reserved1_0);
fprintf(fp, " gbeStruct4k.reservedWord03h.reserved1_1 = 0x%01x;\n", gbeStruct4k.reservedWord03h.reserved1_1);
fprintf(fp, " gbeStruct4k.reservedWord03h.ibaLom = 0x%01x;\n", gbeStruct4k.reservedWord03h.ibaLom);
fprintf(fp, " gbeStruct4k.reservedWord03h.reserved2 = 0x%01x;\n", gbeStruct4k.reservedWord03h.reserved2);
fprintf(fp, "\n");
/* Word 04h (Reserved) */
fprintf(fp, " /* Word 04h (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord04h = 0x%04x;\n", gbeStruct4k.reservedWord04h);
fprintf(fp, "\n");
/* Word 05h (Image Version Information) */
fprintf(fp, " /* Word 05h (Image Version Information) */\n");
fprintf(fp, " gbeStruct4k.imageVersionInformation = 0x%04x;\n", gbeStruct4k.imageVersionInformation);
fprintf(fp, "\n");
/* Words 06h and 07h (Reserved) */
fprintf(fp, " /* Words 06h and 07h (Reserved) */\n");
for (i = 0; i < 2; i++) {
fprintf(fp, " gbeStruct4k.reservedWords06h07h[%d] = 0x%04x;\n", i, gbeStruct4k.reservedWords06h07h[i]);
}
fprintf(fp, "\n");
/* Words 08h and 09h (PBA Low and PBA High) */
fprintf(fp, " /* Word 08h and 09h (PBA Low and PBA High) */\n");
fprintf(fp, " gbeStruct4k.pbaLow = 0x%04x;\n", gbeStruct4k.pbaLow);
fprintf(fp, " gbeStruct4k.pbaHigh = 0x%04x;\n", gbeStruct4k.pbaHigh);
fprintf(fp, "\n");
/* Word 0Ah (PCI Initialization Control Word) */
fprintf(fp, " /* Word 0Ah (PCI Initialization Control Word) */\n");
fprintf(fp, " gbeStruct4k.pciInitializationControlWord.loadVendorDeviceId = 0x%01x;\n", gbeStruct4k.pciInitializationControlWord.loadVendorDeviceId);
fprintf(fp, " gbeStruct4k.pciInitializationControlWord.loadSubsystemId = 0x%01x;\n", gbeStruct4k.pciInitializationControlWord.loadSubsystemId);
fprintf(fp, " gbeStruct4k.pciInitializationControlWord.reserved1 = 0x%01x;\n", gbeStruct4k.pciInitializationControlWord.reserved1);
fprintf(fp, " gbeStruct4k.pciInitializationControlWord.reserved2 = 0x%01x;\n", gbeStruct4k.pciInitializationControlWord.reserved2);
fprintf(fp, " gbeStruct4k.pciInitializationControlWord.pmEnable = 0x%01x;\n", gbeStruct4k.pciInitializationControlWord.pmEnable);
fprintf(fp, " gbeStruct4k.pciInitializationControlWord.auxPwr = 0x%01x;\n", gbeStruct4k.pciInitializationControlWord.auxPwr);
fprintf(fp, " gbeStruct4k.pciInitializationControlWord.reserved3 = 0x%01x;\n", gbeStruct4k.pciInitializationControlWord.reserved3);
fprintf(fp, " gbeStruct4k.pciInitializationControlWord.reserved4 = 0x%01x;\n", gbeStruct4k.pciInitializationControlWord.reserved4);
fprintf(fp, "\n");
/* Word 0Bh (Subsystem ID) */
fprintf(fp, " /* Word 0Bh (Subsystem ID) */\n");
fprintf(fp, " gbeStruct4k.subsystemId = 0x%04x;\n", gbeStruct4k.subsystemId);
fprintf(fp, "\n");
/* Word 0Ch (Subsystem Vendor ID) */
fprintf(fp, " /* Word 0Ch (Subsystem Vendor ID) */\n");
fprintf(fp, " gbeStruct4k.subsystemVendorId = 0x%04x;\n", gbeStruct4k.subsystemVendorId);
fprintf(fp, "\n");
/* Word 0Dh (Device ID) */
fprintf(fp, " /* Word 0Dh (Device ID) */\n");
fprintf(fp, " gbeStruct4k.deviceId = 0x%04x;\n", gbeStruct4k.deviceId);
fprintf(fp, "\n");
/* Word 0Eh (Vendor ID) */
fprintf(fp, " /* Word 0Eh (Vendor ID) */\n");
fprintf(fp, " gbeStruct4k.vendorId = 0x%04x;\n", gbeStruct4k.vendorId);
fprintf(fp, "\n");
/* Word 0Fh (Device Revision ID) */
fprintf(fp, " /* Word 0Fh (Device Revision ID) */\n");
fprintf(fp, " gbeStruct4k.deviceRevId = 0x%04x;\n", gbeStruct4k.deviceRevId);
fprintf(fp, "\n");
/* Word 10h (LAN Power Consumption) */
fprintf(fp, " /* Word 10h (LAN Power Consumption) */\n");
fprintf(fp, " gbeStruct4k.lanPowerConsumption.lanD3Power = 0x%02x;\n", gbeStruct4k.lanPowerConsumption.lanD3Power);
fprintf(fp, " gbeStruct4k.lanPowerConsumption.reserved = 0x%01x;\n", gbeStruct4k.lanPowerConsumption.reserved);
fprintf(fp, " gbeStruct4k.lanPowerConsumption.lanD0Power = 0x%02x;\n", gbeStruct4k.lanPowerConsumption.lanD0Power);
fprintf(fp, "\n");
/* Words 11h and 12h (Reserved) */
fprintf(fp, " /* Words 11h and 12h (Reserved) */\n");
for (i = 0; i < 2; i++) {
fprintf(fp, " gbeStruct4k.reservedWords11h12h[%d] = 0x%04x;\n", i, gbeStruct4k.reservedWords11h12h[i]);
}
fprintf(fp, "\n");
/* Word 13h (Shared Initialization Control Word) */
fprintf(fp, " /* Word 13h (Shared Initialization Control Word) */\n");
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.reserved1 = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.reserved1);
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.forceDuplex = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.forceDuplex);
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.forceSpeedEnable = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.forceSpeedEnable);
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.reserved2_0 = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.reserved2_0);
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.reserved2_1 = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.reserved2_1);
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.phyPowerDownEnable = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.phyPowerDownEnable);
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.reserved3 = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.reserved3);
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.reserved4 = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.reserved4);
fprintf(fp, " gbeStruct4k.sharedInitializationControlWord.sign = 0x%01x;\n", gbeStruct4k.sharedInitializationControlWord.sign);
fprintf(fp, "\n");
/* Word 14h (Extended Configuration Control Word 1) */
fprintf(fp, " /* Word 14h (Extended Configuration Control Word 1) */\n");
fprintf(fp, " gbeStruct4k.extendedConfigurationControlWord1.extendedConfigurationPointer = 0x%03x;\n", gbeStruct4k.extendedConfigurationControlWord1.extendedConfigurationPointer);
fprintf(fp, " gbeStruct4k.extendedConfigurationControlWord1.oemWriteEnable = 0x%01x;\n", gbeStruct4k.extendedConfigurationControlWord1.oemWriteEnable);
fprintf(fp, " gbeStruct4k.extendedConfigurationControlWord1.reserved1 = 0x%01x;\n", gbeStruct4k.extendedConfigurationControlWord1.reserved1);
fprintf(fp, " gbeStruct4k.extendedConfigurationControlWord1.reserved2 = 0x%01x;\n", gbeStruct4k.extendedConfigurationControlWord1.reserved2);
fprintf(fp, " gbeStruct4k.extendedConfigurationControlWord1.reserved3 = 0x%01x;\n", gbeStruct4k.extendedConfigurationControlWord1.reserved3);
fprintf(fp, "\n");
/* Word 15h (Extended Configuration Control Word 2) */
fprintf(fp, " /* Word 15h (Extended Configuration Control Word 2) */\n");
fprintf(fp, " gbeStruct4k.extendedConfigurationControlWord2.reserved = 0x%02x;\n", gbeStruct4k.extendedConfigurationControlWord2.reserved);
fprintf(fp, " gbeStruct4k.extendedConfigurationControlWord2.extendedPhyLength = 0x%02x;\n", gbeStruct4k.extendedConfigurationControlWord2.extendedPhyLength);
fprintf(fp, "\n");
/* Word 16h (Extended Configuration Control Word 3) */
fprintf(fp, " /* Word 16h (Extended Configuration Control Word 3) */\n");
fprintf(fp, " gbeStruct4k.extendedConfigurationControlWord3 = 0x%04x;\n", gbeStruct4k.extendedConfigurationControlWord3);
fprintf(fp, "\n");
/* Word 17h (LED 1 Configuration and Power Management) */
fprintf(fp, " /* Word 17h (LED 1 Configuration and Power Management) */\n");
fprintf(fp, " gbeStruct4k.ledCtl1.led1Mode = 0x%01x;\n", gbeStruct4k.ledCtl1.led1Mode);
fprintf(fp, " gbeStruct4k.ledCtl1.reserved1 = 0x%01x;\n", gbeStruct4k.ledCtl1.reserved1);
fprintf(fp, " gbeStruct4k.ledCtl1.led1BlinkMode = 0x%01x;\n", gbeStruct4k.ledCtl1.led1BlinkMode);
fprintf(fp, " gbeStruct4k.ledCtl1.led1Invert = 0x%01x;\n", gbeStruct4k.ledCtl1.led1Invert);
fprintf(fp, " gbeStruct4k.ledCtl1.led1Blink = 0x%01x;\n", gbeStruct4k.ledCtl1.led1Blink);
fprintf(fp, " gbeStruct4k.ledCtl1.reserved2 = 0x%01x;\n", gbeStruct4k.ledCtl1.reserved2);
fprintf(fp, " gbeStruct4k.ledCtl1.lpluEnable = 0x%01x;\n", gbeStruct4k.ledCtl1.lpluEnable);
fprintf(fp, " gbeStruct4k.ledCtl1.lpluEnableNonD0a = 0x%01x;\n", gbeStruct4k.ledCtl1.lpluEnableNonD0a);
fprintf(fp, " gbeStruct4k.ledCtl1.gbeDisableNonD0a = 0x%01x;\n", gbeStruct4k.ledCtl1.gbeDisableNonD0a);
fprintf(fp, " gbeStruct4k.ledCtl1.reserved3 = 0x%01x;\n", gbeStruct4k.ledCtl1.reserved3);
fprintf(fp, " gbeStruct4k.ledCtl1.gbeDisable = 0x%01x;\n", gbeStruct4k.ledCtl1.gbeDisable);
fprintf(fp, " gbeStruct4k.ledCtl1.reserved4 = 0x%01x;\n", gbeStruct4k.ledCtl1.reserved4);
fprintf(fp, "\n");
/* Word 18h (LED 0 and 2 Configuration Defaults) */
fprintf(fp, " /* Word 18h (LED 0 and 2 Configuration Defaults) */\n");
fprintf(fp, " gbeStruct4k.ledCtl02.led0Mode = 0x%01x;\n", gbeStruct4k.ledCtl02.led0Mode);
fprintf(fp, " gbeStruct4k.ledCtl02.reserved1 = 0x%01x;\n", gbeStruct4k.ledCtl02.reserved1);
fprintf(fp, " gbeStruct4k.ledCtl02.led0BlinkMode = 0x%01x;\n", gbeStruct4k.ledCtl02.led0BlinkMode);
fprintf(fp, " gbeStruct4k.ledCtl02.led0Invert = 0x%01x;\n", gbeStruct4k.ledCtl02.led0Invert);
fprintf(fp, " gbeStruct4k.ledCtl02.led0Blink = 0x%01x;\n", gbeStruct4k.ledCtl02.led0Blink);
fprintf(fp, " gbeStruct4k.ledCtl02.led2Mode = 0x%01x;\n", gbeStruct4k.ledCtl02.led2Mode);
fprintf(fp, " gbeStruct4k.ledCtl02.reserved2 = 0x%01x;\n", gbeStruct4k.ledCtl02.reserved2);
fprintf(fp, " gbeStruct4k.ledCtl02.led2BlinkMode = 0x%01x;\n", gbeStruct4k.ledCtl02.led2BlinkMode);
fprintf(fp, " gbeStruct4k.ledCtl02.led2Invert = 0x%01x;\n", gbeStruct4k.ledCtl02.led2Invert);
fprintf(fp, " gbeStruct4k.ledCtl02.led2Blink = 0x%01x;\n", gbeStruct4k.ledCtl02.led2Blink);
fprintf(fp, "\n");
/* Word 19h (Reserved) */
fprintf(fp, " /* Word 19h (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord19h = 0x%04x;\n", gbeStruct4k.reservedWord19h);
fprintf(fp, "\n");
/* Word 1Ah (Reserved) */
fprintf(fp, " /* Word 1Ah (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord1Ah = 0x%04x;\n", gbeStruct4k.reservedWord1Ah);
fprintf(fp, "\n");
/* Word 1Bh (Reserved) */
fprintf(fp, " /* Word 1Bh (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord1Bh = 0x%04x;\n", gbeStruct4k.reservedWord1Bh);
fprintf(fp, "\n");
/* Word 1Ch (Reserved) */
fprintf(fp, " /* Word 1Ch (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord1Ch = 0x%04x;\n", gbeStruct4k.reservedWord1Ch);
fprintf(fp, "\n");
/* Word 1Dh (Reserved) */
fprintf(fp, " /* Word 1Dh (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord1Dh = 0x%04x;\n", gbeStruct4k.reservedWord1Dh);
fprintf(fp, "\n");
/* Word 1Eh (Device ID for Intel 82567LM gigabit ethernet controller) */
fprintf(fp, " /* Word 1Eh (Device ID for Intel 82567LM gigabit ethernet controller) */\n");
fprintf(fp, " gbeStruct4k._82567lmDeviceId = 0x%04x;\n", gbeStruct4k._82567lmDeviceId);
fprintf(fp, "\n");
/* Word 1Fh (Device ID for Intel 82567LF gigabit ethernet controller) */
fprintf(fp, " /* Word 1Fh (Device ID for Intel 82567LF gigabit ethernet controller) */\n");
fprintf(fp, " gbeStruct4k._82567lfDeviceId = 0x%04x;\n", gbeStruct4k._82567lfDeviceId);
fprintf(fp, "\n");
/* Word 20h (Reserved) */
fprintf(fp, " /* Word 20h (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord20h = 0x%04x;\n", gbeStruct4k.reservedWord20h);
fprintf(fp, "\n");
/* Word 21h (Device ID for Intel 82567V gigabit ethernet controller) */
fprintf(fp, " /* Word 21h (Device ID for Intel 82567V gigabit ethernet controller) */\n");
fprintf(fp, " gbeStruct4k._82567vDeviceId = 0x%04x;\n", gbeStruct4k._82567vDeviceId);
fprintf(fp, "\n");
/* Word 22h (Reserved) */
fprintf(fp, " /* Word 22h (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord22h = 0x%04x;\n", gbeStruct4k.reservedWord22h);
fprintf(fp, "\n");
/* Word 23h (Reserved) */
fprintf(fp, " /* Word 23h (Reserved) */\n");
fprintf(fp, " gbeStruct4k.reservedWord23h = 0x%04x;\n", gbeStruct4k.reservedWord23h);
fprintf(fp, "\n");
/* Words 24h to 2Fh (Reserved) */
fprintf(fp, " /* Words 24h to 2Fh (Reserved) */\n");
for (i = 0; i < 12; i++) {
fprintf(fp, " gbeStruct4k.reservedWords24to2Fh[%d] = 0x%04x;\n", i, gbeStruct4k.reservedWords24to2Fh[i]);
}
fprintf(fp, "\n");
/* Words 30h to 3Eh (PXE Software Region) */
fprintf(fp, " /* Words 30h to 3Eh (PXE Software Region) */\n");
fprintf(fp, " /* Boot Agent Main Setup Options (Word 30h) */\n");
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.protocolSelect = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.protocolSelect);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved1 = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved1);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.defaultBootSelection = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.defaultBootSelection);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved2 = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved2);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.promptTime = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.promptTime);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.displaySetupMessage = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.displaySetupMessage);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved3 = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved3);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.forceSpeed = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.forceSpeed);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.forceFullDuplex = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.forceFullDuplex);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved4 = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved4);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.efiPresence = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.efiPresence);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.pxePresence = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.pxePresence);
fprintf(fp, " /* Boot Agent Configuration Customization Options (Word 31h) */\n");
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableSetupMenu = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableSetupMenu);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableTitleMessage = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableTitleMessage);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableProtocolSelect = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableProtocolSelect);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableBootSelection = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableBootSelection);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableLegacyWakeupSupport = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableLegacyWakeupSupport);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableFlashUpdate = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableFlashUpdate);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved1 = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved1);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.ibaBootOrderSetupMode = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.ibaBootOrderSetupMode);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved2 = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved2);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.signature = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.signature);
fprintf(fp, " /* Boot Agent Configuration Customization Options (Word 32h) */\n");
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.buildNumber = 0x%02x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.buildNumber);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.minorVersionNumber = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.minorVersionNumber);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.majorVersionNumber = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.majorVersionNumber);
fprintf(fp, " /* IBA Capabilities (Word 33h) */\n");
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.baseCodePresent = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.baseCodePresent);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.undiCapabilityPresent = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.undiCapabilityPresent);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved1 = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved1);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.efiUndiCapabilityPresent = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.efiUndiCapabilityPresent);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved2_0 = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved2_0);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved2_1 = 0x%02x;\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved2_1);
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.signature = 0x%01x;\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.signature);
fprintf(fp, " /* Padding (Words 34h to 3Eh) */\n");
for (i = 0; i < 11; i++) {
fprintf(fp, " gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[%d] = 0x%04x;\n", i, gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[i]);
}
fprintf(fp, "\n");
/* Word 3Fh (Checksum) */
fprintf(fp, " /* Word 3Fh (Checksum) */\n");
fprintf(fp, " gbeStruct4k.checkSum = gbeGetChecksumFrom4kStruct(gbeStruct4k, GBECHECKSUMTOTAL);\n");
fprintf(fp, "\n");
/* The rest of Gbe is just padding */
paddingSize = sizeof(gbeStruct4k.padding);
paddingIdentical = 1; /* Assume that it's all 0xFF, then try to disprove it */
for (i = 0; i < paddingSize; i++) { /* check whether contents differ */
if (gbeStruct4k.padding[i] != 0xFF) {
paddingIdentical = 0;
break;
}
}
if (!paddingIdentical) {
fprintf(fp, " /* The rest of Gbe (word 40h or byte 80h onwards) is just padding */\n");
for (i = 0; i < paddingSize; i++) { /* contents are not all 0xFF, just spit them all out one by one */
fprintf(fp, " gbeStruct4k.padding[%d] = 0x%02x;\n", i, gbeStruct4k.padding[i]);
}
} else { /* contents are all 0xFF. Generate a small for loop that sets them all to 0xFF */
fprintf(fp, " /* The rest of Gbe (word 40h or byte 80h onwards) is just padding (0xFF) */\n");
fprintf(fp, " for (i = 0; i < %d; i++) {\n", paddingSize);
fprintf(fp, " gbeStruct4k.padding[i] = 0xFF;\n");
fprintf(fp, " }\n");
}
fprintf(fp, "\n");
fprintf(fp, " return gbeStruct4k;\n");
fprintf(fp, "}\n\n");
fprintf(fp, "struct GBEREGIONRECORD_8K generatedGbeStruct8k()\n");
fprintf(fp, "{\n");
fprintf(fp, " struct GBEREGIONRECORD_8K gbeStruct8k;\n");
fprintf(fp, " gbeStruct8k.main = generatedGbeStruct4k();\n");
fprintf(fp, " memcpy(&gbeStruct8k.backup, &gbeStruct8k.main, GBEREGIONSIZE_4K);\n");
fprintf(fp, " return gbeStruct8k;\n");
fprintf(fp, "}\n\n");
/* ------------------------------ */
fclose(fp); /* Always close the file when done. */
return 0;
}
int showGbeData(struct GBEREGIONRECORD_4K gbeStruct4k)
{
int i;
printf("GbE REGION\n");
printf("==========\n");
printf("A *word*, in this context, means two 8-bit bytes.\n\n");
printf("**MAC address** (words 00h to 02h) = ");
for (i = 0; i < 6; i++) {
printf("%02x", gbeStruct4k.macAddress[i]);
if (i!=5) printf(":");
}
printf("\n\n");
printf("Word 03h (Reserved)\n");
printf("-------------------\n\n");
printf("- reserved1_0 = 0x%02x\n", gbeStruct4k.reservedWord03h.reserved1_0);
printf("- reserved1_1 = 0x%01x\n", gbeStruct4k.reservedWord03h.reserved1_1);
printf("- IBA Lom = 0x%01x\n", gbeStruct4k.reservedWord03h.ibaLom);
printf("- reserved2 = 0x%01x\n\n", gbeStruct4k.reservedWord03h.reserved2);
printf("Word 04h (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord04h = 0x%04x\n\n", gbeStruct4k.reservedWord04h);
/* Word 05h (Image Version Information) */
printf("Word 05h (Image Version Information)\n");
printf("------------------------------------\n\n");
printf("- Image Version Information = 0x%04x\n\n", gbeStruct4k.imageVersionInformation);
printf("Words 06h and 07h (Reserved)\n");
printf("----------------------------\n\n");
for (i = 0; i < 2; i++) {
printf("- Offset %d = 0x%04x\n", i, gbeStruct4k.reservedWords06h07h[i]);
}
printf("\n");
/* Words 08h and 09h (PBA Low and PBA High) */
printf("Word 08h and 09h (PBA Low and PBA High)\n");
printf("---------------------------------------\n\n");
printf("- pbaLow = 0x%04x\n", gbeStruct4k.pbaLow);
printf("- pbaHigh = 0x%04x\n\n", gbeStruct4k.pbaHigh);
printf("Word 0Ah (PCI Initialization Control Word)\n");
printf("------------------------------------------\n\n");
printf("- Load Vendor Device ID = 0x%01x\n", gbeStruct4k.pciInitializationControlWord.loadVendorDeviceId);
printf("- Load Subsystem ID = 0x%01x\n", gbeStruct4k.pciInitializationControlWord.loadSubsystemId);
printf("- reserved1 = 0x%01x\n", gbeStruct4k.pciInitializationControlWord.reserved1);
printf("- reserved2 = 0x%01x\n", gbeStruct4k.pciInitializationControlWord.reserved2);
printf("- PM Enable = 0x%01x\n", gbeStruct4k.pciInitializationControlWord.pmEnable);
printf("- Auxillary Power = 0x%01x\n", gbeStruct4k.pciInitializationControlWord.auxPwr);
printf("- reserved3 = 0x%01x\n", gbeStruct4k.pciInitializationControlWord.reserved3);
printf("- reserved4 = 0x%01x\n\n", gbeStruct4k.pciInitializationControlWord.reserved4);
printf("Word 0Bh (Subsystem ID)\n");
printf("-----------------------\n\n");
printf("- Subsystem ID = 0x%04x\n\n", gbeStruct4k.subsystemId);
printf("Word 0Ch (Subsystem Vendor ID)\n");
printf("------------------------------\n\n");
printf("- Subsystem Vendor ID = 0x%04x\n\n", gbeStruct4k.subsystemVendorId);
printf("Word 0Dh (Device ID)\n");
printf("--------------------\n\n");
printf("- Device ID = 0x%04x\n\n", gbeStruct4k.deviceId);
printf("Word 0Eh (Vendor ID)\n");
printf("--------------------\n\n");
printf("- Vendor ID = 0x%04x\n\n", gbeStruct4k.vendorId);
printf("Word 0Fh (Device Revision ID)\n");
printf("-----------------------------\n\n");
printf("- Device Revision ID = 0x%04x\n\n", gbeStruct4k.deviceRevId);
printf("Word 10h (LAN Power Consumption)\n");
printf("--------------------------------\n\n");
printf("- LAN D3 Power = 0x%02x\n", gbeStruct4k.lanPowerConsumption.lanD3Power);
printf("- reserved = 0x%01x\n", gbeStruct4k.lanPowerConsumption.reserved);
printf("- LAN D0 Power = 0x%02x\n\n", gbeStruct4k.lanPowerConsumption.lanD0Power);
printf("Words 11h and 12h (Reserved)\n");
printf("----------------------------\n\n");
for (i = 0; i < 2; i++) {
printf("- Offset %d = 0x%04x\n", i, gbeStruct4k.reservedWords11h12h[i]);
}
printf("\n");
/* Word 13h (Shared Initialization Control Word) */
printf("Word 13h (Shared Initialization Control Word)\n");
printf("---------------------------------------------\n\n");
printf("- reserved1 = 0x%01x\n", gbeStruct4k.sharedInitializationControlWord.reserved1);
printf("- Force Duplex = 0x%01x\n", gbeStruct4k.sharedInitializationControlWord.forceDuplex);
printf("- Force Speed Enable = 0x%01x\n", gbeStruct4k.sharedInitializationControlWord.forceSpeedEnable);
printf("- reserved2_0 = 0x%01x\n", gbeStruct4k.sharedInitializationControlWord.reserved2_0);
printf("- reserved2_1 = 0x%01x\n", gbeStruct4k.sharedInitializationControlWord.reserved2_1);
printf("- PHY Power Down Enable = 0x%01x\n", gbeStruct4k.sharedInitializationControlWord.phyPowerDownEnable);
printf("- reserved3 = 0x%01x\n", gbeStruct4k.sharedInitializationControlWord.reserved3);
printf("- reserved4 = 0x%01x\n", gbeStruct4k.sharedInitializationControlWord.reserved4);
printf("- Sign = 0x%01x\n\n", gbeStruct4k.sharedInitializationControlWord.sign);
printf("Word 14h (Extended Configuration Control Word 1)\n");
printf("------------------------------------------------\n\n");
printf("- Extended Configuration Pointer = 0x%03x\n", gbeStruct4k.extendedConfigurationControlWord1.extendedConfigurationPointer);
printf("- OEM Write Enable = 0x%01x\n", gbeStruct4k.extendedConfigurationControlWord1.oemWriteEnable);
printf("- reserved1 = 0x%01x\n", gbeStruct4k.extendedConfigurationControlWord1.reserved1);
printf("- reserved2 = 0x%01x\n", gbeStruct4k.extendedConfigurationControlWord1.reserved2);
printf("- reserved3 = 0x%01x\n\n", gbeStruct4k.extendedConfigurationControlWord1.reserved3);
printf("Word 15h (Extended Configuration Control Word 2)\n");
printf("------------------------------------------------\n\n");
printf("- reserved = 0x%02x\n", gbeStruct4k.extendedConfigurationControlWord2.reserved);
printf("- Extended PHY Length = 0x%02x\n\n", gbeStruct4k.extendedConfigurationControlWord2.extendedPhyLength);
printf("Word 16h (Extended Configuration Control Word 3)\n");
printf("------------------------------------------------\n\n");
printf("- Extended Configuration Control Word 3 = 0x%04x\n\n", gbeStruct4k.extendedConfigurationControlWord3);
printf("Word 17h (LED 1 Configuration and Power Management)\n");
printf("---------------------------------------------------\n\n");
printf("- LED1 Mode = 0x%01x\n", gbeStruct4k.ledCtl1.led1Mode);
printf("- reserved1 = 0x%01x\n", gbeStruct4k.ledCtl1.reserved1);
printf("- LED1 Blink Mode = 0x%01x\n", gbeStruct4k.ledCtl1.led1BlinkMode);
printf("- LED1 Invert = 0x%01x\n", gbeStruct4k.ledCtl1.led1Invert);
printf("- LED1 Blink = 0x%01x\n", gbeStruct4k.ledCtl1.led1Blink);
printf("- reserved2 = 0x%01x\n", gbeStruct4k.ledCtl1.reserved2);
printf("- LPLU Enable = 0x%01x\n", gbeStruct4k.ledCtl1.lpluEnable);
printf("- LPLU Enable Non-D0a = 0x%01x\n", gbeStruct4k.ledCtl1.lpluEnableNonD0a);
printf("- GbE Disable Non-D0a = 0x%01x\n", gbeStruct4k.ledCtl1.gbeDisableNonD0a);
printf("- reserved3 = 0x%01x\n", gbeStruct4k.ledCtl1.reserved3);
printf("- GbE Disable = 0x%01x\n", gbeStruct4k.ledCtl1.gbeDisable);
printf("- reserved4 = 0x%01x\n\n", gbeStruct4k.ledCtl1.reserved4);
printf("Word 18h (LED 0 and 2 Configuration Defaults)\n");
printf("---------------------------------------------\n\n");
printf("- LED0 Mode = 0x%01x\n", gbeStruct4k.ledCtl02.led0Mode);
printf("- reserved1 = 0x%01x\n", gbeStruct4k.ledCtl02.reserved1);
printf("- LED0 Blink Mode = 0x%01x\n", gbeStruct4k.ledCtl02.led0BlinkMode);
printf("- LED0 Invert = 0x%01x\n", gbeStruct4k.ledCtl02.led0Invert);
printf("- LED0 Blink = 0x%01x\n", gbeStruct4k.ledCtl02.led0Blink);
printf("- LED2 Mode = 0x%01x\n", gbeStruct4k.ledCtl02.led2Mode);
printf("- reserved2 = 0x%01x\n", gbeStruct4k.ledCtl02.reserved2);
printf("- LED2 Blink Mode = 0x%01x\n", gbeStruct4k.ledCtl02.led2BlinkMode);
printf("- LED2 Invert = 0x%01x\n", gbeStruct4k.ledCtl02.led2Invert);
printf("- LED2 Blink = 0x%01x\n\n", gbeStruct4k.ledCtl02.led2Blink);
printf("Word 19h (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord19h = 0x%04x\n\n", gbeStruct4k.reservedWord19h);
printf("Word 1Ah (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord1Ah = 0x%04x\n\n", gbeStruct4k.reservedWord1Ah);
printf("Word 1Bh (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord1Bh = 0x%04x\n\n", gbeStruct4k.reservedWord1Bh);
printf("Word 1Ch (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord1Ch = 0x%04x\n\n", gbeStruct4k.reservedWord1Ch);
printf("Word 1Dh (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord1Dh = 0x%04x\n\n", gbeStruct4k.reservedWord1Dh);
printf("Word 1Eh (Device ID for Intel 82567LM gigabit ethernet controller)\n");
printf("------------------------------------------------------------------\n\n");
printf("- 82567LM Device ID = 0x%04x\n\n", gbeStruct4k._82567lmDeviceId);
printf("Word 1Fh (Device ID for Intel 82567LF gigabit ethernet controller)\n");
printf("------------------------------------------------------------------\n\n");
printf("- 82567LF Device ID = 0x%04x\n\n", gbeStruct4k._82567lfDeviceId);
printf("Word 20h (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord20h = 0x%04x\n\n", gbeStruct4k.reservedWord20h);
printf("Word 21h (Device ID for Intel 82567V gigabit ethernet controller)\n");
printf("-----------------------------------------------------------------\n\n");
printf("- 82567V Device ID = 0x%04x\n\n", gbeStruct4k._82567vDeviceId);
printf("Word 22h (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord22h = 0x%04x\n\n", gbeStruct4k.reservedWord22h);
printf("Word 23h (Reserved)\n");
printf("-------------------\n\n");
printf("- reservedWord23h = 0x%04x\n\n", gbeStruct4k.reservedWord23h);
printf("Words 24h to 2Fh (Reserved)\n");
printf("---------------------------\n\n");
for (i = 0; i < 12; i++) {
printf("- Offset %d = 0x%04x\n", i, gbeStruct4k.reservedWords24to2Fh[i]);
}
printf("\n");
printf("Words 30h to 3Eh (PXE Software Region)\n");
printf("--------------------------------------\n\n");
printf("Boot Agent Main Setup Options (Word 30h):\n\n");
printf("- Protocol Select = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.protocolSelect);
printf("- reserved1 = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved1);
printf("- Default Boot Selection = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.defaultBootSelection);
printf("- reserved2 = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved2);
printf("- Prompt Time = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.promptTime);
printf("- Display Setup Message = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.displaySetupMessage);
printf("- reserved3 = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved3);
printf("- Force Speed = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.forceSpeed);
printf("- Force Full Duplex = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.forceFullDuplex);
printf("- reserved4 = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved4);
printf("- EFI Presence = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.efiPresence);
printf("- PXE Presence = 0x%01x\n\n", gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.pxePresence);
printf("Boot Agent Configuration Customization Options (Word 31h):\n\n");
printf("- Disable Setup Menu = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableSetupMenu);
printf("- Disable Title Message = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableTitleMessage);
printf("- Disable Protocol Select = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableProtocolSelect);
printf("- Disable Boot Selection = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableBootSelection);
printf("- Disable Legacy Wakeup Support = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableLegacyWakeupSupport);
printf("- Disable Flash Update = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableFlashUpdate);
printf("- reserved1 = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved1);
printf("- IBA Boot Order Setup Mode = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.ibaBootOrderSetupMode);
printf("- reserved2 = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved2);
printf("- Signature = 0x%01x\n\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.signature);
printf("Boot Agent Configuration Customization Options (Word 32h):\n\n");
printf("- Build Number = 0x%02x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.buildNumber);
printf("- Minor Version Number = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.minorVersionNumber);
printf("- Major Version Number = 0x%01x\n\n", gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.majorVersionNumber);
printf("IBA Capabilities (Word 33h):\n\n");
printf("- Base Code Present = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.baseCodePresent);
printf("- UNDI Capability Present = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.undiCapabilityPresent);
printf("- reserved1 = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved1);
printf("- EFI UndiCapabilityPresent = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.efiUndiCapabilityPresent);
printf("- reserved2_0 = 0x%01x\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved2_0);
printf("- reserved2_1 = 0x%02x\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved2_1);
printf("- Signature = 0x%01x\n\n", gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.signature);
printf("Padding (Words 34h to 3Eh):\n\n");
for (i = 0; i < 11; i++) {
printf("- Offset %d = 0x%04x\n", i, gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[i]);
}
printf("\n");
printf("Word 3Fh (Checksum):\n\n");
printf("- Check Sum = 0x%04x\n\n", gbeStruct4k.checkSum);
printf("The rest of this section is irrelevant. It can all be set to 0xFF.\n\n");
return 0;
}
/*
* ---------------------------------------------------------------------
* Debugging functions:
* ---------------------------------------------------------------------
*/
/*
* show debugging info: show calculated (correct) gbe checksum and what
* is actually stored, in a 4K gbe struct. Only for a single region.
*/
void printGbeChecksumDataFromStruct4k(struct GBEREGIONRECORD_4K gbeStruct4k, char* romName, char* regionName)
{
printf(
"%s Gbe (%s): calculated Gbe checksum: 0x%hx and actual GBe checksum: 0x%hx\n",
romName,
regionName,
gbeGetChecksumFrom4kStruct(gbeStruct4k, GBECHECKSUMTOTAL),
gbeStruct4k.checkSum
);
return;
}
/*
* show debugging info: show calculated (correct) gbe checksum and what
* is actually stored, in a 8K gbe struct. Do so for main and backup regions.
*/
void printGbeChecksumDataFromStruct8k(struct GBEREGIONRECORD_8K gbeStruct8k, char* romName)
{
printGbeChecksumDataFromStruct4k(gbeStruct8k.main, romName, "main");
printGbeChecksumDataFromStruct4k(gbeStruct8k.backup, romName, "backup");
return;
}

View File

@ -1,436 +0,0 @@
/*
* gbe/gbe.h
* This file is part of the ich9deblob utility from the libreboot project
*
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
* 2014,2019 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/*
* Purpose: provide struct representing gbe region.
* Map actual buffers of this regions, directly to instances of these
* structs. This makes working with gbe really easy.
*/
/*
* bit fields used, corresponding to datasheet. See links to datasheets
* and documentation in ich9deblob.c
*/
/*
* See docs/hardware/x200_remove_me.html for info plus links to datasheet (also linked below)
*
* Info about Gbe region (read whole datasheet):
* http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf
* https://web.archive.org/web/20150912070329/https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums
*/
#ifndef GBESTRUCT_H
#define GBESTRUCT_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "../descriptor/descriptor.h"
/* Size of the full gbe region in bytes */
#define GBEREGIONSIZE_8K 0x2000
/*
* Size of each sub-region in gbe.
* gbe contains two regions which
* can be identical: main and backup.
* These are each half the size of the full region
*/
#define GBEREGIONSIZE_4K 0x1000
/*
* When adding up the first 0x3F 16-bit words
* in a 4KiB GBE region, it should be equal
* to 0xBABA
*/
#define GBECHECKSUMTOTAL 0xBABA
/*
* These will have a modified descriptor+gbe based on what's in the factory.rom
* These will be joined into a single 12KiB buffer (descriptor, then gbe) and saved to a file
* NOTE: The GBE region of 8K is actually 2x 4K regions in a single region; both 4K blocks can be identical (and by default, are)
* The 2nd one is a "backup", but we don't know when it's used. perhaps it's used when the checksum on the first one does not match?
*/
/*
* ---------------------------------------------------------------------
* Gbe struct representing the data:
* ---------------------------------------------------------------------
*/
struct GBE_RESERVED_WORD_03H {
/* least significant bits */
uint8_t reserved1_0 : 8; /* bits should all be set to zero */
uint8_t reserved1_1 : 3; /* ^ part of above. Separated so that the bitfields align */
uint8_t ibaLom : 1; /* set to 1 for intel boot agent to work (i.e. set it to 0) */
uint8_t reserved2 : 4; /* bits should all be set to zero */
/* most significant bits */
};
/* Word 0A */
struct GBE_PCI_INITIALIZATION_CONTROL_WORD {
/* least significant bits */
uint8_t loadVendorDeviceId : 1; /* 1 = load from NVM. 0 = load from MAC fuses. It's 1 in my deblobbed_descriptor.bin */
uint8_t loadSubsystemId : 1; /* 1 = load from NVM. 0 = load from MAC fuses. It's 1 in my deblobbed_descriptor.bin */
uint8_t reserved1 : 1; /* Reserved. Set to 0 (according to datasheet). 0 in my deblobbed_descriptor.bin */
uint8_t reserved2 : 3; /* Reserved. Set them to 0 (according to datasheet). 0 in my deblobbed_descriptor.bin */
uint8_t pmEnable : 1; /* Power Management Enable. 1=Enable. It's 1 in my deblobbed_descriptor.bin */
uint8_t auxPwr : 1; /* Auxiliary Power Indication. See datasheet. it's 1 in my deblobbed_descriptor.bin */
uint8_t reserved3 : 4; /* Reserved. Set to 0000 (according to datasheet). */
uint8_t reserved4 : 4; /* Reserved. Set to 0001 (according to datasheet). */
/* most significant bits */
};
/* Word 10h. */
struct GBE_LAN_POWER_CONSUMPTION {
/* least significant bits */
uint8_t lanD3Power : 5; /* It's 00001b (0x1) in deblobbed_descriptor.bin */
uint8_t reserved : 3; /* Reserved. These bits should all be 0. confirmed from deblobbed_descriptor.bin */
uint8_t lanD0Power : 8; /* default value: 0x0D (according to datasheet). confirmed from deblobbed_descriptor.bin */
/* most significant bits */
};
/* Word 13h */
struct GBE_SHARED_INITIALIZATION_CONTROL_WORD {
/* least significant bits */
uint8_t reserved1 : 3; /* Reserved. These bits should be set to 101 (0x5) in binary (according to datasheet and deblobbed_descriptor.bin) */
uint8_t forceDuplex : 1; /* Hardware default is 0 according to datasheet and deblobbed_descriptor.bin. Presumably to set whether the chipset is to operate at full- or half-duplex */
uint8_t forceSpeedEnable : 1; /* Hardware default is 0. Presumably to limited speed eg 10, 10/100, 10/100/1000 */
uint8_t reserved2_0 : 3; /* Reserved. All bits should be set to 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t reserved2_1 : 1; /* ^ part of above. separated so that bitfields align */
uint8_t phyPowerDownEnable : 1; /* PHY Power Down in D3/Dr (if WoL is disabled), 1 means Enable power down. deblobbed_descriptor.bin says 1 */
uint8_t reserved3 : 1; /* Reserved. Should be set to 1 according to datasheet and deblobbed_descriptor.bin */
uint8_t reserved4 : 3; /* Reserved. These bits should all be 0 according to datasheet and deblobbed_descriptor.bin */
/* ^ reserved4: indicates whether a valid NVM is present. If invalid, MAC does not read NVM and uses default values. */
/* 00 = invalid NVM, 01 = invalid NVM, 10 = valid NVM present, 11 = invalid NVM */
/* Default should be 10 (binary) according to datasheet and deblobbed_descriptor.bin */
uint8_t sign : 2; /* Make sure to set this to 0x2 (10 in binary) */
/* most significant bits */
};
/* Word 14h */
struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_1 {
/* least significant bits */
uint16_t extendedConfigurationPointer: 12; /* dword: base address of extended configuration area in NVM. should not be zero. Default is 020h according to datasheet and deblobbed_descriptor.bin */
uint8_t oemWriteEnable : 1; /* 1=enable. if set, loads oem bits from phy_ctrl register to the 82567. loaded to EXTCNF_CTRL register. default is 1 according to datasheet and deblobbed_descriptor.bin */
uint8_t reserved1 : 1; /* Reserved. default value 1 according to datasheet and deblobed_descriptor.bin */
uint8_t reserved2 : 1; /* Reserved. default value 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t reserved3 : 1; /* Reserved. default value 0 according to datasheet and deblobbed_descriptor.bin */
/* most significant bits */
};
/* Word 15h */
struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_2 {
/* least significant bits */
uint8_t reserved : 8; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t extendedPhyLength : 8; /* dword: size of extended phy configuration area. most be 0 if phy config area is disabled. default is 0000101 (binary) or 05 (hex) according to datasheet, but 00001010 (0A) according to deblobbed_descriptor.bin. Is 0000101 (in the datasheet) a typo that actually means 00001010? */
/* most significant bits */
};
/*
* Word 17h: LED 1 Configuration and Power Management
*
* Default values for LEDCTL register fields controlling LED1 (LINK_1000)
* output behaviours and OEM fields that define PHY power management
* parameters loaded to the PHY_CTRL register.
*/
struct LED_CTL_1 {
/* least significant bits */
/* See page 16 in the datasheet to show the different modes. deblobbed_descriptor.bin has "ACTIVITY" mode set */
uint8_t led1Mode : 4; /* Default value 0111 (bin) 7 (hex) says datasheet. 1011 (bin) B (hex) according to deblobbed_descriptor.bin */
uint8_t reserved1 : 1; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t led1BlinkMode : 1; /* 0 = slow blink, 1 = fast blink. should be identical to led0 blink mode. Default is 0 according to datasheet and deblobbed_descriptor.bin */
/* By setting this and led0 blink mode (see word 18h) to 1, you could enable a faster blinking on the LED's where the ethernet cable goes
* on the gigabit ethernet port. Not really useful. Slow blink is fine, and probably better (the LED will probably last longer) */
uint8_t led1Invert : 1; /* initial value of LED1_IVRT field. 0 = led1 has active low output, 1 is high active output. Default is 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t led1Blink : 1; /* 1 = led1 blinks, 0 = it does not. default 0 according to datasheet, but it's 1 in deblobbed_descriptor.bin */
uint8_t reserved2 : 1; /* Reserved. should be 1 according to datasheet and deblobbed_descriptor.bin */
uint8_t lpluEnable : 1; /* Low Power Link Up. Enable links at lowest supported speed by both link partners in all power states. 1=enabled(all power states), 0=disabled. Default is 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t lpluEnableNonD0a : 1; /* Low Power Link up (non-D0a states). Same as above but only for non-D0a states. default is 1 according to and deblobbed_descriptor.bin */
uint8_t gbeDisableNonD0a : 1; /* If set to 1, disable gigabit speeds in non-D0a power states. Must be 1 (according to datasheet) because GbE is not supported in Sx mode. It's also set to 1 in deblobbed_descriptor.bin */
uint8_t reserved3 : 2; /* Reserved. Datasheet says both bits should be 0 (confirmed in deblobbed_descriptor.bin) */
uint8_t gbeDisable : 1; /* When 1, gigabit speeds are disabled in all power states including D0a. Default is 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t reserved4 : 1; /* Reserved. Should be 1, according to datasheet and deblobbed_descriptor.bin */
/* most significant bits */
};
/*
* Word 18: LED 0 and 2 Configuration Defaults
*
* Hardware defaults for LEDCTL register fields controlling LED0 (LINK/ACTIVITY)
* and LED2 (LINK_100) output behaviours.
*/
struct LED_CTL_02 {
/* least significant bits */
/* see page 16 in datasheet to show the different modes. deblobbed_descriptor has "LINK-UP" mode set */
uint8_t led0Mode : 4; /* default value 0100 (bin) or 4 (hex) according to datasheet. It's 0010 (bin) or 2 (hex) according to deblobbed_descriptor.bin */
uint8_t reserved1 : 1; /* Reserved. Should be set to 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t led0BlinkMode : 1; /* This should be the same as led1BlinkMode (see word 17h). Default is 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t led0Invert : 1; /* initial value of LED0_IVRT field. 0 = led0 has active low output, 1 is high active output. Default is 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t led0Blink : 1; /* LED0_BLINK field. Should be 0 according to datasheet and deblobbed_descriptor.bin */
/* see page 16 in datasheet to shew the different modes. deblobbed_descriptor has "LINK_100" mode set */
uint8_t led2Mode : 4; /* default value 0110 (bin) or 6 (hex) according to datasheet and deblobbed_descriptor.bin */
uint8_t reserved2 : 1; /* Reserved. Should be 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t led2BlinkMode : 1; /* 0 = slow blink. 1 = fast. default 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t led2Invert : 1; /* LED2_IVRT field. Should be 0 according to datasheet and deblobbed_descriptor.bin */
uint8_t led2Blink : 1; /* LED2_BLINK field. should be 0 according to datasheet and deblobbed_descriptor.bin */
/* most significant bits */
};
/* Word 30h */
struct GBE_PXE_BOOT_AGENT_MAIN_SETUP_OPTIONS {
/* least significant bits */
uint8_t protocolSelect : 2; /* Default 00 binary (PXE) according to datasheet. 01 is reserved. 10/11 are undefined. deblobbed_descriptor.bin says 00 */
uint8_t reserved1 : 1; /* Reserved. deblobbed_descriptor.bin says 0 */
uint8_t defaultBootSelection : 2; /* deblobbed_descriptor.bin says 00 (binary). 00 is network boot, then local. 01 is local boot, then network. 10 is network boot only. 11 is local boot only */
uint8_t reserved2 : 1; /* Reserved. deblobbed_descriptor.bin says 0. */
uint8_t promptTime : 2; /* deblobbed_descriptor.bin says 00. delay for how long "press ctrl-s" setup prompt message appears. 00 = 2 secs, 01 is 3 secs, 10 is 5 secs, 11 is 0 secs. */
uint8_t displaySetupMessage : 1; /* default 1 says datasheet. deblobbed_descriptor.bin says 1. if 1, "ctrl-s" setup prompt message appears after the title message. */
uint8_t reserved3 : 1; /* Datasheet says to set 0. deblobbed_descriptor.bin says 0. */
uint8_t forceSpeed : 2; /* deblobbed_descriptor.bin says 00. 00 = auto-negotiate, 01 = 10Mbps, 10 = 100Mbps, 11 = "not allowed" */
uint8_t forceFullDuplex : 1; /* deblobbed_descriptor.bin says 0. Only relevant when bits 10/11 are set; if so, then: 0 = half duplex, 1 = full duplex */
uint8_t reserved4 : 1; /* Reserved. deblobbed_descriptor.bin says 0. datasheet recommends 0. */
uint8_t efiPresence : 1; /* 1 means that an EFI image is present (0 means not present). deblobbed_descriptor.bin says 0. if 1, eeprom word 33h (efi version) becomes valid. if pxePresent is 1, that means EFI and PXE are both present.*/
uint8_t pxePresence : 1; /* 0 means that a PXE image is present. 1 means to pxe present. deblobbed_descriptor.bin says 0. if 0, then word 32h (PXE version) in eeprom becomes valid */
/* most significant bits */
/* This whole data structure is pointless, since libreboot doesn't (read: won't)
* include the proprietary intel boot agent. Struct exists here simply for documentations sake. */
};
/* Word 31h */
struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_31H {
/* least significant bits */
uint8_t disableSetupMenu : 1; /* 1 means invoking setup menu with ctrl-s won't work. deblobbed_descriptor.bin says 0 (as is default, per datasheet) */
uint8_t disableTitleMessage : 1; /* 1 means that title in boot agent screen is suppressed, as is ctrl-s message. default is 0, and deblobbed_descriptor.bin says 0 */
uint8_t disableProtocolSelect : 1; /* 1 means no changes to boot protocol are allowed. default is 0, and deblobbed_descriptor.bin says 0 */
uint8_t disableBootSelection : 1; /* 1 means no changes in boot order option menu are allowed. default is 0, and deblobbed_descriptor.bin says 0 */
uint8_t disableLegacyWakeupSupport : 1; /* 1 means no changes in legacy wakeup support menu is allowed. default is 0, and deblobbed_descriptor.bin says 0 */
uint8_t disableFlashUpdate : 1; /* 1 means no changes to flash image using PROset is allowed. default is 0, and deblobbed_descriptor.bin says 0 */
uint8_t reserved1 : 2; /* Reserved. Datasheet says these must be 0, and deblobbed_descriptor.bin sets them to 0. */
/*
* deblobbed_descriptor says 000
* 000 = normal behaviour
* see datasheet (page 21) for other modes.
*/
uint8_t ibaBootOrderSetupMode : 3;
uint8_t reserved2 : 3; /* Reserved. Datasheet says these must be set to 0, and deblobbed_descriptor.bin sets them to 0. */
uint8_t signature : 2; /* Must be set to 01 to indicate that this whole word has been configured by the agent or other software. deblobbed_descriptor.bin says 01. */
/* most significant bits */
/* This whole data structure is pointless, since libreboot doesn't (read: won't)
* include the proprietary intel boot agent. Struct exists here simply for documentations sake. */
};
/* Word 32h */
struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_32H {
/* least significant bits */
uint8_t buildNumber : 8; /* PXE boot agent build number. default is 28 (hex). deblobbed_descriptor.bin says 18 (hex) */
uint8_t minorVersionNumber : 4; /* PXE boot agent minor number. default is 2 (hex). deblobbed_descriptor.bin says 3 (hex) */
uint8_t majorVersionNumber : 4; /* PXE boot agent major number. default is F (hex). deblobbed_descriptor.bin says 1 (hex) */
/* most significant bits */
/* This whole data structure is pointless, since libreboot doesn't (read: won't)
* include the proprietary intel boot agent. Struct exists here simply for documentations sake. */
};
/* Word 33h */
struct GBE_PXE_IBA_CAPABILITIES {
/* least significant bits */
uint8_t baseCodePresent : 1; /* 0 means PXE base code is indicated as being present. 1 (default) means not. deblobbed_descriptor.bin says 1 */
uint8_t undiCapabilityPresent : 1; /* 1 (default) means pxe/undi capability is indicated present. 0 means not present. deblobbed_descriptor.bin says 1 */
uint8_t reserved1 : 1; /* Reserved. Must be 1. deblobbed_descriptor.bin says 1 */
uint8_t efiUndiCapabilityPresent : 1; /* EFI UNDI capability present: 0 (default) means not present. 1 means present. deblobbed_descriptor.bin says 0 */
uint8_t reserved2_0 : 4; /* reserved. all bits must be 0. deblobbed_descriptor.bin sets them to 0. */
uint8_t reserved2_1 : 6; /* ^ part of reserved2_0. split this way so that the bitfields align */
uint8_t signature : 2; /* must be 01 to indicate that the word is configured by the agent or other software. deblobbed_descriptor.bin says 01 */
/* most significant bits */
/* This whole data structure is pointless, since libreboot doesn't (read: won't)
* include the proprietary intel boot agent. Struct exists here simply for documentations sake. */
};
/* Words 30h to 3Eh */
struct GBE_PXE_SOFTWARE_REGION {
struct GBE_PXE_BOOT_AGENT_MAIN_SETUP_OPTIONS bootAgentMainSetupOptions; /* Word 30h */
struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_31H bootAgentConfigurationCustomizationOptions31h; /* Word 31h */
struct GBE_PXE_BOOT_AGENT_CONFIGURATION_CUSTOMIZATION_OPTIONS_32H bootAgentConfigurationCustomizationOptions32h; /* Word 32h */
struct GBE_PXE_IBA_CAPABILITIES ibaCapabilities; /* Word 33h */
/* Words 34h to 3Eh (padding). Set these to 0xFFFF (according to deblobbed_descriptor.bin) */
uint16_t paddingWords34hTo3Eh[11];
/*
* the pxe software region is practically useless in libreboot, since
* libreboot does not include the intel boot agent (it's proprietary software).
*
* Having this struct in place is simply for documentations sake. It is completely
* irrelevant what you put here. filling it with 0xFFFF would probably be fine.
*/
};
struct GBEREGIONRECORD_4K {
uint8_t macAddress[6]; /* Word 00 to 02 */
struct GBE_RESERVED_WORD_03H reservedWord03h; /* Reserved word 03. */
uint16_t reservedWord04h; /* Reserved word 04: set it to 0xFFFF (according to datasheet and deblobbed_descriptor.bin) */
uint16_t imageVersionInformation; /* Reserved word 05: 83 10 (little endian) in my deblobbed_descriptor.bin. Set this to 0x1083 (in C, assuming little endian byte order). "cannot be changed" according to datasheet */
uint16_t reservedWords06h07h[2]; /* Reserved words 06-07: set both to 0xFFFF (according to datasheet and deblobbed_descriptor.bin) */
/*
* Word 08 and 09 (pba low and pba high):
*
* Both of these should be set to 0xFFFF by default, according to the datasheet.
* "nine digit printed board assembly (PBA) number" for intel cards to be stored
* in a 4 byte (read: 2 word) field.
*
* Example: if pba number is 123456-003, then word 08 should be 1234h and word 09 becomes 5603.
* Note: 1234 and 5603 above are big endian. In the image it would actually be 34 12 and 0356
*
* Example: in mine it was (in the image): 08 10 FF FF. That becomes 1008h and FFFFh, or
* basically: 1008FF-0FF. The same was observed in another.
*
* Setting it to FF FF FF FF should be fine, according to the datasheet.
*/
uint16_t pbaLow; /* Word 08. Set it to 0x1008 (according to deblobbed_descriptor.bin). */
uint16_t pbaHigh; /* Word 09. Set it to 0xFFFF (according to deblobbed_descriptor.bin). */
/* Word 0A */
struct GBE_PCI_INITIALIZATION_CONTROL_WORD pciInitializationControlWord;
/*
* Word 0B; subsystem ID
*
* If load subsystem ID bit of word 0A (pci init control word) is
* set to 1 (read: it is. in my deblobbed_descriptor.bin), store
* the subsystem id here. Datasheet says that the default value is
* 0000h, but you should set this to 20EEh (little endian: EE 20)
*/
uint16_t subsystemId; /* Set this to 0x20EE */
/*
* Word 0C; subsystem vendor ID
*
* If load subsystem vendor ID bit of word 0A (pci init control word)
* is set to 1 (read: it is. in my deblobbed_descriptor.bin), store
* the subsystem vendor id here. Datasheet says that the default
* value is 8086h, but you should set this to 17AAh (lendian: AA 17).
*/
uint16_t subsystemVendorId; /* Set this to 0x17AA */
/*
* Word 0D: device ID
*
* If load vendor/device ID in word 0A (pci init control word) is 1
* (it is) then this word is used to init device id using word 21h,
* 1Eh or 1Fh. In my case, deviceId is 0x10F5. Word 21h is set to
* 0x10CB, word 1Eh is 0x10F5 and 1Fh is 0x10BF
*
* The datasheet says that 10F5 is for Intel 82567LM gigabit ethernet
* controller; 10BF is for Intel 82567LF and 10CB is for Intel 82567V.
*
* Based on this, the X200 is shown to have the Intel 82567LM ethernet
* controller.
*/
uint16_t deviceId; /* Set this to 0x10F5. */
/* It is important that this is correct, for the linux kernel driver */
/*
* Word 0E: vendor ID
*
* If load vendor/device ID in word 0A (pci init control) is 1 (it is),
* then this word used read to initialize the PCI vendor ID. Default
* value is 8086 according to datasheets, and deblobbed_descriptor.bin.
*
* Intel is often 8086 as a PCI vendor ID. Because 8086. As in the CPU architecture.
*/
uint16_t vendorId;
uint16_t deviceRevId; /* Word 0F: reserved bits. Set all bits to 0. */
struct GBE_LAN_POWER_CONSUMPTION lanPowerConsumption; /* Word 10: LAN Power Consumption (see struct definition) */
uint16_t reservedWords11h12h[2]; /* Words 11-12: Reserved. Set both of them to 0x0000 (according to datasheet). */
/* Word 13: Shared Initialization Control Word */
struct GBE_SHARED_INITIALIZATION_CONTROL_WORD sharedInitializationControlWord;
/* Word 14: Extended Configuration Control Word 1 */
struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_1 extendedConfigurationControlWord1;
/* Word 15: Extended Configuration Control Word 2 */
struct GBE_EXTENDED_CONFIGURATION_CONTROL_WORD_2 extendedConfigurationControlWord2;
/* Word 16: Extended Configuration Control Word 3 */
/* All bits reserved. Datasheet and deblobbed_descriptor.bin say to set it to zero */
uint16_t extendedConfigurationControlWord3;
struct LED_CTL_1 ledCtl1; /* Word 17: LED 1 Configuration and Power Management */
struct LED_CTL_02 ledCtl02; /* Word 18: LED 0 and 2 Configuration Defaults */
uint16_t reservedWord19h; /* Word 19: Reserved. Default is 0x2B00 according to datasheet, but in deblobbed_descriptor.bin it is 0x2B40 */
uint16_t reservedWord1Ah; /* Word 1A: Reserved. Default is 0x0043 according to datasheet and deblobbed_descriptor.bin */
uint16_t reservedWord1Bh; /* Word 1B: Reserved. Should be 0x0000 according to datasheet and deblobbed_descriptor.bin */
uint16_t reservedWord1Ch; /* Word 1C: Reserved. Should be 0x10F5 according to datasheet and deblobbed_descriptor.bin */
uint16_t reservedWord1Dh; /* Word 1D: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */
uint16_t _82567lmDeviceId; /* Word 1E: Device ID for Intel 82567LM gigabit ethernet controller (note: X200 uses this). Should be 0x10F5 according to datasheet and deblobbed_descriptor.bin*/
uint16_t _82567lfDeviceId; /* Word 1F: Device ID for Intel 82567LF gigabit ethernet controller. Should be 0x10BF according to datasheet and deblobbed_descriptor.bin */
uint16_t reservedWord20h; /* Word 20: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */
uint16_t _82567vDeviceId; /* Word 21: Device ID for Intel 82567V gigabit ethernet controller. Should be 0x10CB according to datasheet and deblobbed_descriptor.bin */
uint16_t reservedWord22h; /* Word 22: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */
uint16_t reservedWord23h; /* Word 23: Reserved. Should be 0xBAAD according to datasheet and deblobbed_descriptor.bin */
uint16_t reservedWords24to2Fh[12]; /* Words 24-2F: Reserved. These should all be 0x0000 according to datasheet and deblobbed_descriptor.bin */
struct GBE_PXE_SOFTWARE_REGION pxeSoftwareRegion; /* Words 30-3E: PXE Software Region */
uint16_t checkSum; /* when added to the sum of all words above, this should match GBECHECKSUMTOTAL */
/* set all bytes in here to 0xFF */
uint8_t padding[3968];
};
/* main and backup region in gbe */
struct GBEREGIONRECORD_8K {
struct GBEREGIONRECORD_4K main;
struct GBEREGIONRECORD_4K backup;
/*
* Backup region:
* This is actually "main" on X200, since the real main has a bad checksum
* and other errors. You should do what you need on this one (if modifying
* lenovobios's gbe region) and then copy to main
*/
};
/*
* ---------------------------------------------------------------------
* Function declarations (keep gcc/make happy. check them in gbe.c)
* ---------------------------------------------------------------------
*/
uint16_t gbeGetChecksumFrom4kBuffer(uint16_t* gbeWord, uint16_t desiredValue, int gbeRegionBase);
uint16_t gbeGetChecksumFrom4kStruct(struct GBEREGIONRECORD_4K gbeStruct4k, uint16_t desiredValue);
struct GBEREGIONRECORD_8K deblobbedGbeStructFromFactory(struct GBEREGIONRECORD_8K factoryGbeStruct8k);
int notCreatedHFileForGbeCFile(char* outFileName, char* cFileName);
int notCreatedCFileFromGbeStruct4k(struct GBEREGIONRECORD_4K gbeStruct4k, char* outFileName, char* headerFileName);
int showGbeData(struct GBEREGIONRECORD_4K gbeStruct4k);
void printGbeChecksumDataFromStruct4k(struct GBEREGIONRECORD_4K gbeStruct4k, char* romName, char* regionName);
void printGbeChecksumDataFromStruct8k(struct GBEREGIONRECORD_8K gbeStruct8k, char* romName);
#endif

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@ -1,231 +0,0 @@
/*
* ich9deblob.c
* This file is part of the ich9deblob utility from the libreboot project
*
* Purpose: disable and remove the ME from ich9m/gm45 systems in coreboot.
*
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
* Copyright (C) 2014,2015,2019 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* Initially based on proof of concept by Steve Shenton. */
/* Original utility can be found at https://gitorious.org/ich9descriptortool */
/*
* Read a factory.rom dump (ich9m/gm45 systems) and
* modify the flash descriptor to remove all regions except descriptor,
* Gbe and BIOS. Set BIOS region to full size of the ROM image (after
* the flash descriptor and gbe). Basically, deblob the descriptor.
*
* This will will generate a concatenated descriptor+gbe dump suitable
* for use in libreboot. Currently tested: ThinkPad X200 (coreboot/libreboot)
*/
/*
* See docs/hardware/x200_remove_me.html for info plus links to datasheet (also linked below)
*
* Info about flash descriptor (read page 845 onwards):
* http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf
*
* Info about Gbe region (read whole datasheet):
* http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf
* https://web.archive.org/web/20150912070329/https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums
*/
#include "ich9deblob.h"
int main(int argc, char *argv[])
{
struct DESCRIPTORREGIONRECORD descriptorStruct;
uint8_t* descriptorBuffer = (uint8_t*)&descriptorStruct;
struct GBEREGIONRECORD_8K gbeStruct8k;
uint8_t* gbeBuffer8k = (uint8_t*)&gbeStruct8k;
uint32_t gbeRegionStart;
char* romFilename = "factory.rom";
if(argc>1) {
romFilename = argv[1];
}
char* descriptorGbeFilename = "deblobbed_descriptor.bin";
char* descriptorNoGbeFilename = "deblobbed_4kdescriptor.bin";
unsigned int bufferLength;
unsigned int romSize;
/*
* ------------------------------------------------------------------
* Compatibility checks. This version of ich9deblob is not yet portable.
* ------------------------------------------------------------------
*/
if (systemOrCompilerIncompatible(descriptorStruct, gbeStruct8k)) return 1;
/* If true, fail with error message */
/*
* ------------------------------------------------------------------
* Extract the descriptor and gbe regions from the factory.rom dump
* ------------------------------------------------------------------
*/
FILE* fp = NULL;
fp = fopen(romFilename, "rb"); /* open factory.rom */
if (NULL == fp)
{
printf("\nerror: could not open %s\n", romFilename);
fclose(fp);
return 1;
}
printf("\n%s opened successfully\n", romFilename);
/*
* Get the descriptor region dump from the factory.rom
* (goes in factoryDescriptorBuffer variable)
*/
bufferLength = fread(descriptorBuffer, 1, DESCRIPTORREGIONSIZE, fp);
if (DESCRIPTORREGIONSIZE != bufferLength) //
{
printf("\nerror: could not read descriptor from %s (%i) bytes read\n", romFilename, bufferLength);
fclose(fp);
return 1;
}
printf("\ndescriptor region read successfully\n");
if(!validDescriptor(descriptorStruct)) {
printf("Invalid input: incorrect signature in the given descriptor.");
fclose(fp);
return 1;
}
if (descriptorDefinesGbeRegion(descriptorStruct))
{
gbeRegionStart = descriptorStruct.regionSection.flReg3.BASE << FLREGIONBITSHIFT;
/*
* Set offset so that we can read the data from
* the gbe region
*/
fseek(fp, gbeRegionStart, SEEK_SET);
/* Read the gbe data from the factory.rom and put it in factoryGbeBuffer8k */
bufferLength = fread(gbeBuffer8k, 1, GBEREGIONSIZE_8K, fp);
if (GBEREGIONSIZE_8K != bufferLength)
{
printf("\nerror: could not read GBe region from %s (%i) bytes read\n", romFilename, bufferLength);
fclose(fp);
return 1;
}
printf("\ngbe (8KiB) region read successfully\n");
}
fseek(fp, 0L, SEEK_END);
romSize = ftell(fp);
printf("\n%s size: [%i] bytes\n", romFilename, romSize);
fclose(fp);
/* Debugging (before modification) */
printDescriptorRegionLocations(descriptorStruct, "Original");
if (descriptorDefinesGbeRegion(descriptorStruct))
printGbeChecksumDataFromStruct8k(gbeStruct8k, "Original");
else printf("NO GBE REGION\n");
/*
* ------------------------------------------------------------------
* Modify the descriptor and gbe regions, ready to go in libreboot.rom
* ------------------------------------------------------------------
*/
/* Delete the ME/Platform regions, place Gbe after the descriptor, resize BIOS region to fill the gap */
descriptorStruct = librebootDescriptorStructFromFactory(descriptorStruct, romSize);
/* The ME is disallowed read-write access to all regions
* (this is probably redundant, since the ME firmware is already removed from libreboot) */
descriptorStruct = descriptorMeRegionsForbidden(descriptorStruct);
/* Host/CPU is allowed to read/write all regions.
* This makes flashrom -p internal work */
descriptorStruct = descriptorHostRegionsUnlocked(descriptorStruct);
/* Set OEM string */
descriptorStruct = descriptorOemString(descriptorStruct);
/* Modify the Gbe region (see function for details) */
if (descriptorDefinesGbeRegion(descriptorStruct))
gbeStruct8k = deblobbedGbeStructFromFactory(gbeStruct8k);
/* Debugging (after modifying the descriptor and gbe regions) */
printDescriptorRegionLocations(descriptorStruct, "Modified");
if (descriptorDefinesGbeRegion(descriptorStruct))
printGbeChecksumDataFromStruct8k(gbeStruct8k, "Modified");
else printf("NO GBE REGION\n");
/*
* ------------------------------------------------------------------
* Create the file with the modified descriptor and gbe inside
* ------------------------------------------------------------------
*/
printf("\n");
if (descriptorDefinesGbeRegion(descriptorStruct))
{
if (notCreatedDescriptorGbeFile(descriptorStruct, gbeStruct8k, descriptorGbeFilename)) {
return 1;
}
}
else
{
if (notCreated4kDescriptorFile(descriptorStruct, descriptorNoGbeFilename)) {
return 1;
}
}
/*
* ------------------------------------------------------------------
* Generate ich9gen data (C code that will recreate the deblobbed descriptor+gbe from scratch)
* ------------------------------------------------------------------
*/
/* Code for generating the Descriptor struct */
/* mkdescriptor.h */
if (notCreatedHFileForDescriptorCFile("mkdescriptor.h", "mkdescriptor.c")) {
return 1;
} /* and now mkdescriptor.c */
if (notCreatedCFileFromDescriptorStruct(descriptorStruct, "mkdescriptor.c", "mkdescriptor.h")) {
return 1;
}
if (descriptorDefinesGbeRegion(descriptorStruct))
{
/* Code for generating the Gbe struct */
/* mkgbe.h */
if (notCreatedHFileForGbeCFile("mkgbe.h", "mkgbe.c")) {
return 1;
} /* and now mkgbe.c */
if (notCreatedCFileFromGbeStruct4k(gbeStruct8k.backup, "mkgbe.c", "mkgbe.h")) {
return 1;
}
}
if (descriptorDefinesGbeRegion(descriptorStruct))
{
printf("The modified descriptor and gbe regions have also been dumped as src files: mkdescriptor.c, mkdescriptor.h, mkgbe.c, mkgbe.h\n");
printf("To use these in ich9gen, place them in src/ich9gen/ and re-build ich9gen.\n\n");
}
else
{
printf("The modified descriptor region have also been dumped as src files: mkdescriptor.c, mkdescriptor.h\n");
printf("To use these in ich9gen, place them in src/ich9gen/ and re-build ich9gen.\n\n");
}
return 0;
}

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@ -1,38 +0,0 @@
/*
* ich9deblob.h
* This file is part of the ich9deblob utility from the libreboot project
*
* Purpose: header file for ich9deblob.c
*
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
* Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef ICH9DEBLOB_H
#define ICH9DEBLOB_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "common/descriptor_gbe.h" /* common descriptor/gbe functions used by ich9deblob */
#include "common/x86compatibility.h" /* system/compiler compatibility checks. This code is not portable. */
#include "descriptor/descriptor.h" /* structs describing what's in the descriptor region */
#include "gbe/gbe.h" /* structs describing what's in the gbe region */
int main();
#endif

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@ -1,203 +0,0 @@
/*
* Copyright (C) 2014, 2015, 2019 Leah Rowe <info@minifree.org>
* Copyright (C) 2016 Swift Geek <swiftgeek@gmail.com>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* Generate deblobbed descriptor and gbe 12KiB file from scratch
* without relying on a factory.rom dump */
#include "ich9gen.h"
int main(int argc, char *argv[])
{
int i, j;
struct GBEREGIONRECORD_8K gbeStruct8k = generatedGbeStruct8k();
struct DESCRIPTORREGIONRECORD descriptorStruct4M = generatedDescriptorStruct(ROMSIZE_4MB, WITHGBE);
struct DESCRIPTORREGIONRECORD descriptorStruct8M = generatedDescriptorStruct(ROMSIZE_8MB, WITHGBE);
struct DESCRIPTORREGIONRECORD descriptorStruct16M = generatedDescriptorStruct(ROMSIZE_16MB, WITHGBE);
struct DESCRIPTORREGIONRECORD descriptorStructNoGbe4M = generatedDescriptorStruct(ROMSIZE_4MB, WITHOUTGBE);
struct DESCRIPTORREGIONRECORD descriptorStructNoGbe8M = generatedDescriptorStruct(ROMSIZE_8MB, WITHOUTGBE);
struct DESCRIPTORREGIONRECORD descriptorStructNoGbe16M = generatedDescriptorStruct(ROMSIZE_16MB, WITHOUTGBE);
/* Only for the compatibility checks */
struct DESCRIPTORREGIONRECORD dummyDescriptorStruct;
struct GBEREGIONRECORD_8K dummyGbeStruct8k;
/*
* ------------------------------------------------------------------
* Compatibility checks. This version of ich9deblob is not yet portable.
* ------------------------------------------------------------------
*/
if (systemOrCompilerIncompatible(dummyDescriptorStruct, dummyGbeStruct8k)) return 1;
/* If true, fail with error message */
/*
* ------------------------------------------------------------------
* Arguments given on the terminal
* ------------------------------------------------------------------
*/
if(argc==3) {
/* If user provides their own MAC address, it will be used.
* Otherwise, ich9gen will simply use the default one.
*
* However, if the user provides an invalid MAC address, then ich9gen
* will exit. */
if(0==strcmp(argv[1],"--macaddress")) {
/* 6 hex chars format (example): AA:BB:CC:DD:EE:FF */
if (strlen(argv[2]) != 17) {
printf("ich9gen: invalid mac address format (wrong length)\n");
return 1;
}
for(i=2; i<14; i+=3) {
if(argv[2][i]!=':') {
printf("ich9gen: invalid mac address format (non-colon characters used as spacing)\n");
return 1;
}
}
for(i=0; i<6; i++) {
gbeStruct8k.main.macAddress[i] = 0;
/* Go through each nibble of the byte */
for(j=0; j<2; j++) {
if(argv[2][(i*3)+j]>='a' && argv[2][(i*3)+j]<='f')
gbeStruct8k.main.macAddress[i] |= (uint8_t)((argv[2][(i*3)+j] - 87) << ((j^1) << 2));
else if(argv[2][(i*3)+j]>='A' && argv[2][(i*3)+j]<='F')
gbeStruct8k.main.macAddress[i] |= (uint8_t)((argv[2][(i*3)+j] - 55) << ((j^1) << 2));
else if(argv[2][(i*3)+j]>='0' && argv[2][(i*3)+j]<='9')
gbeStruct8k.main.macAddress[i] |= (uint8_t)((argv[2][(i*3)+j] - 48) << ((j^1) << 2));
else {
printf("ich9gen: invalid mac address format (non-hex characters)\n");
return 1;
}
}
}
gbeStruct8k.main.checkSum = gbeGetChecksumFrom4kStruct(gbeStruct8k.main, GBECHECKSUMTOTAL); /* Fix the checksum */
memcpy(&gbeStruct8k.backup, &gbeStruct8k.main, GBEREGIONSIZE_4K); /* Copy to the backup */
/* Generate ich9gen data (C code for Gbe region): */
/* mkgbe.h */
if (notCreatedHFileForGbeCFile("mkgbe.h", "mkgbe.c")) {
return 1;
} /* and now mkgbe.c */
if (notCreatedCFileFromGbeStruct4k(gbeStruct8k.backup, "mkgbe.c", "mkgbe.h")) {
return 1;
}
printf("You selected to change the MAC address in the Gbe section. This has been done.\n\n");
printf("The modified gbe region has also been dumped as src files: mkgbe.c, mkgbe.h\n");
printf("To use these in ich9gen, place them in src/ich9gen/ and re-build ich9gen.\n\n");
}
}
/*
* ------------------------------------------------------------------
* Generate the 12KiB files, ready to be used in a libreboot image
* ------------------------------------------------------------------
*/
if (notCreatedDescriptorGbeFile(descriptorStruct4M, gbeStruct8k, "ich9fdgbe_4m.bin")) {
return 1;
}
if (notCreatedDescriptorGbeFile(descriptorStruct8M, gbeStruct8k, "ich9fdgbe_8m.bin")) {
return 1;
}
if (notCreatedDescriptorGbeFile(descriptorStruct16M, gbeStruct8k, "ich9fdgbe_16m.bin")) {
return 1;
}
/*
* ------------------------------------------------------------------
* Generate the 12KiB files, ready to be used in a libreboot image
* These are special descriptor files where the flash chip is set to read-only
* in FLMSTR1
* ------------------------------------------------------------------
*/
descriptorStruct4M = descriptorHostRegionsReadOnly(descriptorStruct4M);
descriptorStruct8M = descriptorHostRegionsReadOnly(descriptorStruct8M);
descriptorStruct16M = descriptorHostRegionsReadOnly(descriptorStruct16M);
if (notCreatedDescriptorGbeFile(descriptorStruct4M, gbeStruct8k, "ich9fdgbe_4m_ro.bin")) {
return 1;
}
if (notCreatedDescriptorGbeFile(descriptorStruct8M, gbeStruct8k, "ich9fdgbe_8m_ro.bin")) {
return 1;
}
if (notCreatedDescriptorGbeFile(descriptorStruct16M, gbeStruct8k, "ich9fdgbe_16m_ro.bin")) {
return 1;
}
/*
* ------------------------------------------------------------------
* Generate the 4KiB files (descriptors without GbE), ready to be used in a libreboot image
* In these descriptors, the onboard Intel GbE NIC is disabled; a discrete one is used instead
* ------------------------------------------------------------------
*/
if (notCreated4kDescriptorFile(descriptorStructNoGbe4M, "ich9fdnogbe_4m.bin")) {
return 1;
}
if (notCreated4kDescriptorFile(descriptorStructNoGbe8M, "ich9fdnogbe_8m.bin")) {
return 1;
}
if (notCreated4kDescriptorFile(descriptorStructNoGbe16M, "ich9fdnogbe_16m.bin")) {
return 1;
}
/*
* ------------------------------------------------------------------
* Generate the 4KiB files (descriptors without GbE), ready to be used in a libreboot image
* In these descriptors, the onboard Intel GbE NIC is disabled; a discrete one is used instead
*
* This is a special version where the flash chip is read-only as specified
* in flmstr1
*
* ------------------------------------------------------------------
*/
descriptorStructNoGbe4M = descriptorHostRegionsReadOnly(descriptorStructNoGbe4M);
descriptorStructNoGbe8M = descriptorHostRegionsReadOnly(descriptorStructNoGbe8M);
descriptorStructNoGbe16M = descriptorHostRegionsReadOnly(descriptorStructNoGbe16M);
if (notCreated4kDescriptorFile(descriptorStructNoGbe4M, "ich9fdnogbe_4m_ro.bin")) {
return 1;
}
if (notCreated4kDescriptorFile(descriptorStructNoGbe8M, "ich9fdnogbe_8m_ro.bin")) {
return 1;
}
if (notCreated4kDescriptorFile(descriptorStructNoGbe16M, "ich9fdnogbe_16m_ro.bin")) {
return 1;
}
return 0;
}

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@ -1,39 +0,0 @@
/*
* Copyright (C) 2014 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* Header file for ich9gen.c */
#ifndef ICH9GEN_H
#define ICH9GEN_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "ich9gen/mkdescriptor.h"
#include "ich9gen/mkgbe.h"
#include "common/descriptor_gbe.h" /* common descriptor/gbe functions used by ich9deblob */
#include "common/x86compatibility.h" /* system/compiler compatibility checks. This code is not portable. */
#include "descriptor/descriptor.h" /* structs describing what's in the descriptor region */
#include "gbe/gbe.h" /* structs describing what's in the gbe region */
#define WITHGBE 1
#define WITHOUTGBE 0
int main(int argc, char *argv[]);
#endif

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/*
* Copyright (C) 2014, 2015 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "mkdescriptor.h"
/* Generate a 4KiB Descriptor struct, with default values. */
/* Read ../descriptor/descriptor.h for an explanation of the default values used here */
struct DESCRIPTORREGIONRECORD generatedDescriptorStruct(unsigned int romSize, int hasGbe)
{
int i;
struct DESCRIPTORREGIONRECORD descriptorStruct;
/* Flash Valid Signature Register */
descriptorStruct.flValSig.signature = 0x0ff0a55a;
/* Flash Map Registers */
/* FLMAP0 */
descriptorStruct.flMaps.flMap0.FCBA = 0x01;
descriptorStruct.flMaps.flMap0.NC = 0x0;
descriptorStruct.flMaps.flMap0.reserved1 = 0x00;
descriptorStruct.flMaps.flMap0.FRBA = 0x04;
descriptorStruct.flMaps.flMap0.NR = hasGbe ? 0x2 : 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.flMaps.flMap0.reserved2 = 0x00;
/* FLMAP1 */
descriptorStruct.flMaps.flMap1.FMBA = 0x06;
descriptorStruct.flMaps.flMap1.NM = 0x2;
descriptorStruct.flMaps.flMap1.reserved = 0x00;
descriptorStruct.flMaps.flMap1.FISBA = 0x10;
descriptorStruct.flMaps.flMap1.ISL = 0x02;
/* FLMAP2 */
descriptorStruct.flMaps.flMap2.FMSBA = 0x20;
descriptorStruct.flMaps.flMap2.MSL = 0x01;
descriptorStruct.flMaps.flMap2.reserved = 0x0000;
/* Component Section Record */
/* FLCOMP */
descriptorStruct.componentSection.flcomp.component1Density = componentDensity(romSize);
descriptorStruct.componentSection.flcomp.component2Density = componentDensity(romSize);
descriptorStruct.componentSection.flcomp.reserved1 = 0x0;
descriptorStruct.componentSection.flcomp.reserved2 = 0x00;
descriptorStruct.componentSection.flcomp.reserved3 = 0x0;
descriptorStruct.componentSection.flcomp.readClockFrequency = 0x0;
descriptorStruct.componentSection.flcomp.fastReadSupport = 0x1;
descriptorStruct.componentSection.flcomp.fastreadClockFrequency = 0x1;
descriptorStruct.componentSection.flcomp.writeEraseClockFrequency = 0x0;
descriptorStruct.componentSection.flcomp.readStatusClockFrequency = 0x0;
descriptorStruct.componentSection.flcomp.reserved4 = 0x0;
/* FLILL */
descriptorStruct.componentSection.flill = 0x00000000;
/* FLPB */
descriptorStruct.componentSection.flpb = 0x00000000;
/* Padding */
for (i = 0; i < 36; i++) {
descriptorStruct.componentSection.padding[i] = 0xFF;
}
/* Flash Descriptor Region Section */
/* FLREG0 (Descriptor) */
descriptorStruct.regionSection.flReg0.BASE = 0x0000;
descriptorStruct.regionSection.flReg0.reserved1 = 0x0;
descriptorStruct.regionSection.flReg0.LIMIT = 0x0000;
descriptorStruct.regionSection.flReg0.reserved2 = 0x0;
/* FLREG1 (BIOS) */
descriptorStruct.regionSection.flReg1.BASE = (DESCRIPTORREGIONSIZE + (hasGbe ? GBEREGIONSIZE_8K : 0)) >> FLREGIONBITSHIFT; /* see ../descriptor/descriptor.c */
descriptorStruct.regionSection.flReg1.reserved1 = 0x0;
descriptorStruct.regionSection.flReg1.LIMIT = ((romSize >> FLREGIONBITSHIFT) - 1); /* see ../descriptor/descriptor.c */
descriptorStruct.regionSection.flReg1.reserved2 = 0x0;
/* FLREG2 (ME) */
descriptorStruct.regionSection.flReg2.BASE = 0x1fff; /* see ../descriptor/descriptor.c */
descriptorStruct.regionSection.flReg2.reserved1 = 0x0;
descriptorStruct.regionSection.flReg2.LIMIT = 0x0000; /* see ../descriptor/descriptor.c */
descriptorStruct.regionSection.flReg2.reserved2 = 0x0;
/* FLREG3 (Gbe) */
descriptorStruct.regionSection.flReg3.BASE = hasGbe ? (DESCRIPTORREGIONSIZE >> FLREGIONBITSHIFT) : 0x1fff; /* see ../descriptor/descriptor.c */
descriptorStruct.regionSection.flReg3.reserved1 = 0x0;
descriptorStruct.regionSection.flReg3.LIMIT = hasGbe ? (GBEREGIONSIZE_8K >> FLREGIONBITSHIFT) : 0x0000; /* see ../descriptor/descriptor.c */
descriptorStruct.regionSection.flReg3.reserved2 = 0x0;
/* FLREG4 (Platform) */
descriptorStruct.regionSection.flReg4.BASE = 0x1fff; /* see ../descriptor/descriptor.c */
descriptorStruct.regionSection.flReg4.reserved1 = 0x0;
descriptorStruct.regionSection.flReg4.LIMIT = 0x0000; /* see ../descriptor/descriptor.c */
descriptorStruct.regionSection.flReg4.reserved2 = 0x0;
/* Padding */
for (i = 0; i < 12; i++) {
descriptorStruct.regionSection.padding[i] = 0xFF;
}
/* Master Access Section */
/* FLMSTR1 (Host CPU / BIOS) */
descriptorStruct.masterAccessSection.flMstr1.requesterId = 0x0000;
descriptorStruct.masterAccessSection.flMstr1.fdRegionReadAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.biosRegionReadAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.meRegionReadAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.gbeRegionReadAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.pdRegionReadAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.reserved1 = 0x0;
descriptorStruct.masterAccessSection.flMstr1.fdRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.biosRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.meRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.gbeRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.pdRegionWriteAccess = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr1.reserved2 = 0x0;
/* FLMSTR2 (ME) */
descriptorStruct.masterAccessSection.flMstr2.requesterId = 0x0000;
descriptorStruct.masterAccessSection.flMstr2.fdRegionReadAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.biosRegionReadAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.meRegionReadAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.gbeRegionReadAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.pdRegionReadAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.reserved1 = 0x0;
descriptorStruct.masterAccessSection.flMstr2.fdRegionWriteAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.biosRegionWriteAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.meRegionWriteAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.gbeRegionWriteAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.pdRegionWriteAccess = 0x0; /* see ../descriptor/descriptor.c */
descriptorStruct.masterAccessSection.flMstr2.reserved2 = 0x0;
/* FLMSTR3 (Gbe) */
descriptorStruct.masterAccessSection.flMstr3.requesterId = 0x0218;
descriptorStruct.masterAccessSection.flMstr3.fdRegionReadAccess = 0x0;
descriptorStruct.masterAccessSection.flMstr3.biosRegionReadAccess = 0x0;
descriptorStruct.masterAccessSection.flMstr3.meRegionReadAccess = 0x0;
descriptorStruct.masterAccessSection.flMstr3.gbeRegionReadAccess = 0x1;
descriptorStruct.masterAccessSection.flMstr3.pdRegionReadAccess = 0x0;
descriptorStruct.masterAccessSection.flMstr3.reserved1 = 0x0;
descriptorStruct.masterAccessSection.flMstr3.fdRegionWriteAccess = 0x0;
descriptorStruct.masterAccessSection.flMstr3.biosRegionWriteAccess = 0x0;
descriptorStruct.masterAccessSection.flMstr3.meRegionWriteAccess = 0x0;
descriptorStruct.masterAccessSection.flMstr3.gbeRegionWriteAccess = 0x1;
descriptorStruct.masterAccessSection.flMstr3.pdRegionWriteAccess = 0x0;
descriptorStruct.masterAccessSection.flMstr3.reserved2 = 0x0;
/* Padding */
for (i = 0; i < 148; i++) {
descriptorStruct.masterAccessSection.padding[i] = 0xFF;
}
/* ICH straps */
/* ICHSTRAP0 */
descriptorStruct.ichStraps.ichStrap0.meDisable = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.ichStraps.ichStrap0.reserved1 = 0x04;
descriptorStruct.ichStraps.ichStrap0.tcoMode = 0x1;
descriptorStruct.ichStraps.ichStrap0.smBusAddress = 0x64;
descriptorStruct.ichStraps.ichStrap0.bmcMode = 0x0;
descriptorStruct.ichStraps.ichStrap0.tripPointSelect = 0x0;
descriptorStruct.ichStraps.ichStrap0.reserved2 = 0x0;
descriptorStruct.ichStraps.ichStrap0.integratedGbe = hasGbe ? 0x1 : 0x0;
descriptorStruct.ichStraps.ichStrap0.lanPhy = hasGbe ? 0x1 : 0x0;
descriptorStruct.ichStraps.ichStrap0.reserved3 = 0x0;
descriptorStruct.ichStraps.ichStrap0.dmiRequesterId = 0x0;
descriptorStruct.ichStraps.ichStrap0.smBus2Address = 0x00;
/* ICHSTRAP1 */
descriptorStruct.ichStraps.ichStrap1.northMlink = 0x1;
descriptorStruct.ichStraps.ichStrap1.southMlink = 0x1;
descriptorStruct.ichStraps.ichStrap1.meSmbus = 0x1;
descriptorStruct.ichStraps.ichStrap1.sstDynamic = 0x1;
descriptorStruct.ichStraps.ichStrap1.reserved1 = 0x0;
descriptorStruct.ichStraps.ichStrap1.northMlink2 = 0x1;
descriptorStruct.ichStraps.ichStrap1.reserved2 = 0x00;
descriptorStruct.ichStraps.ichStrap1.reserved3 = 0x0000;
/* Padding */
for (i = 0; i < 248; i++) {
descriptorStruct.ichStraps.padding[i] = 0xFF;
}
/* MCH straps */
/* MCHSTRAP0 */
descriptorStruct.mchStraps.mchStrap0.meDisable = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.mchStraps.mchStrap0.meBootFromFlash = 0x0;
descriptorStruct.mchStraps.mchStrap0.tpmDisable = 0x1; /* see ../descriptor/descriptor.c */
descriptorStruct.mchStraps.mchStrap0.reserved1 = 0x7;
descriptorStruct.mchStraps.mchStrap0.spiFingerprint = 0x1;
descriptorStruct.mchStraps.mchStrap0.meAlternateDisable = 0x0;
descriptorStruct.mchStraps.mchStrap0.reserved2 = 0xff;
descriptorStruct.mchStraps.mchStrap0.reserved3 = 0xffff;
/* Padding */
for (i = 0; i < 3292; i++) {
descriptorStruct.mchStraps.padding[i] = 0xFF;
}
/* ME VSCC Table */
descriptorStruct.meVsccTable.jid0 = 0x001720c2;
descriptorStruct.meVsccTable.vscc0 = 0x20052005;
descriptorStruct.meVsccTable.jid1 = 0x001730ef;
descriptorStruct.meVsccTable.vscc1 = 0x20052005;
descriptorStruct.meVsccTable.jid2 = 0x0000481f;
descriptorStruct.meVsccTable.vscc2 = 0x20152015;
/* Padding */
for (i = 0; i < 4; i++) {
descriptorStruct.meVsccTable.padding[i] = 0xFF;
}
/* Descriptor Map 2 Record */
descriptorStruct.descriptor2Map.meVsccTableBaseAddress = 0xee;
descriptorStruct.descriptor2Map.meVsccTableLength = 0x06;
descriptorStruct.descriptor2Map.reserved = 0x0000;
/* OEM section */
/* see ../descriptor/descriptor.c */
/* Magic String (ascii characters) */
descriptorStruct.oemSection.magicString[0] = 0x4c;
descriptorStruct.oemSection.magicString[1] = 0x49;
descriptorStruct.oemSection.magicString[2] = 0x42;
descriptorStruct.oemSection.magicString[3] = 0x45;
descriptorStruct.oemSection.magicString[4] = 0x52;
descriptorStruct.oemSection.magicString[5] = 0x41;
descriptorStruct.oemSection.magicString[6] = 0x54;
descriptorStruct.oemSection.magicString[7] = 0x45;
/* Padding */
for (i = 0; i < 248; i++) {
descriptorStruct.oemSection.padding[i] = 0xFF;
}
return descriptorStruct;
}

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/*
* Copyright (C) 2014 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef ICH9GEN_MKDESCRIPTOR_H
#define ICH9GEN_MKDESCRIPTOR_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "../descriptor/descriptor.h"
struct DESCRIPTORREGIONRECORD generatedDescriptorStruct(unsigned int romSize, int hasGbe);
#endif

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/*
* Copyright (C) 2014 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include "mkgbe.h"
/* Generate a 4KiB Gbe struct, with default values. */
/* Read ../gbe/gbe.h for an explanation of the default values used here */
struct GBEREGIONRECORD_4K generatedGbeStruct4k()
{
int i;
struct GBEREGIONRECORD_4K gbeStruct4k;
/* MAC address (words 00h to 02h) */
/* see ../gbe/gbe.c */
gbeStruct4k.macAddress[0] = 0x00;
gbeStruct4k.macAddress[1] = 0xde;
gbeStruct4k.macAddress[2] = 0xad;
gbeStruct4k.macAddress[3] = 0xc0;
gbeStruct4k.macAddress[4] = 0xff;
gbeStruct4k.macAddress[5] = 0xee;
/* Word 03h (Reserved) */
gbeStruct4k.reservedWord03h.reserved1_0 = 0x00;
gbeStruct4k.reservedWord03h.reserved1_1 = 0x0;
gbeStruct4k.reservedWord03h.ibaLom = 0x1;
gbeStruct4k.reservedWord03h.reserved2 = 0x0;
/* Word 04h (Reserved) */
gbeStruct4k.reservedWord04h = 0xffff;
/* Word 05h (Image Version Information) */
gbeStruct4k.imageVersionInformation = 0x1083;
/* Words 06h and 07h (Reserved) */
gbeStruct4k.reservedWords06h07h[0] = 0xffff;
gbeStruct4k.reservedWords06h07h[1] = 0xffff;
/* Word 08h and 09h (PBA Low and PBA High) */
gbeStruct4k.pbaLow = 0x1008;
gbeStruct4k.pbaHigh = 0xffff;
/* Word 0Ah (PCI Initialization Control Word) */
gbeStruct4k.pciInitializationControlWord.loadVendorDeviceId = 0x1;
gbeStruct4k.pciInitializationControlWord.loadSubsystemId = 0x1;
gbeStruct4k.pciInitializationControlWord.reserved1 = 0x0;
gbeStruct4k.pciInitializationControlWord.reserved2 = 0x0;
gbeStruct4k.pciInitializationControlWord.pmEnable = 0x1;
gbeStruct4k.pciInitializationControlWord.auxPwr = 0x1;
gbeStruct4k.pciInitializationControlWord.reserved3 = 0x0;
gbeStruct4k.pciInitializationControlWord.reserved4 = 0x1;
/* Word 0Bh (Subsystem ID) */
gbeStruct4k.subsystemId = 0x20ee;
/* Word 0Ch (Subsystem Vendor ID) */
gbeStruct4k.subsystemVendorId = 0x17aa;
/* Word 0Dh (Device ID) */
gbeStruct4k.deviceId = 0x10f5;
/* Word 0Eh (Vendor ID) */
gbeStruct4k.vendorId = 0x8086;
/* Word 0Fh (Device Revision ID) */
gbeStruct4k.deviceRevId = 0x0000;
/* Word 10h (LAN Power Consumption) */
gbeStruct4k.lanPowerConsumption.lanD3Power = 0x01;
gbeStruct4k.lanPowerConsumption.reserved = 0x0;
gbeStruct4k.lanPowerConsumption.lanD0Power = 0x0d;
/* Words 11h and 12h (Reserved) */
gbeStruct4k.reservedWords11h12h[0] = 0x0000;
gbeStruct4k.reservedWords11h12h[1] = 0x0000;
/* Word 13h (Shared Initialization Control Word) */
gbeStruct4k.sharedInitializationControlWord.reserved1 = 0x5;
gbeStruct4k.sharedInitializationControlWord.forceDuplex = 0x0;
gbeStruct4k.sharedInitializationControlWord.forceSpeedEnable = 0x0;
gbeStruct4k.sharedInitializationControlWord.reserved2_0 = 0x0;
gbeStruct4k.sharedInitializationControlWord.reserved2_1 = 0x0;
gbeStruct4k.sharedInitializationControlWord.phyPowerDownEnable = 0x1;
gbeStruct4k.sharedInitializationControlWord.reserved3 = 0x1;
gbeStruct4k.sharedInitializationControlWord.reserved4 = 0x0;
gbeStruct4k.sharedInitializationControlWord.sign = 0x2;
/* Word 14h (Extended Configuration Control Word 1) */
gbeStruct4k.extendedConfigurationControlWord1.extendedConfigurationPointer = 0x020;
gbeStruct4k.extendedConfigurationControlWord1.oemWriteEnable = 0x1;
gbeStruct4k.extendedConfigurationControlWord1.reserved1 = 0x1;
gbeStruct4k.extendedConfigurationControlWord1.reserved2 = 0x0;
gbeStruct4k.extendedConfigurationControlWord1.reserved3 = 0x0;
/* Word 15h (Extended Configuration Control Word 2) */
gbeStruct4k.extendedConfigurationControlWord2.reserved = 0x00;
gbeStruct4k.extendedConfigurationControlWord2.extendedPhyLength = 0x0a;
/* Word 16h (Extended Configuration Control Word 3) */
gbeStruct4k.extendedConfigurationControlWord3 = 0x0000;
/* Word 17h (LED 1 Configuration and Power Management) */
gbeStruct4k.ledCtl1.led1Mode = 0xb;
gbeStruct4k.ledCtl1.reserved1 = 0x0;
gbeStruct4k.ledCtl1.led1BlinkMode = 0x0;
gbeStruct4k.ledCtl1.led1Invert = 0x0;
gbeStruct4k.ledCtl1.led1Blink = 0x1;
gbeStruct4k.ledCtl1.reserved2 = 0x1;
gbeStruct4k.ledCtl1.lpluEnable = 0x0;
gbeStruct4k.ledCtl1.lpluEnableNonD0a = 0x1;
gbeStruct4k.ledCtl1.gbeDisableNonD0a = 0x1;
gbeStruct4k.ledCtl1.reserved3 = 0x0;
gbeStruct4k.ledCtl1.gbeDisable = 0x0;
gbeStruct4k.ledCtl1.reserved4 = 0x1;
/* Word 18h (LED 0 and 2 Configuration Defaults) */
gbeStruct4k.ledCtl02.led0Mode = 0x2;
gbeStruct4k.ledCtl02.reserved1 = 0x0;
gbeStruct4k.ledCtl02.led0BlinkMode = 0x0;
gbeStruct4k.ledCtl02.led0Invert = 0x0;
gbeStruct4k.ledCtl02.led0Blink = 0x0;
gbeStruct4k.ledCtl02.led2Mode = 0x6;
gbeStruct4k.ledCtl02.reserved2 = 0x0;
gbeStruct4k.ledCtl02.led2BlinkMode = 0x0;
gbeStruct4k.ledCtl02.led2Invert = 0x0;
gbeStruct4k.ledCtl02.led2Blink = 0x0;
/* Word 19h (Reserved) */
gbeStruct4k.reservedWord19h = 0x2b40;
/* Word 1Ah (Reserved) */
gbeStruct4k.reservedWord1Ah = 0x0043;
/* Word 1Bh (Reserved) */
gbeStruct4k.reservedWord1Bh = 0x0000;
/* Word 1Ch (Reserved) */
gbeStruct4k.reservedWord1Ch = 0x10f5;
/* Word 1Dh (Reserved) */
gbeStruct4k.reservedWord1Dh = 0xbaad;
/* Word 1Eh (Device ID for Intel 82567LM gigabit ethernet controller) */
gbeStruct4k._82567lmDeviceId = 0x10f5;
/* Word 1Fh (Device ID for Intel 82567LF gigabit ethernet controller) */
gbeStruct4k._82567lfDeviceId = 0x10bf;
/* Word 20h (Reserved) */
gbeStruct4k.reservedWord20h = 0xbaad;
/* Word 21h (Device ID for Intel 82567V gigabit ethernet controller) */
gbeStruct4k._82567vDeviceId = 0x10cb;
/* Word 22h (Reserved) */
gbeStruct4k.reservedWord22h = 0xbaad;
/* Word 23h (Reserved) */
gbeStruct4k.reservedWord23h = 0xbaad;
/* Words 24h to 2Fh (Reserved) */
gbeStruct4k.reservedWords24to2Fh[0] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[1] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[2] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[3] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[4] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[5] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[6] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[7] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[8] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[9] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[10] = 0x0000;
gbeStruct4k.reservedWords24to2Fh[11] = 0x0000;
/* Words 30h to 3Eh (PXE Software Region) */
/* Boot Agent Main Setup Options (Word 30h) */
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.protocolSelect = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved1 = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.defaultBootSelection = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved2 = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.promptTime = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.displaySetupMessage = 0x1;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved3 = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.forceSpeed = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.forceFullDuplex = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.reserved4 = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.efiPresence = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentMainSetupOptions.pxePresence = 0x0;
/* Boot Agent Configuration Customization Options (Word 31h) */
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableSetupMenu = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableTitleMessage = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableProtocolSelect = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableBootSelection = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableLegacyWakeupSupport = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.disableFlashUpdate = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved1 = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.ibaBootOrderSetupMode = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.reserved2 = 0x0;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions31h.signature = 0x1;
/* Boot Agent Configuration Customization Options (Word 32h) */
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.buildNumber = 0x18;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.minorVersionNumber = 0x3;
gbeStruct4k.pxeSoftwareRegion.bootAgentConfigurationCustomizationOptions32h.majorVersionNumber = 0x1;
/* IBA Capabilities (Word 33h) */
gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.baseCodePresent = 0x1;
gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.undiCapabilityPresent = 0x1;
gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved1 = 0x1;
gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.efiUndiCapabilityPresent = 0x0;
gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved2_0 = 0x0;
gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.reserved2_1 = 0x00;
gbeStruct4k.pxeSoftwareRegion.ibaCapabilities.signature = 0x1;
/* Padding (Words 34h to 3Eh) */
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[0] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[1] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[2] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[3] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[4] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[5] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[6] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[7] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[8] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[9] = 0xffff;
gbeStruct4k.pxeSoftwareRegion.paddingWords34hTo3Eh[10] = 0xffff;
/* Word 3Fh (Checksum) */
gbeStruct4k.checkSum = gbeGetChecksumFrom4kStruct(gbeStruct4k, GBECHECKSUMTOTAL);
/* The rest of Gbe (word 40h or byte 80h onwards) is just padding (0xFF) */
for (i = 0; i < 3968; i++) {
gbeStruct4k.padding[i] = 0xFF;
}
return gbeStruct4k;
}
struct GBEREGIONRECORD_8K generatedGbeStruct8k()
{
struct GBEREGIONRECORD_8K gbeStruct8k;
gbeStruct8k.main = generatedGbeStruct4k();
memcpy(&gbeStruct8k.backup, &gbeStruct8k.main, GBEREGIONSIZE_4K);
return gbeStruct8k;
}

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/*
* Copyright (C) 2014 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef ICH9GEN_MKGBE_H
#define ICH9GEN_MKGBE_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "../gbe/gbe.h"
struct GBEREGIONRECORD_4K generatedGbeStruct4k();
struct GBEREGIONRECORD_8K generatedGbeStruct8k();
#endif

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/*
* ich9show.c
* Just a little hack by Leah to show the ICH9 region read/write status
*
* Purpose: disable and remove the ME from ich9m/gm45 systems in coreboot.
*
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
* Copyright (C) 2014,2015,2019 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
/* Initially based on proof of concept by Steve Shenton. */
/* Original utility can be found at https://gitorious.org/ich9descriptortool */
/*
* Read a factory.rom dump (ich9m/gm45 systems) and
* modify the flash descriptor to remove all regions except descriptor,
* Gbe and BIOS. Set BIOS region to full size of the ROM image (after
* the flash descriptor and gbe). Basically, deblob the descriptor.
*
* This will will generate a concatenated descriptor+gbe dump suitable
* for use in libreboot. Currently tested: ThinkPad X200 (coreboot/libreboot)
*/
/*
* See docs/hardware/x200_remove_me.html for info plus links to datasheet (also linked below)
*
* Info about flash descriptor (read page 845 onwards):
* http://www.intel.co.uk/content/dam/doc/datasheet/io-controller-hub-9-datasheet.pdf
*
* Info about Gbe region (read whole datasheet):
* http://www.intel.co.uk/content/dam/doc/application-note/i-o-controller-hub-9m-82567lf-lm-v-nvm-map-appl-note.pdf
* https://web.archive.org/web/20150912070329/https://communities.intel.com/community/wired/blog/2010/10/14/how-to-basic-eeprom-checksums
*/
#include "ich9show.h"
int main(int argc, char *argv[])
{
if(argc!=2) {
printf("Incorrect number of arguments. Please specify *one* ROM path.\n");
return 1;
} /* TODO: Make ich9show support dumping stats of multiple ROM images */
struct DESCRIPTORREGIONRECORD descriptorStruct;
uint8_t* descriptorBuffer = (uint8_t*)&descriptorStruct;
struct GBEREGIONRECORD_8K gbeStruct8k;
uint8_t* gbeBuffer8k = (uint8_t*)&gbeStruct8k;
uint32_t gbeRegionStart;
char* romFilename = argv[1];
unsigned int bufferLength;
unsigned int romSize;
/*
* ------------------------------------------------------------------
* Compatibility checks. This version of ich9deblob is not yet portable.
* ------------------------------------------------------------------
*/
if (systemOrCompilerIncompatible(descriptorStruct, gbeStruct8k)) return 1;
/* If true, fail with error message */
/*
* ------------------------------------------------------------------
* Extract the descriptor and gbe regions from the factory.rom dump
* ------------------------------------------------------------------
*/
FILE* fp = NULL;
fp = fopen(romFilename, "rb");
if (NULL == fp)
{
printf("\nerror: could not open %s\n", romFilename);
fclose(fp);
return 1;
}
printf("\n%s opened successfully\n", romFilename);
/*
* Get the descriptor region dump from the the given ROM
* (goes in factoryDescriptorBuffer variable)
*/
bufferLength = fread(descriptorBuffer, 1, DESCRIPTORREGIONSIZE, fp);
if (DESCRIPTORREGIONSIZE != bufferLength) //
{
printf("\nerror: could not read descriptor from %s (%i) bytes read\n", romFilename, bufferLength);
fclose(fp);
return 1;
}
printf("\ndescriptor region read successfully\n");
if(!validDescriptor(descriptorStruct)) {
printf("Invalid input: incorrect signature in the given descriptor.");
fclose(fp);
return 1;
}
if (descriptorDefinesGbeRegion(descriptorStruct))
{
gbeRegionStart = descriptorStruct.regionSection.flReg3.BASE << FLREGIONBITSHIFT;
/*
* Set offset so that we can read the data from
* the gbe region
*/
fseek(fp, gbeRegionStart, SEEK_SET);
/* Read the gbe data from the given ROM and put it in factoryGbeBuffer8k */
bufferLength = fread(gbeBuffer8k, 1, GBEREGIONSIZE_8K, fp);
if (GBEREGIONSIZE_8K != bufferLength)
{
printf("\nerror: could not read GBe region from %s (%i) bytes read\n", romFilename, bufferLength);
fclose(fp);
return 1;
}
printf("\ngbe (8KiB) region read successfully\n");
}
fseek(fp, 0L, SEEK_END);
romSize = ftell(fp);
printf("\n%s size: [%i] bytes\n", romFilename, romSize);
fclose(fp);
showDescriptorData(descriptorStruct);
if (descriptorDefinesGbeRegion(descriptorStruct))
{
printf("\nMain GbE region:\n\n");
showGbeData(gbeStruct8k.main);
printf("\n");
printf("\nBackup GbE region:\n\n");
showGbeData(gbeStruct8k.backup);
printf("\n");
}
return 0;
}

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/*
* ich9show.c
* Just a little hack by Leah to show the ICH9 region read/write status
*
* Purpose: header file for ich9deblob.c
*
* Copyright (C) 2014 Steve Shenton <sgsit@libreboot.org>
* Copyright (C) 2015,2019 Leah Rowe <info@minifree.org>
*
* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifndef ICH9SHOW_H
#define ICH9SHOW_H
#include <stdio.h>
#include <string.h>
#include <stdint.h>
#include "common/descriptor_gbe.h" /* common descriptor/gbe functions used by ich9deblob */
#include "common/x86compatibility.h" /* system/compiler compatibility checks. This code is not portable. */
#include "descriptor/descriptor.h" /* structs describing what's in the descriptor region */
#include "gbe/gbe.h" /* structs describing what's in the gbe region */
int main();
#endif