NEW MAINBOARD: HP EliteBook 820 G2
This is of Broadwell platform, one generation above Haswell. Of note: this uses HP Sure Start. Although the flash is 16MB, our CBFS section (and IFD configuration) assumes 12MB flash, so the final 4MB will be left unflashed on installation, after blanking the private flash. The coreboot documents have more information about this. Some minor design changes in lbmk were made, to accomodate this port: Support for extracting refcode binaries added (pulled from Google recovery images). The refcode file is an ELF that initialises the MRC and the PCH. It is also responsible for enabling or disabling the Intel GbE device, where Google does not enable it, but lbmk modifies it per the instructions on the coreboot documentation, so as to enable Intel GbE. Google's recovery image stores the refcode as a stage file, but coreboot changed the format (for CBFS files) after 4.13 so coreboot 4.13's cbfstool is used to extract refcode. This realisation made me also change the script logic to use a cbfstool and ifdtool version matching the coreboot tree, for all parts of lbmk, whereas lbmk previously used only the default tree for cbfstool/ifdtool, on insertion and deletion of vendor files - it was 81dc20e744 that broke extraction of refcode on google's recovery images, where google used an older version of cbfstool to insert the files in their coreboot ROMs. A further backported patch has been added, copying coreboot revision f22f408956 which is a build fix from Nico Huber. Iru Cai submitted an ACPI bugfix after the revision lbmk currently uses, for coreboot/default, and this fix is needed for rebooting to work on Linux 6.1 or higher. This patch has been backported to lbmk, while it still uses the same October 2023 revision of coreboot. Broadwell MRC is inserted at the same offset as Haswell, so I didn't need to tweak that. Signed-off-by: Leah Rowe <leah@libreboot.org>9020vga
Leah Rowe
parent
a8a7a51b9b
commit
401c0882aa
|
|
@ -0,0 +1,56 @@
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From f22f408956bf02609a96b7d72fb3321da159bfc6 Mon Sep 17 00:00:00 2001
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From: Nico Huber <nico.huber@secunet.com>
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Date: Tue, 22 Jun 2021 13:49:44 +0000
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Subject: [PATCH 1/1] cbfstool: Make use of spurious null-termination
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The null-termination of `filetypes` was added after the code was
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written, obviously resulting in NULL dereferences. As some more
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code has grown around the termination, it's hard to revert the
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regression, so let's update the code that still used the array
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length.
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This fixes commit 7f5f9331d1 (util/cbfstool: fix buffer over-read)
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which actually did fix something, but only one path while it broke
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two others. We should be careful with fixes, they can always break
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something else. Especially when a dumb tool triggered the patching
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it seems likely that fewer people looked into related code.
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Change-Id: If2ece1f5ad62952ed2e57769702e318ba5468f0c
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Signed-off-by: Nico Huber <nico.huber@secunet.com>
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Reviewed-on: https://review.coreboot.org/c/coreboot/+/55763
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Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Reviewed-by: Julius Werner <jwerner@chromium.org>
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---
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util/cbfstool/common.c | 8 ++++----
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1 file changed, 4 insertions(+), 4 deletions(-)
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diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c
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index e2ed38ffc4..539d0baccf 100644
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--- a/util/cbfstool/common.c
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+++ b/util/cbfstool/common.c
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@@ -168,10 +168,10 @@ void print_supported_architectures(void)
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void print_supported_filetypes(void)
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{
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- int i, number = ARRAY_SIZE(filetypes);
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+ int i;
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- for (i=0; i<number; i++) {
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- printf(" %s%c", filetypes[i].name, (i==(number-1))?'\n':',');
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+ for (i=0; filetypes[i].name; i++) {
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+ printf(" %s%c", filetypes[i].name, filetypes[i + 1].name ? ',' : '\n');
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if ((i%8) == 7)
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printf("\n");
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}
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@@ -180,7 +180,7 @@ void print_supported_filetypes(void)
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uint64_t intfiletype(const char *name)
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{
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size_t i;
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- for (i = 0; i < (sizeof(filetypes) / sizeof(struct typedesc_t)); i++)
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+ for (i = 0; filetypes[i].name; i++)
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if (strcmp(filetypes[i].name, name) == 0)
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return filetypes[i].type;
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return -1;
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--
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2.39.2
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@ -0,0 +1,3 @@
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tree="coreboot413"
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rev="5c186c6777c9438ff4681929c9c25c98dee28bef"
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xarch="i386-elf"
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@ -0,0 +1,34 @@
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From 6202669b8e8f50837448e2d4c482671abf72f648 Mon Sep 17 00:00:00 2001
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From: Iru Cai <mytbk920423@gmail.com>
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Date: Sun, 5 Nov 2023 17:12:43 +0800
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Subject: [PATCH 1/1] mb/hp/elitebook_820_g2: do not set EC SLPT on S5
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Setting EC SLPT bit in S5 will make HP EliteBook 820 G2
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fail to reboot under Linux 6.1 and later kernel versions.
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Change-Id: I48f5a35cd78db3b32d9f76cb8e266c738da34e7c
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Signed-off-by: Iru Cai <mytbk920423@gmail.com>
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Reviewed-on: https://review.coreboot.org/c/coreboot/+/78907
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Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
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---
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src/mainboard/hp/elitebook_820_g2/acpi/platform.asl | 5 ++++-
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1 file changed, 4 insertions(+), 1 deletion(-)
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diff --git a/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl b/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
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index 8023ae826c..d17f575c40 100644
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--- a/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
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+++ b/src/mainboard/hp/elitebook_820_g2/acpi/platform.asl
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@@ -10,5 +10,8 @@ Method(_WAK,1)
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Method(_PTS,1)
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{
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- \_SB.PCI0.LPCB.EC0.SLPT = Arg0
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+ If (Arg0 != 5)
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+ {
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+ \_SB.PCI0.LPCB.EC0.SLPT = Arg0
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+ }
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}
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--
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2.39.2
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|
|
@ -0,0 +1,194 @@
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From 6f94e9aa38a5d6589b1a64642dfcb5ccbf90b8d3 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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Date: Tue, 9 Jan 2024 01:53:54 +0000
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Subject: [PATCH 1/1] ifdtool nuke option
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Signed-off-by: Leah Rowe <leah@libreboot.org>
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---
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util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
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1 file changed, 83 insertions(+), 31 deletions(-)
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diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
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index e97efcc206..ee27e7f2e6 100644
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--- a/util/ifdtool/ifdtool.c
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+++ b/util/ifdtool/ifdtool.c
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@@ -1711,6 +1711,7 @@ static void print_usage(const char *name)
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" tgl - Tiger Lake\n"
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" -S | --setpchstrap Write a PCH strap\n"
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" -V | --newvalue The new value to write into PCH strap specified by -S\n"
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+ " -N | --nuke <region> Overwrite the specified region with 0xFF (all ones)\n"
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" -v | --version: print the version\n"
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" -h | --help: print this help\n\n"
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"<region> is one of Descriptor, BIOS, ME, GbE, Platform Data, Secondary BIOS, "
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@@ -1718,6 +1719,60 @@ static void print_usage(const char *name)
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"\n");
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}
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+static int
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+get_region_type_string(const char *region_type_string)
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+{
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+ if (!strcasecmp("Descriptor", region_type_string))
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+ return 0;
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+ else if (!strcasecmp("BIOS", region_type_string))
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+ return 1;
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+ else if (!strcasecmp("ME", region_type_string))
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+ return 2;
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+ else if (!strcasecmp("GbE", region_type_string))
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+ return 3;
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+ else if (!strcasecmp("Platform Data", region_type_string))
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+ return 4;
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+ else if (!strcasecmp("Device Exp1", region_type_string))
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+ return 5;
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+ else if (!strcasecmp("Secondary BIOS", region_type_string))
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+ return 6;
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+ else if (!strcasecmp("Reserved", region_type_string))
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+ return 7;
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+ else if (!strcasecmp("EC", region_type_string))
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+ return 8;
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+ else if (!strcasecmp("Device Exp2", region_type_string))
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+ return 9;
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+ else if (!strcasecmp("IE", region_type_string))
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+ return 10;
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+ else if (!strcasecmp("10GbE_0", region_type_string))
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+ return 11;
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+ else if (!strcasecmp("10GbE_1", region_type_string))
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+ return 12;
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+ else if (!strcasecmp("PTT", region_type_string))
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+ return 15;
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+ return -1;
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+}
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+
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+static void
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+nuke(const char *filename, char *image, int size, int region_type)
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+{
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+ int i;
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+ region_t region;
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+ const frba_t *frba = find_frba(image, size);
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+ if (!frba)
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+ exit(EXIT_FAILURE);
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+
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+ region = get_region(frba, region_type);
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+ if (region.size > 0) {
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+ for (i = region.base; i <= region.limit; i++) {
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+ if ((i + 1) > (size))
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+ break;
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+ image[i] = 0xFF;
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+ }
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+ write_image(filename, image, size);
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+ }
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+}
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+
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int main(int argc, char *argv[])
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{
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int opt, option_index = 0;
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@@ -1725,6 +1780,7 @@ int main(int argc, char *argv[])
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int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
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int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
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int mode_read = 0, mode_altmedisable = 0, altmedisable = 0;
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+ int mode_nuke = 0;
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char *region_type_string = NULL, *region_fname = NULL;
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const char *layout_fname = NULL;
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char *new_filename = NULL;
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@@ -1755,6 +1811,7 @@ int main(int argc, char *argv[])
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{"validate", 0, NULL, 't'},
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{"setpchstrap", 1, NULL, 'S'},
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{"newvalue", 1, NULL, 'V'},
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+ {"nuke", 1, NULL, 'N'},
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{0, 0, 0, 0}
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};
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@@ -1795,35 +1852,8 @@ int main(int argc, char *argv[])
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region_fname++;
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// Descriptor, BIOS, ME, GbE, Platform
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// valid type?
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- if (!strcasecmp("Descriptor", region_type_string))
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- region_type = 0;
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- else if (!strcasecmp("BIOS", region_type_string))
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- region_type = 1;
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- else if (!strcasecmp("ME", region_type_string))
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- region_type = 2;
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- else if (!strcasecmp("GbE", region_type_string))
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- region_type = 3;
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- else if (!strcasecmp("Platform Data", region_type_string))
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- region_type = 4;
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- else if (!strcasecmp("Device Exp1", region_type_string))
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- region_type = 5;
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- else if (!strcasecmp("Secondary BIOS", region_type_string))
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- region_type = 6;
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- else if (!strcasecmp("Reserved", region_type_string))
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- region_type = 7;
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- else if (!strcasecmp("EC", region_type_string))
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- region_type = 8;
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- else if (!strcasecmp("Device Exp2", region_type_string))
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- region_type = 9;
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- else if (!strcasecmp("IE", region_type_string))
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- region_type = 10;
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- else if (!strcasecmp("10GbE_0", region_type_string))
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- region_type = 11;
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- else if (!strcasecmp("10GbE_1", region_type_string))
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- region_type = 12;
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- else if (!strcasecmp("PTT", region_type_string))
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- region_type = 15;
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- if (region_type == -1) {
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+ if ((region_type =
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+ get_region_type_string(region_type_string)) == -1) {
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fprintf(stderr, "No such region type: '%s'\n\n",
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region_type_string);
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print_usage(argv[0]);
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@@ -1988,6 +2018,22 @@ int main(int argc, char *argv[])
|
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case 't':
|
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mode_validate = 1;
|
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break;
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+ case 'N':
|
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+ region_type_string = strdup(optarg);
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+ if (!region_type_string) {
|
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+ fprintf(stderr, "No region specified\n");
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+ print_usage(argv[0]);
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+ exit(EXIT_FAILURE);
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+ }
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+ if ((region_type =
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+ get_region_type_string(region_type_string)) == -1) {
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+ fprintf(stderr, "No such region type: '%s'\n\n",
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+ region_type_string);
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+ print_usage(argv[0]);
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+ exit(EXIT_FAILURE);
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+ }
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+ mode_nuke = 1;
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+ break;
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case 'v':
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print_version();
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exit(EXIT_SUCCESS);
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@@ -2003,7 +2049,8 @@ int main(int argc, char *argv[])
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if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
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mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked |
|
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- mode_locked) + mode_altmedisable + mode_validate) > 1) {
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+ mode_locked) + mode_altmedisable + mode_validate +
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+ mode_nuke) > 1) {
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fprintf(stderr, "You may not specify more than one mode.\n\n");
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print_usage(argv[0]);
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exit(EXIT_FAILURE);
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@@ -2011,7 +2058,8 @@ int main(int argc, char *argv[])
|
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if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_setstrap +
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mode_newlayout + mode_spifreq + mode_em100 + mode_locked +
|
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- mode_unlocked + mode_density + mode_altmedisable + mode_validate) == 0) {
|
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+ mode_unlocked + mode_density + mode_altmedisable +
|
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+ mode_validate + mode_nuke) == 0) {
|
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fprintf(stderr, "You need to specify a mode.\n\n");
|
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print_usage(argv[0]);
|
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exit(EXIT_FAILURE);
|
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@@ -2109,6 +2157,10 @@ int main(int argc, char *argv[])
|
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write_image(new_filename, image, size);
|
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}
|
||||
|
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+ if (mode_nuke) {
|
||||
+ nuke(new_filename, image, size, region_type);
|
||||
+ }
|
||||
+
|
||||
if (mode_altmedisable) {
|
||||
fpsba_t *fpsba = find_fpsba(image, size);
|
||||
fmsba_t *fmsba = find_fmsba(image, size);
|
||||
--
|
||||
2.39.2
|
||||
|
||||
|
|
@ -0,0 +1,622 @@
|
|||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
CONFIG_ARCH_SUPPORTS_CLANG=y
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_IWYU is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_USE_AMD_BLOBS is not set
|
||||
# CONFIG_USE_QC_BLOBS is not set
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
|
||||
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
|
||||
# CONFIG_ASAN is not set
|
||||
CONFIG_NO_STAGE_CACHE=y
|
||||
# CONFIG_TSEG_STAGE_CACHE is not set
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
# CONFIG_FW_CONFIG is not set
|
||||
|
||||
#
|
||||
# Software Bill Of Materials (SBOM)
|
||||
#
|
||||
# CONFIG_SBOM is not set
|
||||
# end of Software Bill Of Materials (SBOM)
|
||||
# end of General setup
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_51NB is not set
|
||||
# CONFIG_VENDOR_ACER is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BOSTENTECH is not set
|
||||
# CONFIG_VENDOR_BYTEDANCE is not set
|
||||
# CONFIG_VENDOR_CAVIUM is not set
|
||||
# CONFIG_VENDOR_CLEVO is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_DELL is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_EXAMPLE is not set
|
||||
# CONFIG_VENDOR_FACEBOOK is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
CONFIG_VENDOR_HP=y
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IBM is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_INVENTEC is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LENOVO is not set
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PINE64 is not set
|
||||
# CONFIG_VENDOR_PORTWELL is not set
|
||||
# CONFIG_VENDOR_PRODRIVE is not set
|
||||
# CONFIG_VENDOR_PROTECTLI is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RAZER is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_STARLABS is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_SYSTEM76 is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_PART_NUMBER="EliteBook 820 G2"
|
||||
CONFIG_MAINBOARD_VERSION="1.0"
|
||||
CONFIG_MAINBOARD_DIR="hp/elitebook_820_g2"
|
||||
CONFIG_VGA_BIOS_ID="8086,0406"
|
||||
CONFIG_DIMM_MAX=4
|
||||
CONFIG_DIMM_SPD_SIZE=256
|
||||
CONFIG_FMDFILE=""
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_MAINBOARD_VENDOR="HP"
|
||||
CONFIG_CBFS_SIZE=0xbdc000
|
||||
CONFIG_CONSOLE_SERIAL=y
|
||||
CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
|
||||
CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
|
||||
CONFIG_MAX_CPUS=8
|
||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
||||
CONFIG_POST_DEVICE=y
|
||||
CONFIG_POST_IO=y
|
||||
CONFIG_UART_FOR_CONSOLE=0
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
|
||||
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
|
||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
||||
CONFIG_DCACHE_RAM_BASE=0xff7c0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x10000
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
|
||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
CONFIG_IFD_BIN_PATH="../../../config/ifd/hp820g2/12_ifd"
|
||||
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
|
||||
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
CONFIG_PCIEXP_AER=y
|
||||
CONFIG_VBT_DATA_SIZE_KB=8
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_BOARD_HP_280_G2 is not set
|
||||
# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
|
||||
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
|
||||
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
|
||||
CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
|
||||
# CONFIG_BOARD_HP_FOLIO_9480M is not set
|
||||
# CONFIG_BOARD_HP_2170P is not set
|
||||
# CONFIG_BOARD_HP_2560P is not set
|
||||
# CONFIG_BOARD_HP_2570P is not set
|
||||
# CONFIG_BOARD_HP_2760P is not set
|
||||
# CONFIG_BOARD_HP_8460P is not set
|
||||
# CONFIG_BOARD_HP_8470P is not set
|
||||
# CONFIG_BOARD_HP_8770W is not set
|
||||
# CONFIG_BOARD_HP_FOLIO_9470M is not set
|
||||
# CONFIG_BOARD_HP_PROBOOK_6360B is not set
|
||||
# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
|
||||
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
|
||||
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
|
||||
CONFIG_EC_HP_KBC1126_GPE=0x6
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_PS2K_EISAID="PNP0303"
|
||||
CONFIG_PS2M_EISAID="PNP0F13"
|
||||
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
|
||||
CONFIG_TTYS0_BAUD=115200
|
||||
CONFIG_D3COLD_SUPPORT=y
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=12288
|
||||
CONFIG_ROM_SIZE=0x00c00000
|
||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
||||
CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
|
||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
|
||||
# end of Mainboard
|
||||
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CHIPSET_DEVICETREE=""
|
||||
CONFIG_CBFS_MCACHE_SIZE=0x4000
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_EHCI_BAR=0xd8000000
|
||||
CONFIG_ACPI_CPU_STRING="CP%02X"
|
||||
CONFIG_STACK_SIZE=0x2000
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
||||
CONFIG_BOOTBLOCK_IN_CBFS=y
|
||||
CONFIG_HAVE_MRC=y
|
||||
CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
|
||||
CONFIG_MRC_BIN_ADDRESS=0xfffa0000
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
|
||||
CONFIG_HAVE_REFCODE_BLOB=y
|
||||
CONFIG_REFCODE_BLOB_FILE="../../../mrc/broadwell/refcode"
|
||||
CONFIG_SOC_INTEL_BROADWELL=y
|
||||
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
|
||||
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_INTEL_LYNXPOINT_LP=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_DISABLE_ME_PCI=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
CONFIG_CPU_INTEL_HASWELL=y
|
||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
||||
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
|
||||
CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
|
||||
CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
|
||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_XAPIC_ONLY=y
|
||||
# CONFIG_X2APIC_ONLY is not set
|
||||
# CONFIG_X2APIC_RUNTIME is not set
|
||||
# CONFIG_X2APIC_LATE_WORKAROUND is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_PCIEXP_HOTPLUG is not set
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
|
||||
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
|
||||
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
|
||||
CONFIG_RCBA_LENGTH=0x4000
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_HP_KBC1126=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_STITCH_ME_BIN is not set
|
||||
# CONFIG_CHECK_ME is not set
|
||||
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
CONFIG_DEBUG_HW_BREAKPOINTS=y
|
||||
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
|
||||
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
|
||||
# end of Chipset
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
|
||||
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
CONFIG_NO_EARLY_GFX_INIT=y
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
|
||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
||||
# CONFIG_BOOTSPLASH is not set
|
||||
# end of Display
|
||||
|
||||
CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_PLUGIN_SUPPORT=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
|
||||
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
|
||||
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
|
||||
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
|
||||
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_ELOG is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
|
||||
CONFIG_TPM_INIT_RAMSTAGE=y
|
||||
# CONFIG_TPM_PPI is not set
|
||||
CONFIG_DRIVERS_UART=y
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98396 is not set
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_DYN_CPU=y
|
||||
CONFIG_GFX_GMA_GENERATION="Haswell"
|
||||
CONFIG_GFX_GMA_PCH="Lynx_Point"
|
||||
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
|
||||
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
|
||||
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_USE_PC_CMOS_ALTCENTURY=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
|
||||
CONFIG_MEMORY_MAPPED_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
CONFIG_DRIVERS_WIFI_GENERIC=y
|
||||
# end of Generic Drivers
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# CBFS verification
|
||||
#
|
||||
# CONFIG_CBFS_VERIFICATION is not set
|
||||
# end of CBFS verification
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
# end of Verified Boot (vboot)
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
# CONFIG_NO_TPM is not set
|
||||
CONFIG_TPM1=y
|
||||
CONFIG_TPM=y
|
||||
CONFIG_MAINBOARD_HAS_TPM1=y
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
CONFIG_PCR_BOOT_MODE=1
|
||||
CONFIG_PCR_HWID=1
|
||||
CONFIG_PCR_SRTM=2
|
||||
CONFIG_PCR_RUNTIME_DATA=3
|
||||
# end of Trusted Platform Module
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
|
||||
# end of Memory initialization
|
||||
|
||||
# CONFIG_INTEL_TXT is not set
|
||||
# CONFIG_STM is not set
|
||||
# CONFIG_INTEL_CBNT_SUPPORT is not set
|
||||
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
||||
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
||||
# CONFIG_BOOTMEDIA_SMM_BWP is not set
|
||||
# end of Security
|
||||
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
CONFIG_ACPI_SOC_NVS=y
|
||||
CONFIG_ACPI_NO_CUSTOM_MADT=y
|
||||
CONFIG_ACPI_COMMON_MADT_LAPIC=y
|
||||
CONFIG_ACPI_COMMON_MADT_IOAPIC=y
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
|
||||
#
|
||||
# I/O mapped, 8250-compatible
|
||||
#
|
||||
CONFIG_TTYS0_BASE=0x3f8
|
||||
|
||||
#
|
||||
# Serial port base address = 0x3f8
|
||||
#
|
||||
# CONFIG_CONSOLE_SERIAL_921600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_460800 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_230400 is not set
|
||||
CONFIG_CONSOLE_SERIAL_115200=y
|
||||
# CONFIG_CONSOLE_SERIAL_57600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_38400 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_19200 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_9600 is not set
|
||||
CONFIG_TTYS0_LCS=3
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
# CONFIG_CONSOLE_I2C_SMBUS is not set
|
||||
# CONFIG_EM100PRO_SPI_CONSOLE is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
|
||||
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
|
||||
# CONFIG_CMOS_POST is not set
|
||||
CONFIG_POST_DEVICE_NONE=y
|
||||
# CONFIG_POST_DEVICE_LPC is not set
|
||||
# CONFIG_POST_DEVICE_PCI_PCIE is not set
|
||||
CONFIG_POST_IO_PORT=0x80
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
# end of Console
|
||||
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
CONFIG_IOAPIC=y
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
CONFIG_BIOS_VENDOR="coreboot"
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
# end of System tables
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
CONFIG_PAYLOAD_NONE=y
|
||||
# end of Payload
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
|
||||
#
|
||||
# CPU Debug Settings
|
||||
#
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
|
||||
#
|
||||
# BLOB Debug Settings
|
||||
#
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
#
|
||||
# CONFIG_GDB_STUB is not set
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
|
||||
# end of Debugging
|
||||
|
||||
CONFIG_RAMSTAGE_ADA=y
|
||||
CONFIG_RAMSTAGE_LIBHWBASE=y
|
||||
CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_REG_SCRIPT=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
|
@ -0,0 +1,619 @@
|
|||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
CONFIG_ARCH_SUPPORTS_CLANG=y
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_IWYU is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_USE_AMD_BLOBS is not set
|
||||
# CONFIG_USE_QC_BLOBS is not set
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
|
||||
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
|
||||
# CONFIG_ASAN is not set
|
||||
CONFIG_NO_STAGE_CACHE=y
|
||||
# CONFIG_TSEG_STAGE_CACHE is not set
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
# CONFIG_FW_CONFIG is not set
|
||||
|
||||
#
|
||||
# Software Bill Of Materials (SBOM)
|
||||
#
|
||||
# CONFIG_SBOM is not set
|
||||
# end of Software Bill Of Materials (SBOM)
|
||||
# end of General setup
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_51NB is not set
|
||||
# CONFIG_VENDOR_ACER is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BOSTENTECH is not set
|
||||
# CONFIG_VENDOR_BYTEDANCE is not set
|
||||
# CONFIG_VENDOR_CAVIUM is not set
|
||||
# CONFIG_VENDOR_CLEVO is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_DELL is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_EXAMPLE is not set
|
||||
# CONFIG_VENDOR_FACEBOOK is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
CONFIG_VENDOR_HP=y
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IBM is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_INVENTEC is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LENOVO is not set
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PINE64 is not set
|
||||
# CONFIG_VENDOR_PORTWELL is not set
|
||||
# CONFIG_VENDOR_PRODRIVE is not set
|
||||
# CONFIG_VENDOR_PROTECTLI is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RAZER is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_STARLABS is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_SYSTEM76 is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_PART_NUMBER="EliteBook 820 G2"
|
||||
CONFIG_MAINBOARD_VERSION="1.0"
|
||||
CONFIG_MAINBOARD_DIR="hp/elitebook_820_g2"
|
||||
CONFIG_VGA_BIOS_ID="8086,0406"
|
||||
CONFIG_DIMM_MAX=4
|
||||
CONFIG_DIMM_SPD_SIZE=256
|
||||
CONFIG_FMDFILE=""
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_MAINBOARD_VENDOR="HP"
|
||||
CONFIG_CBFS_SIZE=0xbdc000
|
||||
CONFIG_CONSOLE_SERIAL=y
|
||||
CONFIG_MAX_CPUS=8
|
||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
||||
CONFIG_POST_DEVICE=y
|
||||
CONFIG_POST_IO=y
|
||||
CONFIG_UART_FOR_CONSOLE=0
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="HP"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
|
||||
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
|
||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
||||
CONFIG_DCACHE_RAM_BASE=0xff7c0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x10000
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
|
||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
CONFIG_IFD_BIN_PATH="../../../config/ifd/hp820g2/12_ifd"
|
||||
CONFIG_ME_BIN_PATH="../../../vendorfiles/hp820g2/me.bin"
|
||||
CONFIG_GBE_BIN_PATH="../../../config/ifd/hp820g2/gbe"
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
CONFIG_PCIEXP_AER=y
|
||||
CONFIG_VBT_DATA_SIZE_KB=8
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
# CONFIG_BOARD_HP_280_G2 is not set
|
||||
# CONFIG_BOARD_HP_COMPAQ_8200_ELITE_SFF_PC is not set
|
||||
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_CMT is not set
|
||||
# CONFIG_BOARD_HP_COMPAQ_ELITE_8300_USDT is not set
|
||||
CONFIG_BOARD_HP_ELITEBOOK_820_G2=y
|
||||
# CONFIG_BOARD_HP_FOLIO_9480M is not set
|
||||
# CONFIG_BOARD_HP_2170P is not set
|
||||
# CONFIG_BOARD_HP_2560P is not set
|
||||
# CONFIG_BOARD_HP_2570P is not set
|
||||
# CONFIG_BOARD_HP_2760P is not set
|
||||
# CONFIG_BOARD_HP_8460P is not set
|
||||
# CONFIG_BOARD_HP_8470P is not set
|
||||
# CONFIG_BOARD_HP_8770W is not set
|
||||
# CONFIG_BOARD_HP_FOLIO_9470M is not set
|
||||
# CONFIG_BOARD_HP_PROBOOK_6360B is not set
|
||||
# CONFIG_BOARD_HP_REVOLVE_810_G1 is not set
|
||||
# CONFIG_BOARD_HP_Z220_CMT_WORKSTATION is not set
|
||||
# CONFIG_BOARD_HP_Z220_SFF_WORKSTATION is not set
|
||||
CONFIG_EC_HP_KBC1126_GPE=0x6
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="EliteBook 820 G2"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_PS2K_EISAID="PNP0303"
|
||||
CONFIG_PS2M_EISAID="PNP0F13"
|
||||
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
|
||||
CONFIG_TTYS0_BAUD=115200
|
||||
CONFIG_D3COLD_SUPPORT=y
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=12288
|
||||
CONFIG_ROM_SIZE=0x00c00000
|
||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
||||
CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
|
||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
|
||||
# end of Mainboard
|
||||
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CHIPSET_DEVICETREE=""
|
||||
CONFIG_CBFS_MCACHE_SIZE=0x4000
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_EHCI_BAR=0xd8000000
|
||||
CONFIG_ACPI_CPU_STRING="CP%02X"
|
||||
CONFIG_STACK_SIZE=0x2000
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8254
|
||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
||||
CONFIG_BOOTBLOCK_IN_CBFS=y
|
||||
CONFIG_HAVE_MRC=y
|
||||
CONFIG_MRC_FILE="../../../mrc/broadwell/mrc.bin"
|
||||
CONFIG_MRC_BIN_ADDRESS=0xfffa0000
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
|
||||
CONFIG_HAVE_REFCODE_BLOB=y
|
||||
CONFIG_REFCODE_BLOB_FILE="../../../mrc/broadwell/refcode"
|
||||
CONFIG_SOC_INTEL_BROADWELL=y
|
||||
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
|
||||
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_INTEL_LYNXPOINT_LP=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_DISABLE_ME_PCI=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xfe000000
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
CONFIG_CPU_INTEL_HASWELL=y
|
||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
||||
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
|
||||
CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
|
||||
CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
|
||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_XAPIC_ONLY=y
|
||||
# CONFIG_X2APIC_ONLY is not set
|
||||
# CONFIG_X2APIC_RUNTIME is not set
|
||||
# CONFIG_X2APIC_LATE_WORKAROUND is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_PCIEXP_HOTPLUG is not set
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
|
||||
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
|
||||
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
|
||||
CONFIG_RCBA_LENGTH=0x4000
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_HP_KBC1126=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_STITCH_ME_BIN is not set
|
||||
# CONFIG_CHECK_ME is not set
|
||||
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
CONFIG_DEBUG_HW_BREAKPOINTS=y
|
||||
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
|
||||
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
|
||||
# end of Chipset
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
|
||||
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
CONFIG_NO_EARLY_GFX_INIT=y
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_VGA_TEXT_FRAMEBUFFER=y
|
||||
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
|
||||
# end of Display
|
||||
|
||||
CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_PLUGIN_SUPPORT=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
|
||||
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
|
||||
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
|
||||
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
|
||||
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
CONFIG_RESOURCE_ALLOCATION_TOP_DOWN=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_ELOG is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
|
||||
CONFIG_TPM_INIT_RAMSTAGE=y
|
||||
# CONFIG_TPM_PPI is not set
|
||||
CONFIG_DRIVERS_UART=y
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98396 is not set
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_DYN_CPU=y
|
||||
CONFIG_GFX_GMA_GENERATION="Haswell"
|
||||
CONFIG_GFX_GMA_PCH="Lynx_Point"
|
||||
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
|
||||
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
|
||||
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_USE_PC_CMOS_ALTCENTURY=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
|
||||
CONFIG_MEMORY_MAPPED_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
CONFIG_VGA=y
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
CONFIG_DRIVERS_WIFI_GENERIC=y
|
||||
# end of Generic Drivers
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# CBFS verification
|
||||
#
|
||||
# CONFIG_CBFS_VERIFICATION is not set
|
||||
# end of CBFS verification
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
# end of Verified Boot (vboot)
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
# CONFIG_NO_TPM is not set
|
||||
CONFIG_TPM1=y
|
||||
CONFIG_TPM=y
|
||||
CONFIG_MAINBOARD_HAS_TPM1=y
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
CONFIG_PCR_BOOT_MODE=1
|
||||
CONFIG_PCR_HWID=1
|
||||
CONFIG_PCR_SRTM=2
|
||||
CONFIG_PCR_RUNTIME_DATA=3
|
||||
# end of Trusted Platform Module
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT=y
|
||||
# end of Memory initialization
|
||||
|
||||
# CONFIG_INTEL_TXT is not set
|
||||
# CONFIG_STM is not set
|
||||
# CONFIG_INTEL_CBNT_SUPPORT is not set
|
||||
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
||||
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
||||
# CONFIG_BOOTMEDIA_SMM_BWP is not set
|
||||
# end of Security
|
||||
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
CONFIG_ACPI_SOC_NVS=y
|
||||
CONFIG_ACPI_NO_CUSTOM_MADT=y
|
||||
CONFIG_ACPI_COMMON_MADT_LAPIC=y
|
||||
CONFIG_ACPI_COMMON_MADT_IOAPIC=y
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
|
||||
#
|
||||
# I/O mapped, 8250-compatible
|
||||
#
|
||||
CONFIG_TTYS0_BASE=0x3f8
|
||||
|
||||
#
|
||||
# Serial port base address = 0x3f8
|
||||
#
|
||||
# CONFIG_CONSOLE_SERIAL_921600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_460800 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_230400 is not set
|
||||
CONFIG_CONSOLE_SERIAL_115200=y
|
||||
# CONFIG_CONSOLE_SERIAL_57600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_38400 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_19200 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_9600 is not set
|
||||
CONFIG_TTYS0_LCS=3
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
# CONFIG_CONSOLE_I2C_SMBUS is not set
|
||||
# CONFIG_EM100PRO_SPI_CONSOLE is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
|
||||
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
|
||||
# CONFIG_CMOS_POST is not set
|
||||
CONFIG_POST_DEVICE_NONE=y
|
||||
# CONFIG_POST_DEVICE_LPC is not set
|
||||
# CONFIG_POST_DEVICE_PCI_PCIE is not set
|
||||
CONFIG_POST_IO_PORT=0x80
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
# end of Console
|
||||
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
CONFIG_IOAPIC=y
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
CONFIG_BIOS_VENDOR="coreboot"
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
# end of System tables
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
CONFIG_PAYLOAD_NONE=y
|
||||
# end of Payload
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
|
||||
#
|
||||
# CPU Debug Settings
|
||||
#
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
|
||||
#
|
||||
# BLOB Debug Settings
|
||||
#
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
#
|
||||
# CONFIG_GDB_STUB is not set
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
|
||||
# end of Debugging
|
||||
|
||||
CONFIG_RAMSTAGE_ADA=y
|
||||
CONFIG_RAMSTAGE_LIBHWBASE=y
|
||||
CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_REG_SCRIPT=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
|
|
@ -0,0 +1,7 @@
|
|||
tree="default"
|
||||
xarch="i386-elf"
|
||||
payload_grub="y"
|
||||
payload_grub_withseabios="y"
|
||||
payload_seabios="y"
|
||||
payload_memtest="y"
|
||||
grub_scan_disk="ahci"
|
||||
|
|
@ -0,0 +1 @@
|
|||
|
||||
Binary file not shown.
Binary file not shown.
|
|
@ -33,6 +33,18 @@
|
|||
MRC_board peppy
|
||||
}
|
||||
|
||||
{hp820g2}{
|
||||
DL_hash 1ac05a3e4f46426eeb77f89c4aca25ed1ad64479d8fcba6a3ab63a944512bacbc5d148cc7b9c4ff4b8c90a1fb1de4776e46f14aca8021900e0df37246aa0b717
|
||||
DL_url https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe
|
||||
DL_url_bkup https://download.lenovo.com/pccbbs/mobiles/n10rg50w.exe
|
||||
MRC_url https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
|
||||
MRC_url_bkup https://web.archive.org/web/20220310155922/https://dl.google.com/dl/edgedl/chromeos/recovery/chromeos_13904.77.0_samus_recovery_stable-channel_mp-v3.bin.zip
|
||||
MRC_hash 3ff1599c52539f0707a07a8664a84ce51cd3fed1569df4bb7aa6722fc8dec0af1754250333b6ca1a9794d970a4de7b29a5cf2499f5b61e4c3eab64d1314aaea9
|
||||
MRC_board samus
|
||||
MRC_refcode_cbtree coreboot413
|
||||
MRC_refcode_gbe 131253
|
||||
}
|
||||
|
||||
{hp8200sff}{
|
||||
DL_hash 8fcb691bf84dc1feefc3c84f7cc59eadaabb200477bb3ecba1b050f23f133b0a8c2539015a523f676544c2dff64599bcba7e844e8c31757b90d70bb4485b5664
|
||||
DL_url https://ftp.ext.hp.com/pub/softpaq/sp96001-96500/sp96026.exe
|
||||
|
|
|
|||
|
|
@ -1,11 +1,25 @@
|
|||
# SPDX-License-Identifier: GPL-2.0-only
|
||||
|
||||
# Logic based on util/chromeos/crosfirmware.sh in coreboot cfc26ce278.
|
||||
# Modifications in this version are Copyright 2021 and 2023 Leah Rowe.
|
||||
# Modifications in this version are Copyright 2021, 2023 and 2024 Leah Rowe.
|
||||
# Original copyright detailed in repo: https://review.coreboot.org/coreboot/
|
||||
|
||||
eval "$(setvars "" MRC_url MRC_url_bkup MRC_hash MRC_board SHELLBALL)"
|
||||
|
||||
extract_ref()
|
||||
{
|
||||
# refcode needed on broadwell, but not needed on haswell
|
||||
|
||||
# we check mrc twice, because each check only verifies one file,
|
||||
# but refcode is downloaded alongside mrc. in cases where lbmk
|
||||
# erred, downloading only mrc, we must ensure downloading refcode
|
||||
[ -n "$CONFIG_MRC_FILE" ] || \
|
||||
err "extract_ref $board: CONFIG_MRC_FILE not defined"
|
||||
|
||||
# the extract_mrc function actually downloads the refcode
|
||||
fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
|
||||
}
|
||||
|
||||
extract_mrc()
|
||||
{
|
||||
[ -z "$MRC_board" ] && err "extract_mrc $MRC_hash: MRC_board not set"
|
||||
|
|
@ -22,6 +36,8 @@ extract_mrc()
|
|||
|
||||
"${cbfstool}" "${appdir}/"bios.bin extract -n mrc.bin \
|
||||
-f "$_dest" -r RO_SECTION || err "extract_mrc: cbfstool $_dest"
|
||||
|
||||
[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && extract_refcode; return 0
|
||||
}
|
||||
|
||||
extract_partition()
|
||||
|
|
@ -40,3 +56,26 @@ extract_partition()
|
|||
printf "cd /usr/sbin\ndump chromeos-firmwareupdate ${SHELLBALL}\nquit" \
|
||||
| debugfs "root-a.ext2" || err "can't extract shellball"
|
||||
}
|
||||
|
||||
extract_refcode()
|
||||
{
|
||||
_refdest="${CONFIG_REFCODE_BLOB_FILE##*../}"
|
||||
[ -f "$_refdest" ] && return 0
|
||||
|
||||
# cbfstool changed the attributes scheme for stage files,
|
||||
# incompatible with older versions before coreboot 4.14,
|
||||
# so we need coreboot 4.13 cbfstool for certain refcode files
|
||||
[ -n "$cbfstoolref" ] || \
|
||||
err "extract_refcode $board: MRC_refcode_cbtree not set"
|
||||
mkdir -p "${_refdest%/*}" || \
|
||||
err "extract_refcode $board: !mkdir -p ${_refdest%/*}"
|
||||
|
||||
"$cbfstoolref" "$appdir/bios.bin" extract \
|
||||
-m x86 -n fallback/refcode -f "$_refdest" -r RO_SECTION \
|
||||
|| err "extract_refcode $board: !cbfstoolref $_refdest"
|
||||
|
||||
# enable the Intel GbE device, if told by offset MRC_refcode_gbe
|
||||
[ -z "$MRC_refcode_gbe" ] || dd if="config/ifd/hp820g2/1.bin" \
|
||||
of="$_refdest" bs=1 seek=$MRC_refcode_gbe count=1 conv=notrunc || \
|
||||
err "extract_refcode $_refdest: byte $MRC_refcode_gbe"; return 0
|
||||
}
|
||||
|
|
|
|||
|
|
@ -19,7 +19,8 @@ eval "$(setvars "" CONFIG_BOARD_DELL_E6400 CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN \
|
|||
CONFIG_KBC1126_FW1_OFFSET CONFIG_KBC1126_FW2 CONFIG_KBC1126_FW2_OFFSET \
|
||||
CONFIG_VGA_BIOS_FILE CONFIG_VGA_BIOS_ID CONFIG_GBE_BIN_PATH \
|
||||
CONFIG_INCLUDE_SMSC_SCH5545_EC_FW CONFIG_SMSC_SCH5545_EC_FW_FILE \
|
||||
CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir)"
|
||||
CONFIG_IFD_BIN_PATH CONFIG_MRC_FILE _dest board boarddir \
|
||||
CONFIG_HAVE_REFCODE_BLOB CONFIG_REFCODE_BLOB_FILE)"
|
||||
|
||||
items()
|
||||
{
|
||||
|
|
|
|||
|
|
@ -2,7 +2,7 @@
|
|||
# SPDX-License-Identifier: GPL-3.0-only
|
||||
# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
|
||||
# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
|
||||
# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
|
||||
# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
|
||||
|
||||
. "include/err.sh"
|
||||
. "include/option.sh"
|
||||
|
|
@ -14,16 +14,15 @@ _ua="Mozilla/5.0 (Windows NT 10.0; rv:91.0) Gecko/20100101 Firefox/91.0"
|
|||
_7ztest="a"
|
||||
|
||||
e6400_unpack="${PWD}/src/bios_extract/dell_inspiron_1100_unpacker.py"
|
||||
kbc1126_ec_dump="${PWD}/${cbdir}/util/kbc1126/kbc1126_ec_dump"
|
||||
me7updateparser="${PWD}/util/me7_update_parser/me7_update_parser.py"
|
||||
mecleaner="${PWD}/${cbdir}/util/me_cleaner/me_cleaner.py"
|
||||
pfs_extract="${PWD}/src/biosutilities/Dell_PFS_Extract.py"
|
||||
uefiextract="${PWD}/src/uefitool/uefiextract"
|
||||
|
||||
eval "$(setvars "" _b _dl EC_url EC_url_bkup EC_hash DL_hash DL_url DL_url_bkup \
|
||||
E6400_VGA_DL_hash E6400_VGA_DL_url E6400_VGA_DL_url_bkup E6400_VGA_offset \
|
||||
E6400_VGA_romname SCH5545EC_DL_url SCH5545EC_DL_url_bkup SCH5545EC_DL_hash \
|
||||
is_rom)"
|
||||
is_rom tree mecleaner kbc1126_ec_dump MRC_refcode_cbtree cbfstoolref \
|
||||
MRC_refcode_gbe)"
|
||||
|
||||
main()
|
||||
{
|
||||
|
|
@ -50,6 +49,13 @@ detect_firmware()
|
|||
|
||||
set -- "${boarddir}/config/"*
|
||||
. "${1}" 2>/dev/null
|
||||
. "${boarddir}/target.cfg" 2>/dev/null
|
||||
[ -z "$tree" ] && err "detect_firmware $boarddir: tree undefined"
|
||||
cbdir="src/coreboot/$tree"
|
||||
cbfstool="cbutils/$tree/cbfstool"
|
||||
|
||||
mecleaner="${PWD}/${cbdir}/util/me_cleaner/me_cleaner.py"
|
||||
kbc1126_ec_dump="${PWD}/${cbdir}/util/kbc1126/kbc1126_ec_dump"
|
||||
|
||||
for c in CONFIG_HAVE_MRC CONFIG_HAVE_ME_BIN CONFIG_KBC1126_FIRMWARE \
|
||||
CONFIG_VGA_BIOS_FILE CONFIG_INCLUDE_SMSC_SCH5545_EC_FW; do
|
||||
|
|
@ -66,9 +72,14 @@ build_dependencies()
|
|||
x_ ./update trees -f "${d}"
|
||||
done
|
||||
[ -f "${uefiextract}" ] || x_ ./update trees -b uefitool
|
||||
[ -f "${kbc1126_ec_dump}" ] || x_ make -C "${cbdir}/util/kbc1126"
|
||||
[ ! -d "${kbc1126_ec_dump%/*}" ] || [ -f "${kbc1126_ec_dump}" ] || x_ \
|
||||
make -C "${cbdir}/util/kbc1126"
|
||||
[ -n "$MRC_refcode_cbtree" ] && \
|
||||
cbfstoolref="cbutils/$MRC_refcode_cbtree/cbfstool"
|
||||
[ -z "$cbfstoolref" ] || [ -f "$cbfstoolref" ] || \
|
||||
x_ ./update trees -b coreboot utils $MRC_refcode_cbtree
|
||||
[ -f "${cbfstool}" ] && [ -f "${ifdtool}" ] && return 0
|
||||
x_ ./update trees -b coreboot utils default
|
||||
x_ ./update trees -b coreboot utils $tree
|
||||
}
|
||||
|
||||
download_vendorfiles()
|
||||
|
|
@ -87,6 +98,10 @@ download_vendorfiles()
|
|||
"$E6400_VGA_DL_hash" "$CONFIG_VGA_BIOS_FILE"
|
||||
[ -z "${CONFIG_HAVE_MRC}" ] && return 0
|
||||
fetch "mrc" "$MRC_url" "$MRC_url_bkup" "$MRC_hash" "$CONFIG_MRC_FILE"
|
||||
|
||||
# in case only mrc downloaded before, in a pair of mrc/refcode:
|
||||
[ -n "$CONFIG_REFCODE_BLOB_FILE" ] && fetch "ref" "$MRC_url" \
|
||||
"$MRC_url_bkup" "$MRC_hash" "$CONFIG_REFCODE_BLOB_FILE"; return 0
|
||||
}
|
||||
|
||||
fetch()
|
||||
|
|
@ -156,6 +171,9 @@ mkdirs()
|
|||
|
||||
extract_intel_me()
|
||||
{
|
||||
[ ! -f "$mecleaner" ] && \
|
||||
err "extract_intel_me $cbdir: me_cleaner missing"
|
||||
|
||||
_me="${PWD}/${_dest}" # must always be an absolute path
|
||||
cdir="${PWD}/${appdir}" # must always be an absolute path
|
||||
[ $# -gt 0 ] && _me="${1}" && cdir="${2}"
|
||||
|
|
@ -198,6 +216,8 @@ extract_archive()
|
|||
|
||||
extract_kbc1126ec()
|
||||
{
|
||||
[ ! -f "$kbc1126_ec_dump" ] && \
|
||||
err "extract_kbc1126ec $cbdir: kbc1126_ec_dump missing"
|
||||
(
|
||||
x_ cd "${appdir}/"
|
||||
mv Rompaq/68*.BIN ec.bin || :
|
||||
|
|
|
|||
|
|
@ -2,14 +2,14 @@
|
|||
# SPDX-License-Identifier: GPL-3.0-only
|
||||
# SPDX-FileCopyrightText: 2022 Caleb La Grange <thonkpeasant@protonmail.com>
|
||||
# SPDX-FileCopyrightText: 2022 Ferass El Hafidi <vitali64pmemail@protonmail.com>
|
||||
# SPDX-FileCopyrightText: 2023 Leah Rowe <leah@libreboot.org>
|
||||
# SPDX-FileCopyrightText: 2023-2024 Leah Rowe <leah@libreboot.org>
|
||||
|
||||
. "include/err.sh"
|
||||
. "include/option.sh"
|
||||
|
||||
nvmutil="util/nvmutil/nvm"
|
||||
|
||||
eval "$(setvars "" archive rom modifygbe nukemode release new_mac)"
|
||||
eval "$(setvars "" archive rom modifygbe nukemode release new_mac tree)"
|
||||
|
||||
main()
|
||||
{
|
||||
|
|
@ -51,7 +51,11 @@ check_board()
|
|||
fi
|
||||
|
||||
boarddir="${cbcfgsdir}/${board}"
|
||||
[ -d "$boarddir" ] || err "check_board: board $board missing"; return 0
|
||||
[ -d "$boarddir" ] || err "check_board: board $board missing"
|
||||
[ -f "$boarddir/target.cfg" ] || \
|
||||
err "check_board $board: target.cfg missing"
|
||||
. "$boarddir/target.cfg" 2>/dev/null
|
||||
[ -z "$tree" ] && err "check_board $board: tree undefined"; return 0
|
||||
}
|
||||
|
||||
check_release()
|
||||
|
|
@ -84,9 +88,12 @@ detect_board()
|
|||
|
||||
build_dependencies()
|
||||
{
|
||||
[ -d "${cbdir}" ] || x_ ./update trees -f coreboot default
|
||||
cbdir="src/coreboot/$tree"
|
||||
cbfstool="cbutils/$tree/cbfstool"
|
||||
ifdtool="cbutils/$tree/ifdtool"
|
||||
[ -d "${cbdir}" ] || x_ ./update trees -f coreboot $tree
|
||||
if [ ! -f "${cbfstool}" ] || [ ! -f "${ifdtool}" ]; then
|
||||
x_ ./update trees -b coreboot utils default
|
||||
x_ ./update trees -b coreboot utils $tree
|
||||
fi
|
||||
[ -z "$new_mac" ] || [ -f "$nvmutil" ] || x_ make -C util/nvmutil
|
||||
[ "$nukemode" = "nuke" ] || x_ ./vendor download $board; return 0
|
||||
|
|
@ -144,6 +151,8 @@ patch_rom()
|
|||
|
||||
[ "$CONFIG_HAVE_MRC" = "y" ] && \
|
||||
inject "mrc.bin" "${CONFIG_MRC_FILE}" "mrc" "0xfffa0000"
|
||||
[ -n "$CONFIG_HAVE_REFCODE_BLOB" ] && \
|
||||
inject "fallback/refcode" "$CONFIG_REFCODE_BLOB_FILE" "stage"
|
||||
[ "${CONFIG_HAVE_ME_BIN}" = "y" ] && \
|
||||
inject "IFD" "${CONFIG_ME_BIN_PATH}" "me"
|
||||
[ "${CONFIG_KBC1126_FIRMWARE}" = "y" ] && \
|
||||
|
|
@ -200,9 +209,14 @@ inject()
|
|||
fi
|
||||
else
|
||||
if [ "${nukemode}" != "nuke" ]; then
|
||||
"$cbfstool" "$rom" add -f "$_dest" \
|
||||
-n "$cbfsname" -t $_t $_offset || \
|
||||
err "inject $rom: can't insert $_t file $_dest"
|
||||
if [ "$_t" = "stage" ]; then # broadwell refcode
|
||||
"$cbfstool" "$rom" add-stage -f "$_dest" \
|
||||
-n "$cbfsname" -t stage -c lzma
|
||||
else
|
||||
"$cbfstool" "$rom" add -f "$_dest" \
|
||||
-n "$cbfsname" -t $_t $_offset || \
|
||||
err "$rom: can't insert $_t file $_dest"
|
||||
fi
|
||||
else
|
||||
"$cbfstool" "$rom" remove -n "$cbfsname" || \
|
||||
err "inject $rom: can't remove $cbfsname"
|
||||
|
|
|
|||
Loading…
Reference in New Issue