coreboot: revert cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR
This fixes issue 3: https://notabug.org/libreboot/lbmk/issues/3 In this issue, GM45 laptops such as X200/T400 will hang on reboot (normal boot works, and shutting down works too).fsdg20230625
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@ -1,7 +1,7 @@
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From 91b073efaca57d455e2f25370918b9796cbc1a15 Mon Sep 17 00:00:00 2001
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From 0d1703b38c15d3a30d86e257adc71212ed1553e6 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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From: Leah Rowe <leah@libreboot.org>
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Date: Thu, 13 May 2021 23:52:08 +0100
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Date: Thu, 13 May 2021 23:52:08 +0100
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Subject: [PATCH 01/17] hardcode tianocore revisions, and don't automatically
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Subject: [PATCH 01/19] hardcode tianocore revisions, and don't automatically
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download
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download
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---
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---
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@ -1,7 +1,7 @@
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From 2ca1b655f0421fb9ed971f6e815bdd9dadc61a32 Mon Sep 17 00:00:00 2001
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From 7f56e3dc6b92f643e4f2c7eebf7da7c0a5e0cc1d Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@osboot.org>
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From: Leah Rowe <leah@osboot.org>
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Date: Sun, 3 Jan 2021 03:34:01 +0000
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Date: Sun, 3 Jan 2021 03:34:01 +0000
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Subject: [PATCH 02/17] lenovo/x60: 64MiB Video RAM changed to default
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Subject: [PATCH 02/19] lenovo/x60: 64MiB Video RAM changed to default
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(previously it was 8MiB)
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(previously it was 8MiB)
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---
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---
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@ -1,7 +1,7 @@
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From 86bf61b803e116e9037d74a1166e64c7b6d85c7a Mon Sep 17 00:00:00 2001
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From 08f1bb813721bb9e7c9f60d3d08e22391080c69e Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@osboot.org>
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From: Leah Rowe <leah@osboot.org>
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Date: Mon, 22 Feb 2021 22:16:59 +0000
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Date: Mon, 22 Feb 2021 22:16:59 +0000
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Subject: [PATCH 03/17] lenovo/t60: make 64MiB VRAM the default in cmos.default
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Subject: [PATCH 03/19] lenovo/t60: make 64MiB VRAM the default in cmos.default
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---
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---
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src/mainboard/lenovo/t60/cmos.default | 2 +-
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src/mainboard/lenovo/t60/cmos.default | 2 +-
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@ -1,7 +1,7 @@
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From d2da9e70f608016c20976623a6ca9916da13e647 Mon Sep 17 00:00:00 2001
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From edac42ddfaf86d60575f7789ad66c95adea8b4af Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@retroboot.org>
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From: Leah Rowe <leah@retroboot.org>
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Date: Fri, 19 Mar 2021 05:54:58 +0000
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Date: Fri, 19 Mar 2021 05:54:58 +0000
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Subject: [PATCH 04/17] apple/macbook21: Set default VRAM to 64MiB instead of
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Subject: [PATCH 04/19] apple/macbook21: Set default VRAM to 64MiB instead of
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8MiB
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8MiB
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---
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---
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@ -1,7 +1,7 @@
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From f0c8276fe364d4773f9f305f2678a0b8e8f84830 Mon Sep 17 00:00:00 2001
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From 95466021fb0e581442be523f4b84939ef5c28ea7 Mon Sep 17 00:00:00 2001
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From: Idwer Vollering <vidwer@gmail.com>
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From: Idwer Vollering <vidwer@gmail.com>
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Date: Sun, 9 May 2021 18:16:26 +0200
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Date: Sun, 9 May 2021 18:16:26 +0200
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Subject: [PATCH 05/17] util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD
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Subject: [PATCH 05/19] util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD
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Fixes compilation on FreeBSD CURRENT, and possibly other releases.
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Fixes compilation on FreeBSD CURRENT, and possibly other releases.
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@ -1,7 +1,7 @@
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From 8a687e2efd7199a06cd6bdd85fa1a1b17bca53cc Mon Sep 17 00:00:00 2001
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From 44de7f951ae55d60b96794b68d505d42af184d0a Mon Sep 17 00:00:00 2001
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From: Martin Roth <martin@coreboot.org>
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From: Martin Roth <martin@coreboot.org>
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Date: Mon, 10 May 2021 11:28:45 -0600
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Date: Mon, 10 May 2021 11:28:45 -0600
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Subject: [PATCH 06/17] src/security/intel/stm: Add warning for
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Subject: [PATCH 06/19] src/security/intel/stm: Add warning for
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non-reproducible build
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non-reproducible build
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Because the STM build doesn't use the coreboot toolchain it's not
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Because the STM build doesn't use the coreboot toolchain it's not
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@ -1,7 +1,7 @@
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From 710301b4e80325012e86cdec3c0c4bcca03be551 Mon Sep 17 00:00:00 2001
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From 87f01ab327469aae978884b83dd218416cf5035b Mon Sep 17 00:00:00 2001
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From: Martin Roth <martin@coreboot.org>
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From: Martin Roth <martin@coreboot.org>
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Date: Sun, 9 May 2021 10:26:10 -0600
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Date: Sun, 9 May 2021 10:26:10 -0600
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Subject: [PATCH 07/17] Makefile: Don't run genbuild_h if not doing a build
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Subject: [PATCH 07/19] Makefile: Don't run genbuild_h if not doing a build
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genbuild_h was being run on every make invocation - clean, distclean,
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genbuild_h was being run on every make invocation - clean, distclean,
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etc. to get the source date epoch value. This value isn't used unless
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etc. to get the source date epoch value. This value isn't used unless
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@ -1,7 +1,7 @@
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From 5c4c5cdc3110bf02b93be9d5eb744235c8f49e33 Mon Sep 17 00:00:00 2001
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From bb4f6e441d94d52c37998d6894b373a4e797de80 Mon Sep 17 00:00:00 2001
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From: Martin Roth <martin@coreboot.org>
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From: Martin Roth <martin@coreboot.org>
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Date: Sun, 9 May 2021 11:44:15 -0600
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Date: Sun, 9 May 2021 11:44:15 -0600
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Subject: [PATCH 08/17] util/genbuild_h: Update IASL location finding code
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Subject: [PATCH 08/19] util/genbuild_h: Update IASL location finding code
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Update the iasl path finding code to use XGCCPATH if it's set, and to
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Update the iasl path finding code to use XGCCPATH if it's set, and to
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look for iasl on the path if it's not set and not under util/crossgcc.
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look for iasl on the path if it's not set and not under util/crossgcc.
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@ -1,7 +1,7 @@
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From 86af2659583125b2891ad57bde30a33adff91c03 Mon Sep 17 00:00:00 2001
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From f9e67d0def253cd28ffe841f1e99885e7a44b0b5 Mon Sep 17 00:00:00 2001
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From: Patrick Georgi <pgeorgi@google.com>
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From: Patrick Georgi <pgeorgi@google.com>
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Date: Mon, 10 May 2021 23:34:18 +0200
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Date: Mon, 10 May 2021 23:34:18 +0200
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Subject: [PATCH 09/17] util/crossgcc: Update gmp to 6.2.1
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Subject: [PATCH 09/19] util/crossgcc: Update gmp to 6.2.1
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Change-Id: I871942f66e8fc496ebe523fdab539ea20950a202
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Change-Id: I871942f66e8fc496ebe523fdab539ea20950a202
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Signed-off-by: Patrick Georgi <pgeorgi@google.com>
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Signed-off-by: Patrick Georgi <pgeorgi@google.com>
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@ -1,7 +1,7 @@
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From b1533d4dca6b9c88f9e0418d5a93dd9a3c4cd7f3 Mon Sep 17 00:00:00 2001
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From af8727a0b86f0f705129529a478a29622df3fed9 Mon Sep 17 00:00:00 2001
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From: Patrick Georgi <pgeorgi@google.com>
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From: Patrick Georgi <pgeorgi@google.com>
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Date: Mon, 10 May 2021 23:35:51 +0200
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Date: Mon, 10 May 2021 23:35:51 +0200
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Subject: [PATCH 10/17] util/crossgcc: Update mpc to 1.2.1
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Subject: [PATCH 10/19] util/crossgcc: Update mpc to 1.2.1
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Change-Id: Ic1422464d0a95c9cba1c417aaa05e4f1fe799d26
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Change-Id: Ic1422464d0a95c9cba1c417aaa05e4f1fe799d26
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Signed-off-by: Patrick Georgi <pgeorgi@google.com>
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Signed-off-by: Patrick Georgi <pgeorgi@google.com>
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@ -1,7 +1,7 @@
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From 89236c7c44797cd8306d9509552bf0115ffe928a Mon Sep 17 00:00:00 2001
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From 277f409dcb520911b55a73c5f5c0e39ae1078012 Mon Sep 17 00:00:00 2001
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From: Jakub Czapiga <jacz@semihalf.com>
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From: Jakub Czapiga <jacz@semihalf.com>
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Date: Wed, 28 Apr 2021 16:50:51 +0200
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Date: Wed, 28 Apr 2021 16:50:51 +0200
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Subject: [PATCH 11/17] tests: Enable config override for tests
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Subject: [PATCH 11/19] tests: Enable config override for tests
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Some tests require to change kconfig symbols values to cover the code.
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Some tests require to change kconfig symbols values to cover the code.
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This patch enables one to set these vaues using <test-name>-config
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This patch enables one to set these vaues using <test-name>-config
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@ -1,7 +1,7 @@
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From 7413a445b51db0adb9faf1bb21d8f6d2311a35d0 Mon Sep 17 00:00:00 2001
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From bc1be4e1a6c6104693ad8fc44be8feb8e0112765 Mon Sep 17 00:00:00 2001
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From: Patrick Georgi <pgeorgi@google.com>
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From: Patrick Georgi <pgeorgi@google.com>
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Date: Wed, 12 May 2021 14:52:12 +0200
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Date: Wed, 12 May 2021 14:52:12 +0200
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Subject: [PATCH 12/17] src: Match array format in function declarations and
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Subject: [PATCH 12/19] src: Match array format in function declarations and
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definitions
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definitions
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gcc 11.1 complains when we're passing a type* into a function that was
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gcc 11.1 complains when we're passing a type* into a function that was
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@ -1,7 +1,7 @@
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From 37589dc0c9c0bb78904b0b2b9aae0ba519eb6e04 Mon Sep 17 00:00:00 2001
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From 416c686c4c06ab42f700187ee1dc7fe9e4fed525 Mon Sep 17 00:00:00 2001
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From: Patrick Georgi <pgeorgi@google.com>
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From: Patrick Georgi <pgeorgi@google.com>
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Date: Wed, 12 May 2021 14:54:49 +0200
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Date: Wed, 12 May 2021 14:54:49 +0200
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Subject: [PATCH 13/17] src/security/tpm: Deal with zero length tlcl writes
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Subject: [PATCH 13/19] src/security/tpm: Deal with zero length tlcl writes
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While memcpy(foo, bar, 0) should be a no-op, that's hard to prove for a
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While memcpy(foo, bar, 0) should be a no-op, that's hard to prove for a
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compiler and so gcc 11.1 complains about the use of an uninitialized
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compiler and so gcc 11.1 complains about the use of an uninitialized
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@ -1,7 +1,7 @@
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From cff1ab192e04ca9c90b03bf4aa74d54db078d4d2 Mon Sep 17 00:00:00 2001
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From 0966b4c69f6c3df000cb4f904b9dc0bf822e5b4f Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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From: Leah Rowe <leah@libreboot.org>
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Date: Fri, 14 May 2021 13:10:33 +0100
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Date: Fri, 14 May 2021 13:10:33 +0100
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Subject: [PATCH 14/17] lenovo/t400: set VRAM to 352MiB VRAM by default
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Subject: [PATCH 14/19] lenovo/t400: set VRAM to 352MiB VRAM by default
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In the past, this caused stability issues so we set it to 256MiB. Nowadays,
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In the past, this caused stability issues so we set it to 256MiB. Nowadays,
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coreboot has fixed the issue preventing this. See:
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coreboot has fixed the issue preventing this. See:
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@ -1,7 +1,7 @@
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From 0daea37502732d3cc19404c2be7cb5b7be095456 Mon Sep 17 00:00:00 2001
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From 4680045aaa952ce8b2d8fe75721b5f8e662286d1 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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From: Leah Rowe <leah@libreboot.org>
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Date: Fri, 14 May 2021 13:11:59 +0100
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Date: Fri, 14 May 2021 13:11:59 +0100
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Subject: [PATCH 15/17] lenovo/x200: set VRAM to 352MiB by default
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Subject: [PATCH 15/19] lenovo/x200: set VRAM to 352MiB by default
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This fix makes it possible:
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This fix makes it possible:
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https://review.coreboot.org/c/coreboot/+/16831
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https://review.coreboot.org/c/coreboot/+/16831
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@ -1,7 +1,7 @@
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From 264ea6cfabe553059c888dea09046e6eac393d1b Mon Sep 17 00:00:00 2001
|
From 213c3ad9ca58b0c7f273d80f195c442ed5d7ec54 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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From: Leah Rowe <leah@libreboot.org>
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Date: Fri, 14 May 2021 13:18:26 +0100
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Date: Fri, 14 May 2021 13:18:26 +0100
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Subject: [PATCH 16/17] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
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Subject: [PATCH 16/19] gigabyte/ga-g41m-es2l: set VRAM to 352MiB by default
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|
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---
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---
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src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
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src/mainboard/gigabyte/ga-g41m-es2l/cmos.default | 2 +-
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@ -1,7 +1,7 @@
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From a40d461be382e3897b4365f34b5e5872baf72334 Mon Sep 17 00:00:00 2001
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From fb4c9fcad31d50949ffaeb35dbcfe10c7b9c1dbb Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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From: Leah Rowe <leah@libreboot.org>
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Date: Fri, 14 May 2021 13:21:39 +0100
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Date: Fri, 14 May 2021 13:21:39 +0100
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Subject: [PATCH 17/17] acer/g43t-am3: set VRAM to 352MiB by default
|
Subject: [PATCH 17/19] acer/g43t-am3: set VRAM to 352MiB by default
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|
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---
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---
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src/mainboard/acer/g43t-am3/cmos.default | 2 +-
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src/mainboard/acer/g43t-am3/cmos.default | 2 +-
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@ -0,0 +1,115 @@
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From 96ab5f286ede629c1a67c97d7ef63a05d922d159 Mon Sep 17 00:00:00 2001
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From: Rodrigo <rm@firemail.cc>
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Date: Mon, 23 Aug 2021 02:20:32 -0300
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Subject: [PATCH 18/19] Revert "cpu/intel: Configure IA32_FEATURE_CONTROL for
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alternative SMRR"
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This rendered at least the x200 unable to reboot.
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This reverts commit df7aecd92643d207feaf7fd840f8835097346644.
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---
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src/cpu/intel/model_1067x/model_1067x_init.c | 3 +++
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src/cpu/intel/model_1067x/mp_init.c | 26 --------------------
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src/cpu/intel/model_106cx/model_106cx_init.c | 3 +++
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src/cpu/intel/model_6ex/model_6ex_init.c | 3 +++
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src/cpu/intel/model_6fx/model_6fx_init.c | 3 +++
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5 files changed, 12 insertions(+), 26 deletions(-)
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diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
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index 3e4de1fa31..ca3ce274fc 100644
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--- a/src/cpu/intel/model_1067x/model_1067x_init.c
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|
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
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|
@@ -274,6 +274,9 @@ static void model_1067x_init(struct device *cpu)
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|
/* Initialize the APIC timer */
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|
init_timer();
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+ /* Set virtualization based on Kconfig option */
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|
+ set_vmx_and_lock();
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|
+
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|
/* Configure C States */
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|
configure_c_states(quad);
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|
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diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c
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index fd6a82ac17..e2fa7c8f20 100644
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--- a/src/cpu/intel/model_1067x/mp_init.c
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|
+++ b/src/cpu/intel/model_1067x/mp_init.c
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|
@@ -42,34 +42,8 @@ static void pre_mp_smm_init(void)
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|
smm_initialize();
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|
}
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|
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|
-#define SMRR_SUPPORTED (1 << 11)
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|
-
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|
static void per_cpu_smm_trigger(void)
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|
{
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|
- msr_t mtrr_cap = rdmsr(MTRR_CAP_MSR);
|
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|
- if (cpu_has_alternative_smrr() && mtrr_cap.lo & SMRR_SUPPORTED) {
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|
- set_feature_ctrl_vmx();
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|
- msr_t ia32_ft_ctrl = rdmsr(IA32_FEATURE_CONTROL);
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|
- /* We don't care if the lock is already setting
|
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|
- as our smm relocation handler is able to handle
|
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|
- setups where SMRR is not enabled here. */
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- if (ia32_ft_ctrl.lo & (1 << 0)) {
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|
- /* IA32_FEATURE_CONTROL locked. If we set it again we
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|
- get an illegal instruction. */
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- printk(BIOS_DEBUG, "IA32_FEATURE_CONTROL already locked\n");
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|
- printk(BIOS_DEBUG, "SMRR status: %senabled\n",
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|
- ia32_ft_ctrl.lo & (1 << 3) ? "" : "not ");
|
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|
- } else {
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|
- if (!CONFIG(SET_IA32_FC_LOCK_BIT))
|
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|
- printk(BIOS_INFO,
|
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|
- "Overriding CONFIG(SET_IA32_FC_LOCK_BIT) to enable SMRR\n");
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|
- ia32_ft_ctrl.lo |= (1 << 3) | (1 << 0);
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|
- wrmsr(IA32_FEATURE_CONTROL, ia32_ft_ctrl);
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|
- }
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|
- } else {
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- set_vmx_and_lock();
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|
- }
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-
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/* Relocate the SMM handler. */
|
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|
smm_relocate();
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}
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diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
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index 278d8dea81..a0917045dd 100644
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--- a/src/cpu/intel/model_106cx/model_106cx_init.c
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||||||
|
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
|
||||||
|
@@ -70,6 +70,9 @@ static void model_106cx_init(struct device *cpu)
|
||||||
|
/* Enable the local CPU APICs */
|
||||||
|
setup_lapic();
|
||||||
|
|
||||||
|
+ /* Set virtualization based on Kconfig option */
|
||||||
|
+ set_vmx_and_lock();
|
||||||
|
+
|
||||||
|
/* Configure C States */
|
||||||
|
configure_c_states();
|
||||||
|
|
||||||
|
diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
|
||||||
|
index 16c6866f45..31399bdbd7 100644
|
||||||
|
--- a/src/cpu/intel/model_6ex/model_6ex_init.c
|
||||||
|
+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
|
||||||
|
@@ -109,6 +109,9 @@ static void model_6ex_init(struct device *cpu)
|
||||||
|
/* Enable the local CPU APICs */
|
||||||
|
setup_lapic();
|
||||||
|
|
||||||
|
+ /* Set virtualization based on Kconfig option */
|
||||||
|
+ set_vmx_and_lock();
|
||||||
|
+
|
||||||
|
/* Configure C States */
|
||||||
|
configure_c_states();
|
||||||
|
|
||||||
|
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
|
||||||
|
index d0987b4a63..17a865c9f3 100644
|
||||||
|
--- a/src/cpu/intel/model_6fx/model_6fx_init.c
|
||||||
|
+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
|
||||||
|
@@ -123,6 +123,9 @@ static void model_6fx_init(struct device *cpu)
|
||||||
|
/* Enable the local CPU APICs */
|
||||||
|
setup_lapic();
|
||||||
|
|
||||||
|
+ /* Set virtualization based on Kconfig option */
|
||||||
|
+ set_vmx_and_lock();
|
||||||
|
+
|
||||||
|
/* Configure C States */
|
||||||
|
configure_c_states();
|
||||||
|
|
||||||
|
--
|
||||||
|
2.25.1
|
||||||
|
|
|
@ -0,0 +1,24 @@
|
||||||
|
From e91840f8c19fde6706937a1e9285ac83fceec59a Mon Sep 17 00:00:00 2001
|
||||||
|
From: Rodrigo <rm@firemail.cc>
|
||||||
|
Date: Mon, 23 Aug 2021 03:51:21 -0300
|
||||||
|
Subject: [PATCH 19/19] Fix missing include
|
||||||
|
|
||||||
|
---
|
||||||
|
src/cpu/intel/model_1067x/model_1067x_init.c | 1 +
|
||||||
|
1 file changed, 1 insertion(+)
|
||||||
|
|
||||||
|
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
|
||||||
|
index ca3ce274fc..cc7a5edca9 100644
|
||||||
|
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
|
||||||
|
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
|
||||||
|
@@ -9,6 +9,7 @@
|
||||||
|
#include <cpu/x86/cache.h>
|
||||||
|
#include <cpu/x86/name.h>
|
||||||
|
#include <cpu/intel/smm_reloc.h>
|
||||||
|
+#include <cpu/intel/common/common.h>
|
||||||
|
|
||||||
|
#include "chip.h"
|
||||||
|
|
||||||
|
--
|
||||||
|
2.25.1
|
||||||
|
|
Loading…
Reference in New Issue