revert coreboot heap size patch
the patch: https://review.coreboot.org/c/coreboot/+/78270 this has been reverted, because it caused s3 resume issues on most intel laptops in libreboot. i was going to merge this instead: https://review.coreboot.org/c/coreboot/+/78623 however, it's under review, and this doesn't change to the old behaviour; it keeps the new universal config, but changes the default we know the old logic works, so keep that for now. in fact, the offending patch was only merged to main in coreboot, one day before i recently updated coreboot revs in coreboot/default - i used a 12 october revision, the patch above is 11 october i then ran "./update trees -u coreboot" which updated the heap sizes back to the old defaults. this should fix s3 suspend/resume where it was broken, in the libreboot 20231021 release - a point release with this and a few other fixes is planned soon. Signed-off-by: Leah Rowe <leah@libreboot.org>btrfsvols
parent
83bf237660
commit
93458de74a
|
@ -209,6 +209,7 @@ CONFIG_D3COLD_SUPPORT=y
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# CONFIG_PCIEXP_CLK_PM is not set
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# CONFIG_DRIVERS_UART_8250IO is not set
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CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
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CONFIG_HEAP_SIZE=0x4000
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CONFIG_EC_GPE_SCI=0x50
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CONFIG_BOARD_ROMSIZE_KB_1024=y
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# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
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@ -499,7 +500,6 @@ CONFIG_HAVE_ACPI_TABLES=y
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CONFIG_BOOT_DEVICE_SPI_FLASH=y
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CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
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CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
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CONFIG_HEAP_SIZE=0x100000
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#
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# Console
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@ -209,6 +209,7 @@ CONFIG_D3COLD_SUPPORT=y
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# CONFIG_PCIEXP_CLK_PM is not set
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# CONFIG_DRIVERS_UART_8250IO is not set
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CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
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CONFIG_HEAP_SIZE=0x4000
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CONFIG_EC_GPE_SCI=0x50
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CONFIG_BOARD_ROMSIZE_KB_1024=y
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# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
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@ -499,7 +500,6 @@ CONFIG_HAVE_ACPI_TABLES=y
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CONFIG_BOOT_DEVICE_SPI_FLASH=y
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CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
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CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
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CONFIG_HEAP_SIZE=0x100000
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#
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# Console
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@ -0,0 +1,341 @@
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From f1b5b0051718139cf59ad047d42d1360b8452ec5 Mon Sep 17 00:00:00 2001
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From: Leah Rowe <leah@libreboot.org>
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Date: Sun, 29 Oct 2023 01:18:50 +0000
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Subject: [PATCH 1/1] Revert "Kconfig: Bring HEAP_SIZE to a common, large
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value"
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This reverts commit 44a48ce7a46c36df69f7b2cf3552bf10fa5f61b6.
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NOTE:
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this is done instead of merging:
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https://review.coreboot.org/c/coreboot/+/78623
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which is still under review for now
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the patch i'm reverting is this one:
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https://review.coreboot.org/c/coreboot/+/78270
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this was actually only merged the day before i
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updated coreboot revs in lbmk to the 12 october rev,
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so there's no harm in quickly reverting this for now
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however, later on, we will rely on the other patch
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---
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src/Kconfig | 3 ++-
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src/cpu/qemu-x86/Kconfig | 3 +++
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src/mainboard/sifive/hifive-unleashed/Kconfig | 3 +++
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src/northbridge/amd/pi/Kconfig | 4 ++++
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src/soc/amd/picasso/Kconfig | 4 ++++
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src/soc/amd/stoneyridge/Kconfig | 4 ++++
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src/soc/cavium/cn81xx/Kconfig | 3 +++
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src/soc/intel/alderlake/Kconfig | 5 +++++
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src/soc/intel/apollolake/Kconfig | 4 ++++
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src/soc/intel/cannonlake/Kconfig | 4 ++++
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src/soc/intel/elkhartlake/Kconfig | 4 ++++
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src/soc/intel/jasperlake/Kconfig | 4 ++++
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src/soc/intel/meteorlake/Kconfig | 5 +++++
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src/soc/intel/skylake/Kconfig | 4 ++++
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src/soc/intel/tigerlake/Kconfig | 4 ++++
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src/soc/intel/xeon_sp/Kconfig | 4 ++++
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src/soc/intel/xeon_sp/cpx/Kconfig | 4 ++++
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src/soc/intel/xeon_sp/skx/Kconfig | 4 ++++
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src/soc/intel/xeon_sp/spr/Kconfig | 4 ++++
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src/soc/qualcomm/ipq40xx/Kconfig | 4 ++++
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20 files changed, 77 insertions(+), 1 deletion(-)
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diff --git a/src/Kconfig b/src/Kconfig
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index ae8024089e..1549719dd0 100644
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--- a/src/Kconfig
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+++ b/src/Kconfig
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@@ -751,7 +751,8 @@ config RTC
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config HEAP_SIZE
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hex
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- default 0x100000
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+ default 0x100000 if FLATTENED_DEVICE_TREE
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+ default 0x4000
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config STACK_SIZE
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hex
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diff --git a/src/cpu/qemu-x86/Kconfig b/src/cpu/qemu-x86/Kconfig
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index 0fa999e1ac..f3e2c4cea9 100644
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--- a/src/cpu/qemu-x86/Kconfig
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+++ b/src/cpu/qemu-x86/Kconfig
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@@ -35,4 +35,7 @@ config MAX_CPUS
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default 32 if SMM_TSEG
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default 4
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+config HEAP_SIZE
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+ default 0x8000
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+
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endif
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diff --git a/src/mainboard/sifive/hifive-unleashed/Kconfig b/src/mainboard/sifive/hifive-unleashed/Kconfig
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index 7bc3b0bcbb..7f9300f2a7 100644
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--- a/src/mainboard/sifive/hifive-unleashed/Kconfig
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+++ b/src/mainboard/sifive/hifive-unleashed/Kconfig
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@@ -10,6 +10,9 @@ config BOARD_SPECIFIC_OPTIONS
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select FLATTENED_DEVICE_TREE
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select SPI_SDCARD
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+config HEAP_SIZE
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+ default 0x10000
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+
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config MAINBOARD_DIR
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default "sifive/hifive-unleashed"
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diff --git a/src/northbridge/amd/pi/Kconfig b/src/northbridge/amd/pi/Kconfig
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index 4ffe82a15f..4518db149b 100644
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--- a/src/northbridge/amd/pi/Kconfig
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+++ b/src/northbridge/amd/pi/Kconfig
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@@ -29,4 +29,8 @@ config HW_MEM_HOLE_SIZEK
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hex
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default 0x200000
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+config HEAP_SIZE
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+ hex
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+ default 0xc0000
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+
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endif # NORTHBRIDGE_AMD_PI
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diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
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index c33f287067..796fe4eb13 100644
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--- a/src/soc/amd/picasso/Kconfig
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+++ b/src/soc/amd/picasso/Kconfig
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@@ -264,6 +264,10 @@ config S3_VGA_ROM_RUN
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bool
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default n
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+config HEAP_SIZE
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+ hex
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+ default 0xc0000
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+
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config SERIRQ_CONTINUOUS_MODE
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bool
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default n
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diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig
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index 6ff135e6a8..9af7455bae 100644
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--- a/src/soc/amd/stoneyridge/Kconfig
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+++ b/src/soc/amd/stoneyridge/Kconfig
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@@ -152,6 +152,10 @@ config S3_VGA_ROM_RUN
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bool
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default n
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+config HEAP_SIZE
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+ hex
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+ default 0xc0000
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+
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config EHCI_BAR
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hex
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default 0xfef00000
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diff --git a/src/soc/cavium/cn81xx/Kconfig b/src/soc/cavium/cn81xx/Kconfig
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index 77ca97202b..368581f8f1 100644
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--- a/src/soc/cavium/cn81xx/Kconfig
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+++ b/src/soc/cavium/cn81xx/Kconfig
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@@ -30,6 +30,9 @@ config ARCH_ARMV8_EXTENSION
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int
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default 1
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+config HEAP_SIZE
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+ default 0x10000
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+
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config STACK_SIZE
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default 0x2000
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diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
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index 4b960c1d22..82ec8f263e 100644
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--- a/src/soc/intel/alderlake/Kconfig
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+++ b/src/soc/intel/alderlake/Kconfig
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@@ -215,6 +215,11 @@ config IED_REGION_SIZE
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hex
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default 0x400000
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+config HEAP_SIZE
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+ hex
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+ default 0x80000 if BMP_LOGO
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+ default 0x10000
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+
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config GFX_GMA_DEFAULT_MMIO
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default 0xaf000000 if MAINBOARD_HAS_EARLY_LIBGFXINIT
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diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig
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index 78ec2987ce..bce935d800 100644
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--- a/src/soc/intel/apollolake/Kconfig
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+++ b/src/soc/intel/apollolake/Kconfig
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@@ -252,6 +252,10 @@ config IFWI_FILE_NAME
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help
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Name of file to store in the IFWI region.
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+config HEAP_SIZE
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+ hex
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+ default 0x8000
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+
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config MAX_ROOT_PORTS
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int
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default 6
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diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
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index a42a3c365b..80237f9810 100644
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--- a/src/soc/intel/cannonlake/Kconfig
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+++ b/src/soc/intel/cannonlake/Kconfig
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@@ -160,6 +160,10 @@ config IED_REGION_SIZE
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hex
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default 0x400000
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+config HEAP_SIZE
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+ hex
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+ default 0x8000
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+
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config NHLT_DMIC_1CH_16B
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bool
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depends on ACPI_NHLT
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diff --git a/src/soc/intel/elkhartlake/Kconfig b/src/soc/intel/elkhartlake/Kconfig
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index 3361c0ddb9..7f1c767379 100644
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--- a/src/soc/intel/elkhartlake/Kconfig
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+++ b/src/soc/intel/elkhartlake/Kconfig
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@@ -104,6 +104,10 @@ config IED_REGION_SIZE
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hex
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default 0x0
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+config HEAP_SIZE
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+ hex
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+ default 0x8000
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+
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config MAX_ROOT_PORTS
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int
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default 7
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diff --git a/src/soc/intel/jasperlake/Kconfig b/src/soc/intel/jasperlake/Kconfig
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index 3d84991e09..ff5def3263 100644
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--- a/src/soc/intel/jasperlake/Kconfig
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+++ b/src/soc/intel/jasperlake/Kconfig
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@@ -106,6 +106,10 @@ config IED_REGION_SIZE
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hex
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default 0x400000
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+config HEAP_SIZE
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+ hex
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+ default 0x8000
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+
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config MAX_ROOT_PORTS
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int
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default 8
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diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
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index 590e8b80e1..48030a1911 100644
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--- a/src/soc/intel/meteorlake/Kconfig
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+++ b/src/soc/intel/meteorlake/Kconfig
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@@ -197,6 +197,11 @@ config IED_REGION_SIZE
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hex
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default 0x400000
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+config HEAP_SIZE
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+ hex
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+ default 0x80000 if BMP_LOGO
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+ default 0x10000
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+
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# Intel recommends reserving the PCIe TBT root port resources as below:
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# - 42 buses
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# - 194 MiB Non-prefetchable memory
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diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
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index e0df501460..d6a11363ee 100644
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--- a/src/soc/intel/skylake/Kconfig
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+++ b/src/soc/intel/skylake/Kconfig
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@@ -151,6 +151,10 @@ config EXCLUDE_NATIVE_SD_INTERFACE
|
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help
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If you set this option to n, will not use native SD controller.
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+config HEAP_SIZE
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+ hex
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+ default 0x80000
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+
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config IED_REGION_SIZE
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hex
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default 0x400000
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diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
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index c07a0d8365..0a4b7bfdb8 100644
|
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--- a/src/soc/intel/tigerlake/Kconfig
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+++ b/src/soc/intel/tigerlake/Kconfig
|
||||
@@ -152,6 +152,10 @@ config IED_REGION_SIZE
|
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config INTEL_TME
|
||||
default n
|
||||
|
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+config HEAP_SIZE
|
||||
+ hex
|
||||
+ default 0x10000
|
||||
+
|
||||
config MAX_ROOT_PORTS
|
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int
|
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default 24 if SOC_INTEL_TIGERLAKE_PCH_H
|
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diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig
|
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index e63bee5451..63ced01067 100644
|
||||
--- a/src/soc/intel/xeon_sp/Kconfig
|
||||
+++ b/src/soc/intel/xeon_sp/Kconfig
|
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@@ -91,6 +91,10 @@ config ECAM_MMCONF_BASE_ADDRESS
|
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config ECAM_MMCONF_BUS_NUMBER
|
||||
default 256
|
||||
|
||||
+config HEAP_SIZE
|
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+ hex
|
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+ default 0x80000
|
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+
|
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config HPET_MIN_TICKS
|
||||
hex
|
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default 0x80
|
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diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig
|
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index ac166c3038..f54f7716b6 100644
|
||||
--- a/src/soc/intel/xeon_sp/cpx/Kconfig
|
||||
+++ b/src/soc/intel/xeon_sp/cpx/Kconfig
|
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@@ -71,6 +71,10 @@ config CPU_MICROCODE_CBFS_LEN
|
||||
hex
|
||||
default 0x7C00
|
||||
|
||||
+config HEAP_SIZE
|
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+ hex
|
||||
+ default 0x80000
|
||||
+
|
||||
config STACK_SIZE
|
||||
hex
|
||||
default 0x4000
|
||||
diff --git a/src/soc/intel/xeon_sp/skx/Kconfig b/src/soc/intel/xeon_sp/skx/Kconfig
|
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index 5d843878e1..c2c3d4e2e8 100644
|
||||
--- a/src/soc/intel/xeon_sp/skx/Kconfig
|
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+++ b/src/soc/intel/xeon_sp/skx/Kconfig
|
||||
@@ -55,6 +55,10 @@ config CPU_MICROCODE_CBFS_LEN
|
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hex
|
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default 0x7C00
|
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|
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+config HEAP_SIZE
|
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+ hex
|
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+ default 0x80000
|
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+
|
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config IED_REGION_SIZE
|
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hex
|
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default 0x400000
|
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diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
|
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index 43b87ade14..b1c4c783b7 100644
|
||||
--- a/src/soc/intel/xeon_sp/spr/Kconfig
|
||||
+++ b/src/soc/intel/xeon_sp/spr/Kconfig
|
||||
@@ -79,6 +79,10 @@ config CPU_MICROCODE_CBFS_LEN
|
||||
hex
|
||||
default 0x8c00
|
||||
|
||||
+config HEAP_SIZE
|
||||
+ hex
|
||||
+ default 0x80000
|
||||
+
|
||||
config STACK_SIZE
|
||||
hex
|
||||
default 0x4000
|
||||
diff --git a/src/soc/qualcomm/ipq40xx/Kconfig b/src/soc/qualcomm/ipq40xx/Kconfig
|
||||
index 0ce92731c0..0eabb00752 100644
|
||||
--- a/src/soc/qualcomm/ipq40xx/Kconfig
|
||||
+++ b/src/soc/qualcomm/ipq40xx/Kconfig
|
||||
@@ -57,4 +57,8 @@ config SBL_UTIL_PATH
|
||||
help
|
||||
Path for utils to combine SBL_ELF and bootblock
|
||||
|
||||
+config HEAP_SIZE
|
||||
+ hex
|
||||
+ default 0x8000
|
||||
+
|
||||
endif
|
||||
--
|
||||
2.39.2
|
||||
|
|
@ -171,6 +171,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_4096=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -486,7 +487,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -169,6 +169,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
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CONFIG_BOARD_ROMSIZE_KB_4096=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -482,7 +483,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -171,6 +171,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -498,7 +499,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -169,6 +169,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -495,7 +496,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -165,6 +165,7 @@ CONFIG_PCIEXP_CLK_PM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -473,7 +474,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -165,6 +165,7 @@ CONFIG_PCIEXP_CLK_PM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -473,7 +474,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -172,6 +172,7 @@ CONFIG_PCIEXP_CLK_PM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_1024=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -480,7 +481,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -675,6 +675,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
|
|||
CONFIG_TTYS0_BAUD=115200
|
||||
CONFIG_D3COLD_SUPPORT=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_DRIVER_TPM_SPI_CHIP=0
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
|
@ -864,7 +865,6 @@ CONFIG_ACPI_CUSTOM_MADT=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -675,6 +675,7 @@ CONFIG_PS2M_EISAID="PNP0F13"
|
|||
CONFIG_TTYS0_BAUD=115200
|
||||
CONFIG_D3COLD_SUPPORT=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -861,7 +862,6 @@ CONFIG_ACPI_CUSTOM_MADT=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -193,6 +193,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -545,7 +546,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -191,6 +191,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -542,7 +543,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -539,7 +540,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -536,7 +537,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -189,6 +189,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -537,7 +538,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -187,6 +187,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -534,7 +535,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -524,7 +525,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -186,6 +186,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -521,7 +522,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -524,7 +525,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -186,6 +186,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -521,7 +522,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -189,6 +189,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -526,7 +527,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -187,6 +187,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -523,7 +524,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -192,6 +192,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -543,7 +544,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -540,7 +541,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -190,6 +190,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -539,7 +540,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -188,6 +188,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
|
@ -536,7 +537,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -458,7 +459,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -456,7 +457,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -457,7 +458,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -455,7 +456,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -458,7 +459,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -162,6 +162,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -456,7 +457,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -457,7 +458,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -161,6 +161,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -455,7 +456,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -143,6 +143,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -312,7 +313,6 @@ CONFIG_BOOTMEDIA_LOCK_NONE=y
|
|||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
CONFIG_ACPI_CUSTOM_MADT=y
|
||||
CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -162,6 +162,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x8000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_4096=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -375,7 +376,6 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
|
|||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -162,6 +162,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x8000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_4096=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -371,7 +372,6 @@ CONFIG_ACPI_COMMON_MADT_IOAPIC=y
|
|||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_BOOT_DEVICE_NOT_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -206,6 +206,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_4096=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -204,6 +204,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_4096=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -522,7 +523,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -179,6 +179,7 @@ CONFIG_PCIEXP_L1_SUB_STATE=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -515,7 +516,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -557,7 +558,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -208,6 +208,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -554,7 +555,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -208,6 +208,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_PCIEXP_CLK_PM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -551,7 +552,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_PCIEXP_CLK_PM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -548,7 +549,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -559,7 +560,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -556,7 +557,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -505,7 +506,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -503,7 +504,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -505,7 +506,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -199,6 +199,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_MAXIMUM_SUPPORTED_FREQUENCY=0
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -503,7 +504,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -529,7 +530,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -525,7 +526,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -560,7 +561,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -557,7 +558,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_PCIEXP_CLK_PM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -550,7 +551,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_PCIEXP_CLK_PM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -547,7 +548,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -207,6 +207,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -530,7 +531,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -205,6 +205,7 @@ CONFIG_D3COLD_SUPPORT=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
|
@ -526,7 +527,6 @@ CONFIG_HAVE_ACPI_TABLES=y
|
|||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
|
@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -209,6 +209,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -212,6 +212,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -210,6 +210,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -555,7 +556,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
|
@ -211,6 +211,7 @@ CONFIG_PCIEXP_ASPM=y
|
|||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
# CONFIG_TPM_MEASURED_BOOT is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
|
@ -558,7 +559,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
|
|
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Reference in New Issue