Bump coreboot/next and merge coreboot/dell7

coreboot/dell7 is now part of coreboot/next, which in turn
has been updated, to accomodate 3050 micro patchset 18:

https://review.coreboot.org/c/coreboot/+/82053/18

It incorporates my Verb/VBT patches, which are therefore
no longer included separately.

Mate has fixed the USB config; see diff for details.
The configuration of USB ports was wrong, before.

Signed-off-by: Leah Rowe <leah@libreboot.org>
master
Leah Rowe 2024-11-06 22:28:45 +00:00
parent 8c4cacba27
commit 9abddb82b9
22 changed files with 207 additions and 535 deletions

View File

@ -151,6 +151,8 @@ CONFIG_USE_PM_ACPI_TIMER=y
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOARD_DELL_OPTIPLEX_3050=y CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set

View File

@ -149,6 +149,8 @@ CONFIG_USE_PM_ACPI_TIMER=y
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
CONFIG_BOARD_DELL_OPTIPLEX_3050=y CONFIG_BOARD_DELL_OPTIPLEX_3050=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_MT is not set
# CONFIG_BOARD_DELL_LATITUDE_E5420 is not set # CONFIG_BOARD_DELL_LATITUDE_E5420 is not set

View File

@ -1,4 +1,4 @@
tree="dell7" tree="next"
xarch="i386-elf" xarch="i386-elf"
payload_seabios="y" payload_seabios="y"
payload_grub="y" payload_grub="y"

View File

@ -1,140 +0,0 @@
From 6140f780837726a24d6c473ac50a62fdd5ee8f2d Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 6 Oct 2024 17:25:27 +0100
Subject: [PATCH 2/4] dell/optiplex_3050: add hda_verb.c
Configured for the line jack at the front of the machine.
Based on dumps from the vendor BIOS.
Signed-off-by: Leah Rowe <info@minifree.org>
---
src/mainboard/dell/optiplex_3050/Kconfig | 1 +
src/mainboard/dell/optiplex_3050/Makefile.mk | 3 +-
src/mainboard/dell/optiplex_3050/hda_verb.c | 90 ++++++++++++++++++++
3 files changed, 93 insertions(+), 1 deletion(-)
create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c
diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
index 2f0dccb98d..eab6034158 100644
--- a/src/mainboard/dell/optiplex_3050/Kconfig
+++ b/src/mainboard/dell/optiplex_3050/Kconfig
@@ -16,6 +16,7 @@ config BOARD_SPECIFIC_OPTIONS
select SKYLAKE_SOC_PCH_H
select SOC_INTEL_KABYLAKE
select SUPERIO_SMSC_SCH555x
+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB
config CBFS_SIZE
default 0x900000
diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
index d50ea40879..90b3cc4c48 100644
--- a/src/mainboard/dell/optiplex_3050/Makefile.mk
+++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
@@ -5,5 +5,6 @@ bootblock-y += sch5555_ec.c
romstage-y += romstage.c
-ramstage-y += ramstage.c sch5555_ec.c
+ramstage-y += ramstage.c sch5555_ec.c hda_verb.c
+
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c
new file mode 100644
index 0000000000..621e4f7a52
--- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/hda_verb.c
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ /* coreboot specific header, codec 0 */
+ 0x10ec0255, /* Realtek ALC3234 */
+ 0x102807a3, /* Subsystem ID */
+ 11, /* Number of entries */
+
+ /* Pin Widget Verb Table */
+
+ AZALIA_SUBVENDOR(0, 0x102807a3),
+
+ AZALIA_PIN_CFG(0, 0x12, 0x40000000), // does not describe a jack or internal device
+ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
+ AZALIA_INTEGRATED,
+ AZALIA_INTERNAL,
+ AZALIA_SPEAKER,
+ AZALIA_OTHER_ANALOG,
+ AZALIA_COLOR_UNKNOWN,
+ AZALIA_NO_JACK_PRESENCE_DETECT,
+ 5, 0
+ )),
+ AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
+ AZALIA_LINE_OUT,
+ AZALIA_STEREO_MONO_1_8,
+ AZALIA_BLACK,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 2, 0
+ )),
+ AZALIA_PIN_CFG(0, 0x1d, 0x4054c029), // does not describe a jack or internal device
+ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
+ AZALIA_HP_OUT,
+ AZALIA_STEREO_MONO_1_8,
+ AZALIA_BLACK,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 5, 15
+ )),
+
+ /* coreboot specific header, codec 2 */
+ 0x80862809, /* Intel Skylake HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of entries */
+
+ /* Pin Widget Verb Table */
+
+ AZALIA_SUBVENDOR(2, 0x80860101),
+
+ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_DIGITAL_DISPLAY,
+ AZALIA_DIGITAL_OTHER_OUT,
+ AZALIA_OTHER_DIGITAL,
+ AZALIA_COLOR_UNKNOWN,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 1, 0
+ )),
+ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_DIGITAL_DISPLAY,
+ AZALIA_DIGITAL_OTHER_OUT,
+ AZALIA_OTHER_DIGITAL,
+ AZALIA_COLOR_UNKNOWN,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 1, 0
+ )),
+ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_DIGITAL_DISPLAY,
+ AZALIA_DIGITAL_OTHER_OUT,
+ AZALIA_OTHER_DIGITAL,
+ AZALIA_COLOR_UNKNOWN,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 1, 0
+ )),
+};
+
+const u32 pc_beep_verbs[] = {};
+
+AZALIA_ARRAY_SIZES;
--
2.39.5

View File

@ -1,74 +0,0 @@
From e8c7028be21084ef2f89140cccb393ca7a0ff327 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 6 Oct 2024 23:48:05 +0100
Subject: [PATCH 3/4] dell/optiplex_3050: Add data.vbt
Signed-off-by: Leah Rowe <info@minifree.org>
---
src/mainboard/dell/optiplex_3050/Kconfig | 5 +++++
src/mainboard/dell/optiplex_3050/data.vbt | Bin 0 -> 4300 bytes
2 files changed, 5 insertions(+)
create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt
diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
index eab6034158..523a160ae3 100644
--- a/src/mainboard/dell/optiplex_3050/Kconfig
+++ b/src/mainboard/dell/optiplex_3050/Kconfig
@@ -17,6 +17,8 @@ config BOARD_SPECIFIC_OPTIONS
select SOC_INTEL_KABYLAKE
select SUPERIO_SMSC_SCH555x
select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+ select INTEL_GMA_HAVE_VBT
+ select INTEL_GMA_ADD_VBT
config CBFS_SIZE
default 0x900000
@@ -27,6 +29,9 @@ config MAINBOARD_DIR
config MAINBOARD_PART_NUMBER
default "OptiPlex 3050 Micro"
+config INTEL_GMA_VBT_FILE
+ default "src/mainboard/\$(MAINBOARDDIR)/data.vbt"
+
config DIMM_SPD_SIZE
default 512 # DDR4
diff --git a/src/mainboard/dell/optiplex_3050/data.vbt b/src/mainboard/dell/optiplex_3050/data.vbt
new file mode 100644
index 0000000000000000000000000000000000000000..6dc40cd99563bcd957ec2a9c4567e3b21e5d1d1f
GIT binary patch
literal 4300
zcmeHJZ)_A*5TD(>zi)T1ds~!pU>y<RuF$e~N-bJsuXmJ|7P*63&uGGx+#w{DmbQ?B
ze^_HpNECA))Sw}xiC;|p(!}^ljU+}T!9QpeKH4uPN;EMM;}_tZeY@?IBiNH@l!V#L
zn>X`jfBW9Nd2eS$e@7qg=y|L+*|P~<Du4l>Ybk24rH<}xJ9eg%eaW32z1vbf_%+-P
zC$uXU01ASzM2Q>g;@$hkii6SZG3@E+#eVw*w9N;N1g6_?YiB3s;_)?@>DbVf-r9}P
zO`Vx|jP%robSBQ#gsrAYO>p&IQpqWSxVK|yXmkvV`v!Im77N$TZXru*X!y{`-Y55r
zVKf!Pgkc!X2_qgyK4nY|jSRP7a&Qp0+diYXy*OGNIan;Ts7z%5ry$@FKoGo8XMq5h
z6OcC{V?x>l17U>+7I|RUgn|iuCftWGW>(Kf196=odH`0=A3;(GULp|y6Ks_T0R#_x
zlLt);9A0GWnQsLE?*|8{0RgE`gv2JC<6bXwubJ}!0Qv+3{3xJE9q#3H2<s&G0tf>5
z>@mL~p#5nF3*pl}^hKC<v1C31Ae!^M&^2;#l`=O_ZLQWF$7*Y}Uh$G>xt9(*`c-X6
zFkpAE5jIOv7?VVJPHKbYp3@KrBCHN-@DOp9_>7mqcf{Wl|3v&7@nvGak3pDtDe*nT
zYl+trr--)_KT146>^lIL%Ay5+{&h=mW!RCRdEk{8SSMWj3D+L{)!qr(URTPl<i;AB
za@p^PE9Ea6pj-}YuxDTr0>wf|yGUKG?B!CDGOpf7(oT__tC!2cJgEtK{*6}R$n1=r
z$PSguH+xU1hb?rHq(J+G2P}V^ryazPkEs%j0}In3b4gctpl8)ZC&3qS6o31yv0DC@
zBN6*5So*Vg*3aOq|DtfT{{PvtW2P<e%*HkB(yV?<-ipBd2rTP@b3v<wGk0i#{Bmcc
z@y0B7K0!Gt2Iyi?fd2i^HUB$v{Q!tv^fz~$94j}a>75FZ$;1Eo6%!)V*$4D5C>nt}
z7_D}&ricJyuY&X-!vUs`GWIOPx0wDOV;?d6f$4uRCdjx-*4N7{CF5RMe_CcQ%J`0~
ze<-uhWc)?e%Q6cpxK`1V3hPmDzoNgOuwx3otLUF7>?;L-S9HJ1!Ybac>fI{aq2eJ`
ze@SJpsrbICf1$GTDqdFgx)56u!i^z48)A=#)F$0)i8F!~4)H=KFrv`ilM@v#FA5q-
zZ`~^T%U!!Etw*TnvRA91loJ<5n5;vH=aymAq8i4g#?~Vu@R%z0b-pk{VF{Q?SZOpI
zZFLYDT8~J)KBGPNg2zT^r<&>dt1z12coq!P7_N5^Xb$wE-B-rFk(v<3F&oiLZ61P9
z^8O8kx7Uu(WFsrh-0{jBgc7g$6w^0d!yLLcn#Qi_glV3tAo!dLNa^?163N|n^-pD?
z(daC>dtpbi#Q&W%m0IHPOiO7pA89lVboYWH=_yh1N|ChuwX7oAZcPqP-%SWj_FFt3
zyd_?zD3jia8uH=I*yP#l#Bw9^#^N~y33zEtk*o#5XfjXdCkjSG)~N^WoRlb;h;B3|
zIfCjSc(I06T!_GA1{WKOk*chsMCXx5vW@41o#fZgYViT9VSih*nQN}>g+zCejX>9!
zZ{c$hGa+w5eO}YT_FH@}B)U(Dl-|zF&dk8R;^4yrPZe)YrI^k%j}0~VZ%*1PT98&h
z556thD#%T3IZc)NKi{(4RJn@8Dq3?JywFKA?WW585y(IR)(Ee|k5bDtz|lFnDY}0G
Ds8qe3
literal 0
HcmV?d00001
--
2.39.5

View File

@ -1,205 +0,0 @@
From ecedecb1224a04531ec544b76ef93efd33cd8f6d Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000
Subject: [PATCH 1/1] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
Example:
./ifdtool --nuke gbe coreboot.rom
./ifdtool --nuke bios coreboot.com
./ifdtool --nuke me coreboot.com
Rebased since the last revision update in lbmk.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
1 file changed, 83 insertions(+), 31 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
index 36477eef66..3ebef74042 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
@@ -2217,6 +2217,7 @@ static void print_usage(const char *name)
" tgl - Tiger Lake\n"
" wbg - Wellsburg\n"
" -S | --setpchstrap Write a PCH strap\n"
+ " -N | --nuke <region> Overwrite the specified region with 0xFF (all ones)\n"
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
" -v | --version: print the version\n"
" -h | --help: print this help\n\n"
@@ -2225,6 +2226,60 @@ static void print_usage(const char *name)
"\n");
}
+static int
+get_region_type_string(const char *region_type_string)
+{
+ if (!strcasecmp("Descriptor", region_type_string))
+ return 0;
+ else if (!strcasecmp("BIOS", region_type_string))
+ return 1;
+ else if (!strcasecmp("ME", region_type_string))
+ return 2;
+ else if (!strcasecmp("GbE", region_type_string))
+ return 3;
+ else if (!strcasecmp("Platform Data", region_type_string))
+ return 4;
+ else if (!strcasecmp("Device Exp1", region_type_string))
+ return 5;
+ else if (!strcasecmp("Secondary BIOS", region_type_string))
+ return 6;
+ else if (!strcasecmp("Reserved", region_type_string))
+ return 7;
+ else if (!strcasecmp("EC", region_type_string))
+ return 8;
+ else if (!strcasecmp("Device Exp2", region_type_string))
+ return 9;
+ else if (!strcasecmp("IE", region_type_string))
+ return 10;
+ else if (!strcasecmp("10GbE_0", region_type_string))
+ return 11;
+ else if (!strcasecmp("10GbE_1", region_type_string))
+ return 12;
+ else if (!strcasecmp("PTT", region_type_string))
+ return 15;
+ return -1;
+}
+
+static void
+nuke(const char *filename, char *image, int size, int region_type)
+{
+ int i;
+ struct region region;
+ const struct frba *frba = find_frba(image, size);
+ if (!frba)
+ exit(EXIT_FAILURE);
+
+ region = get_region(frba, region_type);
+ if (region.size > 0) {
+ for (i = region.base; i <= region.limit; i++) {
+ if ((i + 1) > (size))
+ break;
+ image[i] = 0xFF;
+ }
+ write_image(filename, image, size);
+ }
+}
+
int main(int argc, char *argv[])
{
int opt, option_index = 0;
@@ -2232,6 +2287,7 @@ int main(int argc, char *argv[])
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
+ int mode_nuke = 0;
int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
char *region_type_string = NULL, *region_fname = NULL;
const char *layout_fname = NULL;
@@ -2267,6 +2323,7 @@ int main(int argc, char *argv[])
{"validate", 0, NULL, 't'},
{"setpchstrap", 1, NULL, 'S'},
{"newvalue", 1, NULL, 'V'},
+ {"nuke", 1, NULL, 'N'},
{0, 0, 0, 0}
};
@@ -2316,35 +2373,8 @@ int main(int argc, char *argv[])
region_fname++;
// Descriptor, BIOS, ME, GbE, Platform
// valid type?
- if (!strcasecmp("Descriptor", region_type_string))
- region_type = 0;
- else if (!strcasecmp("BIOS", region_type_string))
- region_type = 1;
- else if (!strcasecmp("ME", region_type_string))
- region_type = 2;
- else if (!strcasecmp("GbE", region_type_string))
- region_type = 3;
- else if (!strcasecmp("Platform Data", region_type_string))
- region_type = 4;
- else if (!strcasecmp("Device Exp1", region_type_string))
- region_type = 5;
- else if (!strcasecmp("Secondary BIOS", region_type_string))
- region_type = 6;
- else if (!strcasecmp("Reserved", region_type_string))
- region_type = 7;
- else if (!strcasecmp("EC", region_type_string))
- region_type = 8;
- else if (!strcasecmp("Device Exp2", region_type_string))
- region_type = 9;
- else if (!strcasecmp("IE", region_type_string))
- region_type = 10;
- else if (!strcasecmp("10GbE_0", region_type_string))
- region_type = 11;
- else if (!strcasecmp("10GbE_1", region_type_string))
- region_type = 12;
- else if (!strcasecmp("PTT", region_type_string))
- region_type = 15;
- if (region_type == -1) {
+ if ((region_type =
+ get_region_type_string(region_type_string)) == -1) {
fprintf(stderr, "No such region type: '%s'\n\n",
region_type_string);
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
@@ -2521,6 +2551,22 @@ int main(int argc, char *argv[])
case 't':
mode_validate = 1;
break;
+ case 'N':
+ region_type_string = strdup(optarg);
+ if (!region_type_string) {
+ fprintf(stderr, "No region specified\n");
+ print_usage(argv[0]);
+ exit(EXIT_FAILURE);
+ }
+ if ((region_type =
+ get_region_type_string(region_type_string)) == -1) {
+ fprintf(stderr, "No such region type: '%s'\n\n",
+ region_type_string);
+ print_usage(argv[0]);
+ exit(EXIT_FAILURE);
+ }
+ mode_nuke = 1;
+ break;
case 'v':
print_version();
exit(EXIT_SUCCESS);
@@ -2540,7 +2586,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
+ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
+ mode_nuke) > 1) {
fprintf(stderr, "You may not specify more than one mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
@@ -2549,7 +2596,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
+ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
+ mode_nuke) == 0) {
fprintf(stderr, "You need to specify a mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
@@ -2662,6 +2710,10 @@ int main(int argc, char *argv[])
write_image(new_filename, image, size);
}
+ if (mode_nuke) {
+ nuke(new_filename, image, size, region_type);
+ }
+
if (mode_altmedisable) {
struct fpsba *fpsba = find_fpsba(image, size);
struct fmsba *fmsba = find_fmsba(image, size);
--
2.39.5

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@ -1,2 +0,0 @@
tree="dell7"
rev="e81fdd74a930b0bf8105816ea115ceaeb99bae1d"

View File

@ -149,6 +149,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set

View File

@ -147,6 +147,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set

View File

@ -149,6 +149,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set

View File

@ -147,6 +147,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y CONFIG_BOARD_DELL_OPTIPLEX_780_MT=y
# CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_USFF is not set
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set

View File

@ -149,6 +149,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set

View File

@ -147,6 +147,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set

View File

@ -149,6 +149,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set

View File

@ -147,6 +147,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
# CONFIG_CONSOLE_POST is not set # CONFIG_CONSOLE_POST is not set
# CONFIG_BOARD_DELL_E6400 is not set # CONFIG_BOARD_DELL_E6400 is not set
# CONFIG_BOARD_DELL_LATITUDE_E7240 is not set # CONFIG_BOARD_DELL_LATITUDE_E7240 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_3050 is not set
# CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set # CONFIG_BOARD_DELL_OPTIPLEX_780_MT is not set
CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y CONFIG_BOARD_DELL_OPTIPLEX_780_USFF=y
# CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set # CONFIG_BOARD_DELL_OPTIPLEX_9020_SFF is not set

View File

@ -1,9 +1,10 @@
From 2d266c50e2062dc202209494e9c1532ce8debd29 Mon Sep 17 00:00:00 2001 From 496cdb9ccfe8908ec0fe7f703ce6f25e5abf1c18 Mon Sep 17 00:00:00 2001
From: Mate Kukri <kukri.mate@gmail.com> From: Mate Kukri <kukri.mate@gmail.com>
Date: Thu, 24 Oct 2024 18:05:19 +0100 Date: Thu, 24 Oct 2024 18:05:19 +0100
Subject: [PATCH 1/4] [WIP] OptiPlex 3050 Micro port Subject: [PATCH 1/5] mb/dell: OptiPlex 3050 Micro port (Intel KabyLake)
- Boots Linux - Boots Linux 6.11 (Debian)
- GRUB and SeaBIOS payloads work
- SMSC SCH5553 SIO/EC - SMSC SCH5553 SIO/EC
+ Serial port works + Serial port works
+ PWM fan control works + PWM fan control works
@ -17,34 +18,36 @@ Subject: [PATCH 1/4] [WIP] OptiPlex 3050 Micro port
FIXME: add documentation about this FIXME: add documentation about this
- Needs 'deguard' to bypass BootGuard - Needs 'deguard' to bypass BootGuard
+ See https://review.coreboot.org/plugins/gitiles/deguard + See https://review.coreboot.org/plugins/gitiles/deguard
- TODO: HDA verbs - Audio works
- TODO: USB ports - All USB ports work
- TODO: Add VBT
- Currently limited to the Micro form factor, but others are very - Currently limited to the Micro form factor, but others are very
similar similar
- HDA verbs and VBT by Leah Rowe
Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2 Change-Id: I8d443e39ee684a4eaa19c835a945cfe569c051e2
Signed-off-by: Mate Kukri <kukri.mate@gmail.com> Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
--- ---
src/mainboard/dell/optiplex_3050/Kconfig | 32 ++ src/mainboard/dell/optiplex_3050/Kconfig | 37 ++
src/mainboard/dell/optiplex_3050/Kconfig.name | 4 + src/mainboard/dell/optiplex_3050/Kconfig.name | 4 +
src/mainboard/dell/optiplex_3050/Makefile.mk | 9 + src/mainboard/dell/optiplex_3050/Makefile.mk | 12 +
src/mainboard/dell/optiplex_3050/acpi/ec.asl | 3 + src/mainboard/dell/optiplex_3050/acpi/ec.asl | 3 +
.../dell/optiplex_3050/acpi/superio.asl | 3 + .../dell/optiplex_3050/acpi/superio.asl | 3 +
.../dell/optiplex_3050/board_info.txt | 7 + .../dell/optiplex_3050/board_info.txt | 7 +
src/mainboard/dell/optiplex_3050/bootblock.c | 107 ++++ src/mainboard/dell/optiplex_3050/bootblock.c | 107 ++++
src/mainboard/dell/optiplex_3050/cmos.default | 5 + src/mainboard/dell/optiplex_3050/cmos.default | 5 +
src/mainboard/dell/optiplex_3050/cmos.layout | 54 ++ src/mainboard/dell/optiplex_3050/cmos.layout | 54 ++
.../dell/optiplex_3050/devicetree.cb | 119 ++++ src/mainboard/dell/optiplex_3050/data.vbt | Bin 0 -> 4300 bytes
.../dell/optiplex_3050/devicetree.cb | 103 ++++
src/mainboard/dell/optiplex_3050/dsdt.asl | 27 + src/mainboard/dell/optiplex_3050/dsdt.asl | 27 +
.../dell/optiplex_3050/gma-mainboard.ads | 19 + .../dell/optiplex_3050/gma-mainboard.ads | 19 +
src/mainboard/dell/optiplex_3050/hda_verb.c | 90 +++
.../dell/optiplex_3050/include/early_gpio.h | 11 + .../dell/optiplex_3050/include/early_gpio.h | 11 +
.../dell/optiplex_3050/include/gpio.h | 241 ++++++++ .../dell/optiplex_3050/include/gpio.h | 241 +++++++++
src/mainboard/dell/optiplex_3050/ramstage.c | 513 ++++++++++++++++++ src/mainboard/dell/optiplex_3050/ramstage.c | 512 ++++++++++++++++++
src/mainboard/dell/optiplex_3050/romstage.c | 26 + src/mainboard/dell/optiplex_3050/romstage.c | 18 +
src/mainboard/dell/optiplex_3050/sch5555_ec.c | 54 ++ src/mainboard/dell/optiplex_3050/sch5555_ec.c | 54 ++
src/mainboard/dell/optiplex_3050/sch5555_ec.h | 10 + src/mainboard/dell/optiplex_3050/sch5555_ec.h | 10 +
18 files changed, 1244 insertions(+) 20 files changed, 1317 insertions(+)
create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig
create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name create mode 100644 src/mainboard/dell/optiplex_3050/Kconfig.name
create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk create mode 100644 src/mainboard/dell/optiplex_3050/Makefile.mk
@ -54,9 +57,11 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
create mode 100644 src/mainboard/dell/optiplex_3050/bootblock.c create mode 100644 src/mainboard/dell/optiplex_3050/bootblock.c
create mode 100644 src/mainboard/dell/optiplex_3050/cmos.default create mode 100644 src/mainboard/dell/optiplex_3050/cmos.default
create mode 100644 src/mainboard/dell/optiplex_3050/cmos.layout create mode 100644 src/mainboard/dell/optiplex_3050/cmos.layout
create mode 100644 src/mainboard/dell/optiplex_3050/data.vbt
create mode 100644 src/mainboard/dell/optiplex_3050/devicetree.cb create mode 100644 src/mainboard/dell/optiplex_3050/devicetree.cb
create mode 100644 src/mainboard/dell/optiplex_3050/dsdt.asl create mode 100644 src/mainboard/dell/optiplex_3050/dsdt.asl
create mode 100644 src/mainboard/dell/optiplex_3050/gma-mainboard.ads create mode 100644 src/mainboard/dell/optiplex_3050/gma-mainboard.ads
create mode 100644 src/mainboard/dell/optiplex_3050/hda_verb.c
create mode 100644 src/mainboard/dell/optiplex_3050/include/early_gpio.h create mode 100644 src/mainboard/dell/optiplex_3050/include/early_gpio.h
create mode 100644 src/mainboard/dell/optiplex_3050/include/gpio.h create mode 100644 src/mainboard/dell/optiplex_3050/include/gpio.h
create mode 100644 src/mainboard/dell/optiplex_3050/ramstage.c create mode 100644 src/mainboard/dell/optiplex_3050/ramstage.c
@ -66,10 +71,10 @@ Signed-off-by: Mate Kukri <kukri.mate@gmail.com>
diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig diff --git a/src/mainboard/dell/optiplex_3050/Kconfig b/src/mainboard/dell/optiplex_3050/Kconfig
new file mode 100644 new file mode 100644
index 0000000000..2f0dccb98d index 0000000000..6c8e72956e
--- /dev/null --- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/Kconfig +++ b/src/mainboard/dell/optiplex_3050/Kconfig
@@ -0,0 +1,32 @@ @@ -0,0 +1,37 @@
+## SPDX-License-Identifier: GPL-2.0-only +## SPDX-License-Identifier: GPL-2.0-only
+ +
+if BOARD_DELL_OPTIPLEX_3050 +if BOARD_DELL_OPTIPLEX_3050
@ -81,11 +86,13 @@ index 0000000000..2f0dccb98d
+ select HAVE_ACPI_TABLES + select HAVE_ACPI_TABLES
+ select HAVE_CMOS_DEFAULT + select HAVE_CMOS_DEFAULT
+ select HAVE_OPTION_TABLE + select HAVE_OPTION_TABLE
+ # select INTEL_GMA_HAVE_VBT + select INTEL_GMA_ADD_VBT
+ select INTEL_GMA_HAVE_VBT
+ select MAINBOARD_HAS_LIBGFXINIT + select MAINBOARD_HAS_LIBGFXINIT
+ select MAINBOARD_SUPPORTS_KABYLAKE_CPU + select MAINBOARD_SUPPORTS_KABYLAKE_CPU
+ select MAINBOARD_SUPPORTS_SKYLAKE_CPU + select MAINBOARD_SUPPORTS_SKYLAKE_CPU
+ select SKYLAKE_SOC_PCH_H + select SKYLAKE_SOC_PCH_H
+ select SOC_INTEL_COMMON_BLOCK_HDA_VERB
+ select SOC_INTEL_KABYLAKE + select SOC_INTEL_KABYLAKE
+ select SUPERIO_SMSC_SCH555x + select SUPERIO_SMSC_SCH555x
+ +
@ -98,6 +105,9 @@ index 0000000000..2f0dccb98d
+config MAINBOARD_PART_NUMBER +config MAINBOARD_PART_NUMBER
+ default "OptiPlex 3050 Micro" + default "OptiPlex 3050 Micro"
+ +
+config INTEL_GMA_VBT_FILE
+ default "src/mainboard/\$(MAINBOARDDIR)/data.vbt"
+
+config DIMM_SPD_SIZE +config DIMM_SPD_SIZE
+ default 512 # DDR4 + default 512 # DDR4
+ +
@ -114,10 +124,10 @@ index 0000000000..14eab7f52c
+ bool "OptiPlex 3050 Micro" + bool "OptiPlex 3050 Micro"
diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk diff --git a/src/mainboard/dell/optiplex_3050/Makefile.mk b/src/mainboard/dell/optiplex_3050/Makefile.mk
new file mode 100644 new file mode 100644
index 0000000000..d50ea40879 index 0000000000..0bd72fe691
--- /dev/null --- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/Makefile.mk +++ b/src/mainboard/dell/optiplex_3050/Makefile.mk
@@ -0,0 +1,9 @@ @@ -0,0 +1,12 @@
+## SPDX-License-Identifier: GPL-2.0-only +## SPDX-License-Identifier: GPL-2.0-only
+ +
+bootblock-y += bootblock.c +bootblock-y += bootblock.c
@ -125,7 +135,10 @@ index 0000000000..d50ea40879
+ +
+romstage-y += romstage.c +romstage-y += romstage.c
+ +
+ramstage-y += ramstage.c sch5555_ec.c +ramstage-y += ramstage.c
+ramstage-y += sch5555_ec.c
+ramstage-y += hda_verb.c
+
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl diff --git a/src/mainboard/dell/optiplex_3050/acpi/ec.asl b/src/mainboard/dell/optiplex_3050/acpi/ec.asl
new file mode 100644 new file mode 100644
@ -342,12 +355,48 @@ index 0000000000..54a5147b7d
+checksums +checksums
+ +
+checksum 392 415 984 +checksum 392 415 984
diff --git a/src/mainboard/dell/optiplex_3050/data.vbt b/src/mainboard/dell/optiplex_3050/data.vbt
new file mode 100644
index 0000000000000000000000000000000000000000..6dc40cd99563bcd957ec2a9c4567e3b21e5d1d1f
GIT binary patch
literal 4300
zcmeHJZ)_A*5TD(>zi)T1ds~!pU>y<RuF$e~N-bJsuXmJ|7P*63&uGGx+#w{DmbQ?B
ze^_HpNECA))Sw}xiC;|p(!}^ljU+}T!9QpeKH4uPN;EMM;}_tZeY@?IBiNH@l!V#L
zn>X`jfBW9Nd2eS$e@7qg=y|L+*|P~<Du4l>Ybk24rH<}xJ9eg%eaW32z1vbf_%+-P
zC$uXU01ASzM2Q>g;@$hkii6SZG3@E+#eVw*w9N;N1g6_?YiB3s;_)?@>DbVf-r9}P
zO`Vx|jP%robSBQ#gsrAYO>p&IQpqWSxVK|yXmkvV`v!Im77N$TZXru*X!y{`-Y55r
zVKf!Pgkc!X2_qgyK4nY|jSRP7a&Qp0+diYXy*OGNIan;Ts7z%5ry$@FKoGo8XMq5h
z6OcC{V?x>l17U>+7I|RUgn|iuCftWGW>(Kf196=odH`0=A3;(GULp|y6Ks_T0R#_x
zlLt);9A0GWnQsLE?*|8{0RgE`gv2JC<6bXwubJ}!0Qv+3{3xJE9q#3H2<s&G0tf>5
z>@mL~p#5nF3*pl}^hKC<v1C31Ae!^M&^2;#l`=O_ZLQWF$7*Y}Uh$G>xt9(*`c-X6
zFkpAE5jIOv7?VVJPHKbYp3@KrBCHN-@DOp9_>7mqcf{Wl|3v&7@nvGak3pDtDe*nT
zYl+trr--)_KT146>^lIL%Ay5+{&h=mW!RCRdEk{8SSMWj3D+L{)!qr(URTPl<i;AB
za@p^PE9Ea6pj-}YuxDTr0>wf|yGUKG?B!CDGOpf7(oT__tC!2cJgEtK{*6}R$n1=r
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zBN6*5So*Vg*3aOq|DtfT{{PvtW2P<e%*HkB(yV?<-ipBd2rTP@b3v<wGk0i#{Bmcc
z@y0B7K0!Gt2Iyi?fd2i^HUB$v{Q!tv^fz~$94j}a>75FZ$;1Eo6%!)V*$4D5C>nt}
z7_D}&ricJyuY&X-!vUs`GWIOPx0wDOV;?d6f$4uRCdjx-*4N7{CF5RMe_CcQ%J`0~
ze<-uhWc)?e%Q6cpxK`1V3hPmDzoNgOuwx3otLUF7>?;L-S9HJ1!Ybac>fI{aq2eJ`
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z556thD#%T3IZc)NKi{(4RJn@8Dq3?JywFKA?WW585y(IR)(Ee|k5bDtz|lFnDY}0G
Ds8qe3
literal 0
HcmV?d00001
diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
new file mode 100644 new file mode 100644
index 0000000000..eb731fe48f index 0000000000..039709aa4a
--- /dev/null --- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/devicetree.cb +++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
@@ -0,0 +1,119 @@ @@ -0,0 +1,103 @@
+## SPDX-License-Identifier: GPL-2.0-only +## SPDX-License-Identifier: GPL-2.0-only
+ +
+chip soc/intel/skylake +chip soc/intel/skylake
@ -356,8 +405,6 @@ index 0000000000..eb731fe48f
+ # Enable Enhanced Intel SpeedStep + # Enable Enhanced Intel SpeedStep
+ register "eist_enable" = "1" + register "eist_enable" = "1"
+ +
+ device cpu_cluster 0 on end
+
+ device domain 0 on + device domain 0 on
+ device ref igpu on + device ref igpu on
+ register "PrimaryDisplay" = "Display_iGFX" + register "PrimaryDisplay" = "Display_iGFX"
@ -365,32 +412,19 @@ index 0000000000..eb731fe48f
+ +
+ device ref south_xhci on + device ref south_xhci on
+ register "usb2_ports" = "{ + register "usb2_ports" = "{
+ [0] = USB2_PORT_MID(OC0), + [0] = USB2_PORT_MID(OC0), // Front panel (blue)
+ [1] = USB2_PORT_MID(OC0), + [1] = USB2_PORT_MID(OC0), // Front panel (blue)
+ [2] = USB2_PORT_MID(OC4), + [2] = USB2_PORT_MID(OC3), // Back panel (black)
+ [3] = USB2_PORT_MID(OC4), + [3] = USB2_PORT_MID(OC2), // Back panel (blue)
+ [4] = USB2_PORT_MID(OC2), + [4] = USB2_PORT_MID(OC1), // Back panel (blue)
+ [5] = USB2_PORT_MID(OC2), + [6] = USB2_PORT_MID(OC1), // Back panel (black)
+ [6] = USB2_PORT_MID(OC0), + [8] = USB2_PORT_MID(OC_SKIP), // WiFi slot
+ [7] = USB2_PORT_MID(OC0),
+ [8] = USB2_PORT_MID(OC0),
+ [9] = USB2_PORT_MID(OC0),
+ [10] = USB2_PORT_MID(OC1),
+ [11] = USB2_PORT_MID(OC1),
+ [12] = USB2_PORT_MID(OC_SKIP),
+ [13] = USB2_PORT_MID(OC_SKIP),
+ }" + }"
+ register "usb3_ports" = "{ + register "usb3_ports" = "{
+ [0] = USB3_PORT_DEFAULT(OC0), + [0] = USB3_PORT_DEFAULT(OC0), // Front panel (blue)
+ [1] = USB3_PORT_DEFAULT(OC0), + [1] = USB3_PORT_DEFAULT(OC0), // Front panel (blue)
+ [2] = USB3_PORT_DEFAULT(OC3), + [2] = USB3_PORT_DEFAULT(OC2), // Back panel (blue)
+ [3] = USB3_PORT_DEFAULT(OC3), + [3] = USB3_PORT_DEFAULT(OC1), // Back panel (blue)
+ [4] = USB3_PORT_DEFAULT(OC1),
+ [5] = USB3_PORT_DEFAULT(OC1),
+ [6] = USB3_PORT_DEFAULT(OC_SKIP),
+ [7] = USB3_PORT_DEFAULT(OC_SKIP),
+ [8] = USB3_PORT_DEFAULT(OC_SKIP),
+ [9] = USB3_PORT_DEFAULT(OC_SKIP),
+ }" + }"
+ end + end
+ +
@ -402,6 +436,7 @@ index 0000000000..eb731fe48f
+ register "SataPortsEnable[0]" = "1" + register "SataPortsEnable[0]" = "1"
+ end + end
+ +
+ # M.2 SSD
+ device ref pcie_rp21 on + device ref pcie_rp21 on
+ register "PcieRpEnable[20]" = "1" + register "PcieRpEnable[20]" = "1"
+ register "PcieRpClkReqSupport[20]" = "1" + register "PcieRpClkReqSupport[20]" = "1"
@ -460,9 +495,7 @@ index 0000000000..eb731fe48f
+ end + end
+ end + end
+ +
+ device ref hda on + device ref hda on end
+ register "PchHdaVcType" = "Vc1"
+ end
+ +
+ device ref smbus on end + device ref smbus on end
+ end + end
@ -525,6 +558,102 @@ index 0000000000..cb4c22f285
+ others => Disabled); + others => Disabled);
+ +
+end GMA.Mainboard; +end GMA.Mainboard;
diff --git a/src/mainboard/dell/optiplex_3050/hda_verb.c b/src/mainboard/dell/optiplex_3050/hda_verb.c
new file mode 100644
index 0000000000..621e4f7a52
--- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/hda_verb.c
@@ -0,0 +1,90 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ /* coreboot specific header, codec 0 */
+ 0x10ec0255, /* Realtek ALC3234 */
+ 0x102807a3, /* Subsystem ID */
+ 11, /* Number of entries */
+
+ /* Pin Widget Verb Table */
+
+ AZALIA_SUBVENDOR(0, 0x102807a3),
+
+ AZALIA_PIN_CFG(0, 0x12, 0x40000000), // does not describe a jack or internal device
+ AZALIA_PIN_CFG(0, 0x14, AZALIA_PIN_DESC(
+ AZALIA_INTEGRATED,
+ AZALIA_INTERNAL,
+ AZALIA_SPEAKER,
+ AZALIA_OTHER_ANALOG,
+ AZALIA_COLOR_UNKNOWN,
+ AZALIA_NO_JACK_PRESENCE_DETECT,
+ 5, 0
+ )),
+ AZALIA_PIN_CFG(0, 0x17, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x1a, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x1b, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
+ AZALIA_LINE_OUT,
+ AZALIA_STEREO_MONO_1_8,
+ AZALIA_BLACK,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 2, 0
+ )),
+ AZALIA_PIN_CFG(0, 0x1d, 0x4054c029), // does not describe a jack or internal device
+ AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)),
+ AZALIA_PIN_CFG(0, 0x21, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_EXTERNAL_PRIMARY_CHASSIS | AZALIA_FRONT,
+ AZALIA_HP_OUT,
+ AZALIA_STEREO_MONO_1_8,
+ AZALIA_BLACK,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 5, 15
+ )),
+
+ /* coreboot specific header, codec 2 */
+ 0x80862809, /* Intel Skylake HDMI */
+ 0x80860101, /* Subsystem ID */
+ 4, /* Number of entries */
+
+ /* Pin Widget Verb Table */
+
+ AZALIA_SUBVENDOR(2, 0x80860101),
+
+ AZALIA_PIN_CFG(2, 0x05, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_DIGITAL_DISPLAY,
+ AZALIA_DIGITAL_OTHER_OUT,
+ AZALIA_OTHER_DIGITAL,
+ AZALIA_COLOR_UNKNOWN,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 1, 0
+ )),
+ AZALIA_PIN_CFG(2, 0x06, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_DIGITAL_DISPLAY,
+ AZALIA_DIGITAL_OTHER_OUT,
+ AZALIA_OTHER_DIGITAL,
+ AZALIA_COLOR_UNKNOWN,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 1, 0
+ )),
+ AZALIA_PIN_CFG(2, 0x07, AZALIA_PIN_DESC(
+ AZALIA_JACK,
+ AZALIA_DIGITAL_DISPLAY,
+ AZALIA_DIGITAL_OTHER_OUT,
+ AZALIA_OTHER_DIGITAL,
+ AZALIA_COLOR_UNKNOWN,
+ AZALIA_JACK_PRESENCE_DETECT,
+ 1, 0
+ )),
+};
+
+const u32 pc_beep_verbs[] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/dell/optiplex_3050/include/early_gpio.h b/src/mainboard/dell/optiplex_3050/include/early_gpio.h diff --git a/src/mainboard/dell/optiplex_3050/include/early_gpio.h b/src/mainboard/dell/optiplex_3050/include/early_gpio.h
new file mode 100644 new file mode 100644
index 0000000000..17a16371e3 index 0000000000..17a16371e3
@ -791,10 +920,10 @@ index 0000000000..83293c32a9
+#endif +#endif
diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c diff --git a/src/mainboard/dell/optiplex_3050/ramstage.c b/src/mainboard/dell/optiplex_3050/ramstage.c
new file mode 100644 new file mode 100644
index 0000000000..5cf2c81e50 index 0000000000..94778f60c9
--- /dev/null --- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/ramstage.c +++ b/src/mainboard/dell/optiplex_3050/ramstage.c
@@ -0,0 +1,513 @@ @@ -0,0 +1,512 @@
+/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-License-Identifier: GPL-2.0-only */
+ +
+#include <bootstate.h> +#include <bootstate.h>
@ -812,7 +941,7 @@ index 0000000000..5cf2c81e50
+ +
+#define FORM_FACTOR_MICRO 0 +#define FORM_FACTOR_MICRO 0
+#define FORM_FACTOR_SFF 1 +#define FORM_FACTOR_SFF 1
+// NOTE: one of these is MT, but 2 and 3 both get the same table anyways +// Probably DT and MT
+#define FORM_FACTOR_UNK2 2 +#define FORM_FACTOR_UNK2 2
+#define FORM_FACTOR_UNK3 3 +#define FORM_FACTOR_UNK3 3
+ +
@ -1260,7 +1389,6 @@ index 0000000000..5cf2c81e50
+ +
+ // Perform write + // Perform write
+ sch5555_mbox_write(1, arr[i].addr, val); + sch5555_mbox_write(1, arr[i].addr, val);
+
+ } + }
+} +}
+ +
@ -1298,7 +1426,7 @@ index 0000000000..5cf2c81e50
+ +
+ core_cnt = get_core_cnt(); + core_cnt = get_core_cnt();
+ printk(BIOS_DEBUG, "CPU Core Count = %#x\n", core_cnt); + printk(BIOS_DEBUG, "CPU Core Count = %#x\n", core_cnt);
+ if (get_core_cnt() > 2) { + if (core_cnt > 2) {
+ sch5555_mbox_write(1, 0x9e, 0x30); + sch5555_mbox_write(1, 0x9e, 0x30);
+ sch5555_mbox_write(1, 0xeb, sch5555_mbox_read(1, 0xea)); + sch5555_mbox_write(1, 0xeb, sch5555_mbox_read(1, 0xea));
+ } + }
@ -1310,18 +1438,14 @@ index 0000000000..5cf2c81e50
+BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL); +BOOT_STATE_INIT_ENTRY(BS_POST_DEVICE, BS_ON_EXIT, sch5555_ec_hwm_init, NULL);
diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c diff --git a/src/mainboard/dell/optiplex_3050/romstage.c b/src/mainboard/dell/optiplex_3050/romstage.c
new file mode 100644 new file mode 100644
index 0000000000..a4734e5d61 index 0000000000..501b254232
--- /dev/null --- /dev/null
+++ b/src/mainboard/dell/optiplex_3050/romstage.c +++ b/src/mainboard/dell/optiplex_3050/romstage.c
@@ -0,0 +1,26 @@ @@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */ +/* SPDX-License-Identifier: GPL-2.0-only */
+ +
+#include <assert.h>
+#include <soc/romstage.h> +#include <soc/romstage.h>
+#include <stdint.h>
+#include <string.h>
+#include <spd_bin.h> +#include <spd_bin.h>
+#include <cbfs.h>
+ +
+void mainboard_memory_init_params(FSPM_UPD *mupd) +void mainboard_memory_init_params(FSPM_UPD *mupd)
+{ +{
@ -1335,10 +1459,6 @@ index 0000000000..a4734e5d61
+ mem_cfg->MemorySpdDataLen = blk.len; + mem_cfg->MemorySpdDataLen = blk.len;
+ mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0]; + mem_cfg->MemorySpdPtr00 = (uintptr_t)blk.spd_array[0];
+ mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1]; + mem_cfg->MemorySpdPtr10 = (uintptr_t)blk.spd_array[1];
+
+ /* use virtual channel 1 for the dmi interface of the PCH
+ * FIXME: do we need this? */
+ mupd->FspmTestConfig.DmiVc1 = 1;
+} +}
diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.c b/src/mainboard/dell/optiplex_3050/sch5555_ec.c diff --git a/src/mainboard/dell/optiplex_3050/sch5555_ec.c b/src/mainboard/dell/optiplex_3050/sch5555_ec.c
new file mode 100644 new file mode 100644

View File

@ -1,7 +1,7 @@
From 8b951349f2ef77916633c817ad2fc1decd5c0920 Mon Sep 17 00:00:00 2001 From 53151be243024957386012a099ccf3858f830555 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com> From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 30 Sep 2024 20:44:38 -0400 Date: Mon, 30 Sep 2024 20:44:38 -0400
Subject: [PATCH 1/3] mb/dell: Add Optiplex 780 MT (x4x/ICH10) Subject: [PATCH 2/5] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>

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@ -1,39 +0,0 @@
From ddc7390d7750eb3b29a6d6fe7bf2400121d639b5 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
Subject: [PATCH 3/3] Remove warning for coreboot images built without a
payload
I added this in upstream to prevent people from accidentally flashing
roms without a payload resulting in a no boot situation, but in
libreboot lbmk handles the payload and thus this warning always comes
up. This has caused confusion and concern so just patch it out.
---
payloads/Makefile.mk | 13 +------------
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
index 5f988dac1b..516133880f 100644
--- a/payloads/Makefile.mk
+++ b/payloads/Makefile.mk
@@ -50,16 +50,5 @@ distclean-payloads:
print-repo-info-payloads:
-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
-ifeq ($(CONFIG_PAYLOAD_NONE),y)
-show_notices:: warn_no_payload
-endif
-
-warn_no_payload:
- printf "\n\t** WARNING **\n"
- printf "coreboot has been built without a payload. Writing\n"
- printf "a coreboot image without a payload to your board's\n"
- printf "flash chip will result in a non-booting system. You\n"
- printf "can use cbfstool to add a payload to the image.\n\n"
-
.PHONY: force-payload coreinfo nvramcui
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--
2.39.5

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@ -1,7 +1,7 @@
From 1b230f671ebc6e355a001ac7ffc9b031329de019 Mon Sep 17 00:00:00 2001 From 50ae904625d6917c68ff8f8f50c280d79842142b Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org> From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000 Date: Sun, 19 Feb 2023 18:21:43 +0000
Subject: [PATCH 2/3] util/ifdtool: add --nuke flag (all 0xFF on region) Subject: [PATCH 3/5] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten When this option is used, the region's contents are overwritten
with all ones (0xFF). with all ones (0xFF).

View File

@ -1,7 +1,7 @@
From d7f20d6adf94e6c4736c55e88fcd1c8bde88994a Mon Sep 17 00:00:00 2001 From 895f9a49fb73d000178d8422b9d0c7e0ef71ae03 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com> From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600 Date: Fri, 12 May 2023 19:55:15 -0600
Subject: [PATCH 4/4] Remove warning for coreboot images built without a Subject: [PATCH 4/5] Remove warning for coreboot images built without a
payload payload
I added this in upstream to prevent people from accidentally flashing I added this in upstream to prevent people from accidentally flashing

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@ -1,7 +1,7 @@
From 300f73eae58bfcde26f82814a5e295585b3e3a2a Mon Sep 17 00:00:00 2001 From 0b26b89118b9bde0a722b9743b9871aa68f8ca38 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com> From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 30 Oct 2024 20:55:25 -0600 Date: Wed, 30 Oct 2024 20:55:25 -0600
Subject: [PATCH 1/1] mb/dell/optiplex_780: Add USFF variant Subject: [PATCH 5/5] mb/dell/optiplex_780: Add USFF variant
Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103 Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com> Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>

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@ -1,2 +1,2 @@
tree="next" tree="next"
rev="c21bed6de9359111afd5d6ed6e76b1d2116b216c" rev="d28fedf4f2cb7e4475a6cdfcab37d64cc60bba1f"