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fix build issues on x220edp_8mb 

Signed-off-by: Leah Rowe <leah@libreboot.org>
Leah Rowe 2024-05-03 22:11:09 +01:00
parent 5d62d6f3f1
commit c152a917b2
1 changed files with 41 additions and 0 deletions
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41
config/coreboot/next/patches/0033-fix-build-issues-for-x220-edp.patch Normal file
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@ -0,0 +1,41 @@
From 5bd87f3afc25691a254bd708e8e21f30fe5bb874 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Fri, 3 May 2024 22:09:38 +0100
Subject: [PATCH 1/1] fix build issues for x220 edp
the patches i merged were quite old. coreboot made some
changes to its override tree on this board, but they were
identical before, comparing fhd and non-fhd x220
therefore, copy the current upstream one to the fhd one.
this made x220edp build again
Signed-off-by: Leah Rowe <info@minifree.org>
---
src/mainboard/lenovo/x220/variants/x220_fhd/overridetree.cb | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/lenovo/x220/variants/x220_fhd/overridetree.cb b/src/mainboard/lenovo/x220/variants/x220_fhd/overridetree.cb
index 604eadf2a9..b9caa255de 100644
--- a/src/mainboard/lenovo/x220/variants/x220_fhd/overridetree.cb
+++ b/src/mainboard/lenovo/x220/variants/x220_fhd/overridetree.cb
@@ -1,12 +1,13 @@
chip northbridge/intel/sandybridge
device domain 0 on
chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
- device pci 1f.0 on #LPC bridge
+ device ref lpc on
chip ec/lenovo/h8
+ device pnp ff.2 on end # dummy
register "eventa_enable" = "0x01"
register "eventb_enable" = "0xf0"
end
- end # LPC bridge
+ end
end
end
end
--
2.39.2