libreboot
/
lbmk
1
0
Fork 0
Code Packages Projects Releases Activity

Merge branch 'veyron-uboot-dmreset' of alpernebbi/lbmk into master

fsdg20230625
Leah Rowe 2023-01-10 03:26:49 +00:00 committed by Gogs
parent 6b10454271 e11650c3c7
commit e8072934f2
4 changed files with 36 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
resources/u-boot/veyron_jerry/config/default
View File

@ -1398,6 +1398,8 @@ CONFIG_NETDEVICES=y
# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set
# CONFIG_PHY_ROCKCHIP_PCIE is not set
# CONFIG_PHY_ROCKCHIP_TYPEC is not set
# CONFIG_PHY_CADENCE_SIERRA is not set
# CONFIG_PHY_CADENCE_TORRENT is not set
# CONFIG_MVEBU_COMPHY_SUPPORT is not set
#
@ -1521,8 +1523,14 @@ CONFIG_RAM_ROCKCHIP_DEBUG=y
#
# Reset Controller Support
#
# CONFIG_DM_RESET is not set
CONFIG_DM_RESET=y
# CONFIG_RESET_AST2500 is not set
# CONFIG_RESET_AST2600 is not set
CONFIG_RESET_ROCKCHIP=y
# CONFIG_RESET_HISILICON is not set
# CONFIG_RESET_SYSCON is not set
# CONFIG_RESET_SCMI is not set
# CONFIG_RESET_DRA7 is not set
# CONFIG_DM_RNG is not set
#

10
resources/u-boot/veyron_mickey/config/default
View File

@ -1382,6 +1382,8 @@ CONFIG_NETDEVICES=y
# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set
# CONFIG_PHY_ROCKCHIP_PCIE is not set
# CONFIG_PHY_ROCKCHIP_TYPEC is not set
# CONFIG_PHY_CADENCE_SIERRA is not set
# CONFIG_PHY_CADENCE_TORRENT is not set
# CONFIG_MVEBU_COMPHY_SUPPORT is not set
#
@ -1505,8 +1507,14 @@ CONFIG_RAM_ROCKCHIP_DEBUG=y
#
# Reset Controller Support
#
# CONFIG_DM_RESET is not set
CONFIG_DM_RESET=y
# CONFIG_RESET_AST2500 is not set
# CONFIG_RESET_AST2600 is not set
CONFIG_RESET_ROCKCHIP=y
# CONFIG_RESET_HISILICON is not set
# CONFIG_RESET_SYSCON is not set
# CONFIG_RESET_SCMI is not set
# CONFIG_RESET_DRA7 is not set
# CONFIG_DM_RNG is not set
#

10
resources/u-boot/veyron_minnie/config/default
View File

@ -1386,6 +1386,8 @@ CONFIG_NETDEVICES=y
# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set
# CONFIG_PHY_ROCKCHIP_PCIE is not set
# CONFIG_PHY_ROCKCHIP_TYPEC is not set
# CONFIG_PHY_CADENCE_SIERRA is not set
# CONFIG_PHY_CADENCE_TORRENT is not set
# CONFIG_MVEBU_COMPHY_SUPPORT is not set
#
@ -1509,8 +1511,14 @@ CONFIG_RAM_ROCKCHIP_DEBUG=y
#
# Reset Controller Support
#
# CONFIG_DM_RESET is not set
CONFIG_DM_RESET=y
# CONFIG_RESET_AST2500 is not set
# CONFIG_RESET_AST2600 is not set
CONFIG_RESET_ROCKCHIP=y
# CONFIG_RESET_HISILICON is not set
# CONFIG_RESET_SYSCON is not set
# CONFIG_RESET_SCMI is not set
# CONFIG_RESET_DRA7 is not set
# CONFIG_DM_RNG is not set
#

10
resources/u-boot/veyron_speedy/config/default
View File

@ -1385,6 +1385,8 @@ CONFIG_NETDEVICES=y
# CONFIG_PHY_ROCKCHIP_INNO_USB2 is not set
# CONFIG_PHY_ROCKCHIP_PCIE is not set
# CONFIG_PHY_ROCKCHIP_TYPEC is not set
# CONFIG_PHY_CADENCE_SIERRA is not set
# CONFIG_PHY_CADENCE_TORRENT is not set
# CONFIG_MVEBU_COMPHY_SUPPORT is not set
#
@ -1508,8 +1510,14 @@ CONFIG_RAM_ROCKCHIP_DEBUG=y
#
# Reset Controller Support
#
# CONFIG_DM_RESET is not set
CONFIG_DM_RESET=y
# CONFIG_RESET_AST2500 is not set
# CONFIG_RESET_AST2600 is not set
CONFIG_RESET_ROCKCHIP=y
# CONFIG_RESET_HISILICON is not set
# CONFIG_RESET_SYSCON is not set
# CONFIG_RESET_SCMI is not set
# CONFIG_RESET_DRA7 is not set
# CONFIG_DM_RNG is not set
#