Commit Graph

12 Commits (036bf2c69a64c7a3bfdcfde3139ae2285e790a5b)

Author SHA1 Message Date
Leah Rowe 4a6dc5553f coreboot/default: update coreboot to January 2024
Base revision changed to:

commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a
Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com>
Date:   Fri Jan 5 16:48:17 2024 +0800

    mb/google/dedede/var/metaknight:Add fw_config probe for multi codec
    and amplifier

Of note:

Several out-of-tree ports have been adjusted to use the new SPD config
style, where it is defined in devicetree. I manually updated the E6530
patch myself, based on the update that Nicholas did on E6430 (Nicholas
will later update the E6530 patch himself, and I'll re-merge the patch).

Several upstream patches now exist in this revision, that we were able
to remove from lbmk.

The heap size patch was reverted upstream, as we did, but see:
https://review.coreboot.org/c/coreboot/+/80023
https://review.coreboot.org/c/coreboot/+/79525
Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should
be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway).

Also included in upstream now:

commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94
Author: Bill Xie <persmule@hardenedlinux.org>
Date:   Sat Oct 7 01:32:51 2023 +0800

    drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume

Further patches from upstream:

commit 432e92688eca0e85cbaebca3232f65936b305a98
Author: Bill Xie <persmule@hardenedlinux.org>
Date:   Fri Nov 3 12:34:01 2023 +0800

    drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum

This should fix S3 on GM45 thinkpads.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25 15:41:15 +00:00
Leah Rowe eff9130b7a update/trees: further simplify crossgcc handling
arch no longer needs to be set, on multi-tree projects,
and it has been renamed to xarch

the new behaviour is: if xarch is set, treat it as a
list of crossgcc targets and go through the list. set
the first one as the target, for what lbmk builds, but
build all of the defined crossgccc targets

crossgcc_ada is now xlang, and defines which languages
to build, rather than whether to build gcc-gnat

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-27 16:07:32 +00:00
Leah Rowe f44b99c808 don't delete microcode updates in rom images
at present, lbmk can remove microcode updates on images for
a given target, if the target specifies
microcode_required="n" in target.cfg

lbmk then provides images with microcode, and images without,
in a given release. although the user can also remove them
manually, this just makes it a bit more convenient, for those
users who do wish to run without the updates. this functionality
is provided only on those platforms where no-microcode is tested.

well, this behaviour implements a compromise on libreboot policy,
which is to always include microcode updates by default. see:
Binary Blob Reduction Policy

the *canoeboot* project now exists, developed in parallel with
libreboot, and it ships without microcode updates, on the same
targets where lbmk also handled this.

running without microcode updates is foolish, and should not
be encouraged. clean up lbmk by not providing this kludge.

the libreboot documentation will be updated, telling such users
to try canoeboot instead, or to remove the update from a given
libreboot rom - this is still possible, and mitigations such as
PECI disablement on GM45 are still in place (and will be kept),
so that this continues to work well.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-23 06:59:48 +00:00
Leah Rowe 92986f0c42 build/roms: remove modify_coreboot_rom()
don't handle "romtype" at all, in board target.cfg files

add /dev/null as pike2008 rom on amd boards. this serves
the same purpose, adding them as empty vga roms, to add
an empty rom in cbfs. pike2008 cards cause seabios to hang,
when their oproms are executed, so we insert a fake rom

on i945 thinkpads, use the coreboot config option:
CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK

when set, this enables the same bootblock copy, for use
with bucts. these two cases, namely pike2008 roms and
i945 bootblock copies, no longer need to be handled in code

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21 19:26:22 +00:00
Leah Rowe 90ac30b163 update/trees: simplified crossgcc handling
only call crossgcc for coreboot and u-boot, but use
hostcc for everything else. simplify the checking of
which architecture to compile for. "arch" in target.cfg
files has been modified, to allow further simplification.

without this patch, the logic currently only *barely* avoids
using crossgcc on things like utils, and only works in practise
because, in practise, lbmk only works on x86_64 anyway.

the new logic, as per this patch, is simpler and more robust.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21 14:18:51 +00:00
Leah Rowe 1306c9d2e3 Revert "coreboot/default: use alternative heap size fix"
This reverts commit 29e9c32e32.
2023-10-31 20:08:03 +00:00
Leah Rowe d218088d8b coreboot/all: disable TSEG stage cache
this is to work around recent s3 suspend/resume issues

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31 19:08:51 +00:00
Leah Rowe 29e9c32e32 coreboot/default: use alternative heap size fix
My previous fix to revert didn't fix S3 on GM45, one
of the platforms reported fixed by 78263; I'm merging
that instead, at patch set 10.

It is referenced by 78815/1 which was split from it,
so merge that too (restores overrides of higher values,
on certain platforms that we don't use yet).

https://review.coreboot.org/c/coreboot/+/78623/10
https://review.coreboot.org/c/coreboot/+/78815/1

Accordingly, update configs to match the new default.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31 08:27:37 +00:00
Leah Rowe 93458de74a revert coreboot heap size patch
the patch:
https://review.coreboot.org/c/coreboot/+/78270

this has been reverted, because it caused s3 resume
issues on most intel laptops in libreboot.

i was going to merge this instead:
https://review.coreboot.org/c/coreboot/+/78623

however, it's under review, and this doesn't change
to the old behaviour; it keeps the new universal
config, but changes the default

we know the old logic works, so keep that for now.
in fact, the offending patch was only merged to
main in coreboot, one day before i recently
updated coreboot revs in coreboot/default - i used
a 12 october revision, the patch above is 11 october

i then ran "./update trees -u coreboot" which updated
the heap sizes back to the old defaults. this should
fix s3 suspend/resume where it was broken, in the
libreboot 20231021 release - a point release with this
and a few other fixes is planned soon.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-29 01:29:38 +00:00
Leah Rowe 42068f7ce1 coreboot/default bump: rev d862695f5f, 12 Oct 2023
Riku's mSATA patch for HP8300USDT was merged upstream, so the
patch has been dropped from lbmk because it is contained within
this new coreboot revision.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-12 23:31:06 +01:00
Leah Rowe 62cc895c3c rename blob/ to vendor/
in the future, we may start downloading files that aren't
blobs, such as mxm port configs (on mainboards that use
MXM graphics)

this directory will contain all of those files

generally change the language used, across lbmk, to make
use of "vendorfile" instead of "blob"

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-07 01:23:11 +01:00
Leah Rowe da3c9bb3c5 merge config/ and resources/
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-09-04 02:47:25 +01:00