Commit Graph

8 Commits (cea88fa827c00ef13c51c81b0e60c74019591ba3)

Author SHA1 Message Date
Leah Rowe eff9130b7a update/trees: further simplify crossgcc handling
arch no longer needs to be set, on multi-tree projects,
and it has been renamed to xarch

the new behaviour is: if xarch is set, treat it as a
list of crossgcc targets and go through the list. set
the first one as the target, for what lbmk builds, but
build all of the defined crossgccc targets

crossgcc_ada is now xlang, and defines which languages
to build, rather than whether to build gcc-gnat

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-27 16:07:32 +00:00
Leah Rowe 92986f0c42 build/roms: remove modify_coreboot_rom()
don't handle "romtype" at all, in board target.cfg files

add /dev/null as pike2008 rom on amd boards. this serves
the same purpose, adding them as empty vga roms, to add
an empty rom in cbfs. pike2008 cards cause seabios to hang,
when their oproms are executed, so we insert a fake rom

on i945 thinkpads, use the coreboot config option:
CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK

when set, this enables the same bootblock copy, for use
with bucts. these two cases, namely pike2008 roms and
i945 bootblock copies, no longer need to be handled in code

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21 19:26:22 +00:00
Leah Rowe 3ccf194169 update coreboot configs
the x220 edp patch invalidated lots of configs, so
i did: ./update trees -u coreboot

this is the resulting patch

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21 14:18:58 +00:00
Leah Rowe 90ac30b163 update/trees: simplified crossgcc handling
only call crossgcc for coreboot and u-boot, but use
hostcc for everything else. simplify the checking of
which architecture to compile for. "arch" in target.cfg
files has been modified, to allow further simplification.

without this patch, the logic currently only *barely* avoids
using crossgcc on things like utils, and only works in practise
because, in practise, lbmk only works on x86_64 anyway.

the new logic, as per this patch, is simpler and more robust.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21 14:18:51 +00:00
Leah Rowe 1306c9d2e3 Revert "coreboot/default: use alternative heap size fix"
This reverts commit 29e9c32e32.
2023-10-31 20:08:03 +00:00
Leah Rowe d218088d8b coreboot/all: disable TSEG stage cache
this is to work around recent s3 suspend/resume issues

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31 19:08:51 +00:00
Leah Rowe 29e9c32e32 coreboot/default: use alternative heap size fix
My previous fix to revert didn't fix S3 on GM45, one
of the platforms reported fixed by 78263; I'm merging
that instead, at patch set 10.

It is referenced by 78815/1 which was split from it,
so merge that too (restores overrides of higher values,
on certain platforms that we don't use yet).

https://review.coreboot.org/c/coreboot/+/78623/10
https://review.coreboot.org/c/coreboot/+/78815/1

Accordingly, update configs to match the new default.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31 08:27:37 +00:00
Leah Rowe 7e6fd7e5b4 add lenovo x201 support
note: me6_update_parser needs to be written, similar
to me7_update_parser, to generate the partition
tables within intel me6 on lenovo bios updates.

the current logic in lbmk goes like this:
mkdir -p vendorfiles/cache/

and save your factory dump as:
vendorfiles/cache/x201_factory.rom

the build system has been modified, in such a way
as to support extracting me.bin (which is the full
one) and then neutering from this.

this is done automatically, if the file is present,
but you must first insert that file there, which means
you'll need a dump of the original boot flash on your
thinkpad x201

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-29 04:46:25 +00:00