Commit Graph

11 Commits (e761922542264629d7035735ea7b3e31f7a9ee74)

Author SHA1 Message Date
Leah Rowe a2f4235358 i945: switch boards to 20230625 coreboot revision
On T60 with Libreboot 20231106 and the GRUB payload, a user
reported this error in GRUB when a battery was connected:

"alloc magic is broken at 0x7b1aedf0: 0"

This error disappears when a battery is not connected, or
when using Libreboot 20230625. The issue has persisted
through to LIbreboot 20240225 and after, and I believe the
issue will be somewhere in coreboot, not in GRUB itself.

For now, switch i945 laptops (X60, T60, Macbook2,1) back to
the February 2023 coreboot revision used in Libreboot 20230625.

A bisect can be done before the next Libreboot release, ETA
May 2024, if time permits. Otherwise, this revert should solve
the problem for now, at least so far as Libreboot is concerned.

The following coreboot patches have been backported:

    commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94
    Author: Bill Xie <persmule@hardenedlinux.org>
    Date:   Sat Oct 7 01:32:51 2023 +0800

        drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume

    Further patches from upstream:

    commit 432e92688eca0e85cbaebca3232f65936b305a98
    Author: Bill Xie <persmule@hardenedlinux.org>
    Date:   Fri Nov 3 12:34:01 2023 +0800

        drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum

These patches fixed S3 on GM45 machines, though it will be useful on
the i945 machines aswell.

The reason I'm doing it this way it is because I don't have a battery
for my X60 or T60, and my T60 isn't in a very good state either,
so I can't reproduce the error myself yet.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-04-26 09:55:55 +01:00
Leah Rowe 4a6dc5553f coreboot/default: update coreboot to January 2024
Base revision changed to:

commit b6cbfa977f63d57d5d6b9e9f7c1cef30162f575a
Author: Morris Hsu <morris-hsu@quanta.corp-partner.google.com>
Date:   Fri Jan 5 16:48:17 2024 +0800

    mb/google/dedede/var/metaknight:Add fw_config probe for multi codec
    and amplifier

Of note:

Several out-of-tree ports have been adjusted to use the new SPD config
style, where it is defined in devicetree. I manually updated the E6530
patch myself, based on the update that Nicholas did on E6430 (Nicholas
will later update the E6530 patch himself, and I'll re-merge the patch).

Several upstream patches now exist in this revision, that we were able
to remove from lbmk.

The heap size patch was reverted upstream, as we did, but see:
https://review.coreboot.org/c/coreboot/+/80023
https://review.coreboot.org/c/coreboot/+/79525
Although we still disable the TSEG Stage Cache, ivy/sandy/haswell should
be reliable on S3 now (leaving TSEG Stage Cache disabled, for now, anyway).

Also included in upstream now:

commit 29030d0f3dad2ec6b86000dfe2c8e951ae80bf94
Author: Bill Xie <persmule@hardenedlinux.org>
Date:   Sat Oct 7 01:32:51 2023 +0800

    drivers/pc80/rtc/option.c: Stop resetting CMOS during s3 resume

Further patches from upstream:

commit 432e92688eca0e85cbaebca3232f65936b305a98
Author: Bill Xie <persmule@hardenedlinux.org>
Date:   Fri Nov 3 12:34:01 2023 +0800

    drivers/pc80/rtc/option.c: Reset only CMOS range covered by checksum

This should fix S3 on GM45 thinkpads.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2024-01-25 15:41:15 +00:00
Leah Rowe 92986f0c42 build/roms: remove modify_coreboot_rom()
don't handle "romtype" at all, in board target.cfg files

add /dev/null as pike2008 rom on amd boards. this serves
the same purpose, adding them as empty vga roms, to add
an empty rom in cbfs. pike2008 cards cause seabios to hang,
when their oproms are executed, so we insert a fake rom

on i945 thinkpads, use the coreboot config option:
CONFIG_INTEL_ADD_TOP_SWAP_BOOTBLOCK

when set, this enables the same bootblock copy, for use
with bucts. these two cases, namely pike2008 roms and
i945 bootblock copies, no longer need to be handled in code

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21 19:26:22 +00:00
Leah Rowe 3ccf194169 update coreboot configs
the x220 edp patch invalidated lots of configs, so
i did: ./update trees -u coreboot

this is the resulting patch

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-12-21 14:18:58 +00:00
Leah Rowe 6e60bfe0b0 Recreate i945 coreboot configs from scratch
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-11-05 21:50:28 +00:00
Leah Rowe 1306c9d2e3 Revert "coreboot/default: use alternative heap size fix"
This reverts commit 29e9c32e32.
2023-10-31 20:08:03 +00:00
Leah Rowe d218088d8b coreboot/all: disable TSEG stage cache
this is to work around recent s3 suspend/resume issues

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31 19:08:51 +00:00
Leah Rowe 29e9c32e32 coreboot/default: use alternative heap size fix
My previous fix to revert didn't fix S3 on GM45, one
of the platforms reported fixed by 78263; I'm merging
that instead, at patch set 10.

It is referenced by 78815/1 which was split from it,
so merge that too (restores overrides of higher values,
on certain platforms that we don't use yet).

https://review.coreboot.org/c/coreboot/+/78623/10
https://review.coreboot.org/c/coreboot/+/78815/1

Accordingly, update configs to match the new default.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-31 08:27:37 +00:00
Leah Rowe 93458de74a revert coreboot heap size patch
the patch:
https://review.coreboot.org/c/coreboot/+/78270

this has been reverted, because it caused s3 resume
issues on most intel laptops in libreboot.

i was going to merge this instead:
https://review.coreboot.org/c/coreboot/+/78623

however, it's under review, and this doesn't change
to the old behaviour; it keeps the new universal
config, but changes the default

we know the old logic works, so keep that for now.
in fact, the offending patch was only merged to
main in coreboot, one day before i recently
updated coreboot revs in coreboot/default - i used
a 12 october revision, the patch above is 11 october

i then ran "./update trees -u coreboot" which updated
the heap sizes back to the old defaults. this should
fix s3 suspend/resume where it was broken, in the
libreboot 20231021 release - a point release with this
and a few other fixes is planned soon.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-29 01:29:38 +00:00
Leah Rowe 42068f7ce1 coreboot/default bump: rev d862695f5f, 12 Oct 2023
Riku's mSATA patch for HP8300USDT was merged upstream, so the
patch has been dropped from lbmk because it is contained within
this new coreboot revision.

Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-10-12 23:31:06 +01:00
Leah Rowe da3c9bb3c5 merge config/ and resources/
Signed-off-by: Leah Rowe <leah@libreboot.org>
2023-09-04 02:47:25 +01:00