previously, "normal" initmode relied on the vgarom-based
seabios config, which enables option roms, but then lbmk
would insert pci-optionrom-exec 0 for vgarom, and 2 for normal
in libreboot, coreboot roms with "vgarom" in the filename do
pci option rom execution from coreboot, and "normal" roms
do execution from seabios(where seabios is the only payload
provided on normal setups)
this is because payloads like grub can also be used, on vgarom
setups, where coreboot must handle oprom execution
the deleted patch (in this commit) was written to fix an
issue theoretically; it hasn't been fully tested, and some
people have reported strange issues since this patch was
merged - there is no proof that this patch causes them, but
removing this patch is the correct thing to do regardless
i downloaded this file from git manually at some point,
when rebasing changes (i think it was the ec ones)
the logic in the file is correct but i forgot to mark
it executable
without this commit, lbmk fails utterly, on all the newer
intel boards
This reverts commit fe2b72035f.
The GRUB patch to fix the E6400 broke other systems and has been
reverted. As a result, GRUB needs to be disabled again on the E6400
until a better fix has been created.
This introduces a patch to grub which disables the coreboot
specific handling, allowing PS/2 keyboards to be handled the
same as i386-pc. However this alone breaks the keyboard in
Linux, requiring coreboot to perform PS/2 initialization.
I think GRUB may be restoring the original configuration of
the PS/2 controller once it exits, and if coreboot doesn't
initialize the controller then it's restored to the default
state which Linux doesn't seem to like. I think the emulated
keyboard interface provided by the EC on the E6400 behaves
in a non-standard way that is incompatible with the old
coreboot specific handling.
when nicholas added this, he removed the README because it's
going on libreboot.org instead. however, i merged a WIP version
of his page for now because i want to get the e6400 going in
libreboot sooner. so, temp-readding this README. will just
link to this on codeberg or something, from the lb docs
NOTE: I didn't write this README, hence author field set
in the commit. Nicholas wrote it, but I (Leah Rowe) am just
adding it. so, git author set to nicholas, not me
ps/2 internal keyboard faulty in grub target
i386-coreboot, according to nic3-14159
normal i386-pc grub (bios grub) is fine,
booted from seabios
it is being investigated
Adding it to lbmk for now as it is not yet in coreboot. If it is merged
into coreboot we can just reference the one there. The original README
will be incorporated into a new page on lbwww, so README.md just points
to a placeholder URL that should match the new page.
Tested the 4MiB ROMs but not the 8 or 16 MiB ones. This uses the same
board.cfg as the GM45 ThinkPads with an IFD+GBE from ich9gen.
Known issues:
- The internal keyboard does not work properly in GRUB. It seems like
the keyboard controller is outputing set 1 (XT) scancodes, but GRUB
is interpreting them as set 2 (AT) scancodes. This may also have
something to do with scancode translation. However, the keyboard works
fine in SeaBIOS and Linux. USB keyboards also work properly.
- The subsystem IDs in the GBE region are hardcoded for a Thinkpad in
ich9gen, though this doesn't seem to cause issues in Linux. The vendor
IFD and GBE region do have some differences from the generated
binaries, though they do not appear to be critical.
libreboot will still include microcode updates
by default, but mitigations against broken speedstep
and reboot (when microcode updates are excluded) were
removed following the merge with osboot
this patch restores those mitigations; the patch
reverts coreboot to older smrr code (which works fine, it
isn't critical to use the new behaviour) and disables peci
(pointless feature)
i'll probably re-tool this later to apply the changes
conditionally to whether ucode is present
this is not a change in policy. policy says:
include cpu microcode updates by default
policy also says:
libreboot must be configurable
microcode removal via cbfstool remove -n, counts as
configuration, and in practise is not possible on
gm45 patches in current libreboot; this patch corrects
that problem, allowing the machines to work somewhat
well (same stability issues as before, like MCE errors
resulting in kernel panic on high CPU/memory usage,
but i digress)
happy... hacking
small nitpick, but i try to use openbsd style
since i like that style. upon further reading
of their style guidelines today, it was revealed
to me that for includes, they:
* sort sys/ includes alphabetically, at the top
* after sys/ includes, have an empty line
* includes for networking-related headers below that
* empty space below networking headers if there
* after that, have the rest of the includes, sorted
alphabetically
at least, that is my understanding. i have to admit,
it does look cleaner
not really that critical but why not do it?
This is useful for e.g. HP EliteBook 2560p.
In coreboot config, enable e.g. (for lbmk blobutil):
CONFIG_KBC1126_FW1="../../ec/hp2560p/ec.bin.fw1"
CONFIG_KBC1126_FW2="../../ec/hp2560p/ec.bin.fw2"
In resources/blobs/sources you would have these entries:
EC_url
EC_url_bkup
EC_hash
In cases where the vendor update file contains a full
ROM image encompassing IFD+GbE+ME+BIOS, blobutil was
saving the *entire* ROM containing those, as me.bin.
For example, if it's an 8MB ROM, blobutil would create
a me.bin file that is actually the whole ROM containing:
* Vendor IFD region
* Vendor GbE(if it has one)
* Vendor ME region
* Vendor BIOS region
This fix tries with -M and -O first. In this combination,
me_cleaner shall extract me.bin (neutered) and save it.
If that fails, then the normal method with just -O is
tried, which by this logic would always be a lone ME
image if it succeeds.
I tested downloading ME images on existing boards with
this, and it didn't break them, and this fixes the bug.
This is done for HP 8200 SFF which Riku_V is adding to
lbmk. I'm on IRC with Riku_V as I write this commit
message! Super hot hotfix patch.
Leah Rowe