873 lines
26 KiB
Diff
873 lines
26 KiB
Diff
From 67b7a9e4d06d595adf8382ee83e82b5019e23afa Mon Sep 17 00:00:00 2001
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From: Riku Viitanen <riku.viitanen@protonmail.com>
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Date: Sat, 23 Dec 2023 19:02:10 +0200
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Subject: [PATCH 1/1] mb/hp: Add Compaq Elite 8300 CMT port
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Based on autoport and Z220 SuperIO code.
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With SeaBIOS and Nouveau on Debian, only nomodeset works with GTX 780
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(must use proprietary driver instead).
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Tested by xilynx / spot_ on #libreboot:
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- i3-3220, native raminit 2x2GB, M378B5773DH0-CH9 + MT8JTF25664AZ-1G6M1
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- Celeron G1620, native raminit 1x4GB, MT8JTF51264AZ-1G6E1
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- Booting Debian with Linux 6.1.0-16-amd64 via SeaBIOS
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- All SATA ports
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- Audio: internal speaker, headphone and microphone plugs
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- Rebooting
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- S3 suspend and wake
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- libgfxinit: VGA, DisplayPort
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- Ethernet
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- Super I/O: fan speeds stay in control
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- GPU in PEG slot
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Untested:
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- EHCI debugging
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- Other PCI/PCIe slots
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- PS/2
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- Serial, parallel ports
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Change-Id: Ie6ec60d2f4ee50d5e3fa2847c19fa4cf0ab73363
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Signed-off-by: Riku Viitanen <riku.viitanen@protonmail.com>
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---
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.../hp/compaq_elite_8300_cmt/Kconfig | 39 ++++
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.../hp/compaq_elite_8300_cmt/Kconfig.name | 2 +
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.../hp/compaq_elite_8300_cmt/Makefile.mk | 7 +
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.../hp/compaq_elite_8300_cmt/acpi/ec.asl | 1 +
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.../compaq_elite_8300_cmt/acpi/platform.asl | 10 +
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.../hp/compaq_elite_8300_cmt/acpi/superio.asl | 29 +++
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.../hp/compaq_elite_8300_cmt/acpi_tables.c | 12 ++
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.../hp/compaq_elite_8300_cmt/board_info.txt | 5 +
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.../hp/compaq_elite_8300_cmt/cmos.default | 7 +
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.../hp/compaq_elite_8300_cmt/cmos.layout | 74 +++++++
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.../hp/compaq_elite_8300_cmt/data.vbt | Bin 0 -> 3902 bytes
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.../hp/compaq_elite_8300_cmt/devicetree.cb | 177 ++++++++++++++++
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.../hp/compaq_elite_8300_cmt/dsdt.asl | 26 +++
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.../hp/compaq_elite_8300_cmt/early_init.c | 14 ++
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.../compaq_elite_8300_cmt/gma-mainboard.ads | 17 ++
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src/mainboard/hp/compaq_elite_8300_cmt/gpio.c | 191 ++++++++++++++++++
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.../hp/compaq_elite_8300_cmt/hda_verb.c | 33 +++
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.../hp/compaq_elite_8300_cmt/mainboard.c | 16 ++
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18 files changed, 660 insertions(+)
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/data.vbt
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
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create mode 100644 src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
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new file mode 100644
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index 0000000000..d2bfd35dc4
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig
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@@ -0,0 +1,39 @@
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+if BOARD_HP_COMPAQ_ELITE_8300_CMT
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+
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+config BOARD_SPECIFIC_OPTIONS
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+ def_bool y
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+ select BOARD_ROMSIZE_KB_16384
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+ select HAVE_ACPI_RESUME
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+ select HAVE_ACPI_TABLES
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+ select HAVE_CMOS_DEFAULT
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+ select HAVE_OPTION_TABLE
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+ select INTEL_GMA_HAVE_VBT
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+ select INTEL_INT15
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+ select MAINBOARD_HAS_TPM1
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+ select MAINBOARD_HAS_LIBGFXINIT
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+ select MAINBOARD_USES_IFD_GBE_REGION
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+ select MEMORY_MAPPED_TPM
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+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
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+ select SERIRQ_CONTINUOUS_MODE
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+ select SOUTHBRIDGE_INTEL_C216
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+ select SUPERIO_NUVOTON_NPCD378
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+ select USE_NATIVE_RAMINIT
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+
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+config CBFS_SIZE
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+ default 0x570000
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+
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+config MAINBOARD_DIR
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+ default "hp/compaq_elite_8300_cmt"
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+
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+config MAINBOARD_PART_NUMBER
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+ default "HP Compaq Elite 8300 CMT"
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+
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+config VGA_BIOS_ID
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+ default "8086,0152"
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+
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+config DRAM_RESET_GATE_GPIO
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+ default 60
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+
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+config USBDEBUG_HCD_INDEX # FIXME: check this
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+ default 2
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+endif
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
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new file mode 100644
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index 0000000000..bd399b1e76
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Kconfig.name
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@@ -0,0 +1,2 @@
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+config BOARD_HP_COMPAQ_ELITE_8300_CMT
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+ bool "Compaq Elite 8300 CMT"
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
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new file mode 100644
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index 0000000000..fb492d3583
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/Makefile.mk
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@@ -0,0 +1,7 @@
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+## SPDX-License-Identifier: GPL-2.0-only
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+
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+bootblock-y += early_init.c
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+bootblock-y += gpio.c
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+romstage-y += early_init.c
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+romstage-y += gpio.c
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+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
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new file mode 100644
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index 0000000000..73fa78ef14
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/ec.asl
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@@ -0,0 +1 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
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new file mode 100644
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index 0000000000..aff432b6f4
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/platform.asl
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@@ -0,0 +1,10 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+
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+Method(_WAK, 1)
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+{
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+ Return(Package() {0, 0})
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+}
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+
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+Method(_PTS, 1)
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+{
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+}
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
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new file mode 100644
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index 0000000000..54f8e3fe95
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi/superio.asl
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@@ -0,0 +1,29 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+
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+/* Copied over from compaq_8200_elite_sff/acpi/superio.asl */
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+
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+#include <superio/nuvoton/npcd378/acpi/superio.asl>
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+
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+Scope (\_GPE)
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+{
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+ Method (_L0D, 0, NotSerialized)
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+ {
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+ Notify (\_SB.PCI0.EHC1, 0x02)
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+ Notify (\_SB.PCI0.EHC2, 0x02)
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+ //FIXME: Add GBE device
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+ //Notify (\_SB.PCI0.GBE, 0x02)
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+ }
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+
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+ Method (_L09, 0, NotSerialized)
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+ {
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+ Notify (\_SB.PCI0.RP01, 0x02)
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+ Notify (\_SB.PCI0.RP02, 0x02)
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+ Notify (\_SB.PCI0.RP03, 0x02)
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+ Notify (\_SB.PCI0.RP04, 0x02)
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+ Notify (\_SB.PCI0.RP05, 0x02)
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+ Notify (\_SB.PCI0.RP06, 0x02)
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+ Notify (\_SB.PCI0.RP07, 0x02)
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+ Notify (\_SB.PCI0.RP08, 0x02)
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+ Notify (\_SB.PCI0.PEGP, 0x02)
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+ }
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+}
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
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new file mode 100644
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index 0000000000..8f4f83b826
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/acpi_tables.c
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@@ -0,0 +1,12 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+
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+#include <acpi/acpi_gnvs.h>
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+#include <soc/nvs.h>
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+
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+void mainboard_fill_gnvs(struct global_nvs *gnvs)
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+{
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+ /* Temperature at which OS will shutdown */
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+ gnvs->tcrt = 100;
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+ /* Temperature at which OS will throttle CPU */
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+ gnvs->tpsv = 90;
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+}
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
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new file mode 100644
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index 0000000000..16c29e82d8
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/board_info.txt
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@@ -0,0 +1,5 @@
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+Category: desktop
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+ROM protocol: SPI
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+ROM socketed: n
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+Flashrom support: y
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+Release year: 2012
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
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new file mode 100644
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index 0000000000..6d27a79c66
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.default
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@@ -0,0 +1,7 @@
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+boot_option=Fallback
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+debug_level=Debug
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+power_on_after_fail=Enable
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+nmi=Enable
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+sata_mode=AHCI
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+gfx_uma_size=32M
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+psu_fan_lvl=3
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
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new file mode 100644
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index 0000000000..1fc83b1a55
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--- /dev/null
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+++ b/src/mainboard/hp/compaq_elite_8300_cmt/cmos.layout
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@@ -0,0 +1,74 @@
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+## SPDX-License-Identifier: GPL-2.0-only
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+
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+# -----------------------------------------------------------------
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+entries
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+
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+# -----------------------------------------------------------------
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+0 120 r 0 reserved_memory
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+
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+# -----------------------------------------------------------------
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+# RTC_BOOT_BYTE (coreboot hardcoded)
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+384 1 e 4 boot_option
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+388 4 h 0 reboot_counter
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+
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+# -----------------------------------------------------------------
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+# coreboot config options: console
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+395 4 e 6 debug_level
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+400 3 h 0 psu_fan_lvl
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+
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+# coreboot config options: southbridge
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+408 1 e 1 nmi
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+409 2 e 7 power_on_after_fail
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+
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+421 1 e 9 sata_mode
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+
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+# coreboot config options: northbridge
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+432 3 e 11 gfx_uma_size
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+
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+448 128 r 0 vbnv
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+
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+# SandyBridge MRC Scrambler Seed values
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+896 32 r 0 mrc_scrambler_seed
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+928 32 r 0 mrc_scrambler_seed_s3
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+960 16 r 0 mrc_scrambler_seed_chk
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+
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+# coreboot config options: check sums
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+984 16 h 0 check_sum
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+
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+# -----------------------------------------------------------------
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+
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+enumerations
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+
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+#ID value text
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+1 0 Disable
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+1 1 Enable
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+2 0 Enable
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+2 1 Disable
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+4 0 Fallback
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+4 1 Normal
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+6 0 Emergency
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+6 1 Alert
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+6 2 Critical
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+6 3 Error
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+6 4 Warning
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+6 5 Notice
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+6 6 Info
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+6 7 Debug
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+6 8 Spew
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+7 0 Disable
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+7 1 Enable
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+7 2 Keep
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+9 0 AHCI
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+9 1 IDE
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+11 0 32M
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+11 1 64M
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+11 2 96M
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+11 3 128M
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+11 4 160M
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+11 5 192M
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+11 6 224M
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+
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+# -----------------------------------------------------------------
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+checksums
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+
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+checksum 392 415 984
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diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/data.vbt b/src/mainboard/hp/compaq_elite_8300_cmt/data.vbt
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new file mode 100644
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index 0000000000000000000000000000000000000000..ba627e152b65d779a80529d3811ec4d21c1b1e54
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GIT binary patch
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literal 3902
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|
|
z8S4>Op}BgEe0X$iI{Gx<zTS2<*M4^|Sg17^@EYY@zAl0)<Ta?zd%bn~D02?r)iu%P
|
|
wm+F7xwtgQt<KA_UyAYqlTkT_cS089?Pr=)R7|a9^*a9j1U$>1p1;4R>1E3jwQUCw|
|
|
|
|
literal 0
|
|
HcmV?d00001
|
|
|
|
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
|
|
new file mode 100644
|
|
index 0000000000..3d21739b72
|
|
--- /dev/null
|
|
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/devicetree.cb
|
|
@@ -0,0 +1,177 @@
|
|
+# SPDX-License-Identifier: GPL-2.0-only
|
|
+
|
|
+chip northbridge/intel/sandybridge
|
|
+ register "gfx.use_spread_spectrum_clock" = "0"
|
|
+ register "gpu_dp_b_hotplug" = "0"
|
|
+ register "gpu_dp_c_hotplug" = "0"
|
|
+ register "gpu_dp_d_hotplug" = "0"
|
|
+ # BTX mainboard: Reversed mapping
|
|
+ register "spd_addresses" = "{0x53, 0x52, 0x51, 0x50}"
|
|
+ device domain 0 on
|
|
+ subsystemid 0x103c 0x3396 inherit
|
|
+
|
|
+ device ref host_bridge on end # Host bridge Host bridge
|
|
+ device ref peg10 on end # PEG
|
|
+ device ref igd on end # iGPU
|
|
+
|
|
+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
|
|
+ register "docking_supported" = "0"
|
|
+ register "gen1_dec" = "0x00fc0a01"
|
|
+ register "gen2_dec" = "0x00fc0801"
|
|
+ register "pcie_hotplug_map" = "{ 0, 0, 0, 0, 0, 0, 0, 0 }"
|
|
+ register "pcie_port_coalesce" = "1"
|
|
+ register "sata_interface_speed_support" = "0x3"
|
|
+ register "sata_port_map" = "0x1f"
|
|
+ register "spi_lvscc" = "0x2005"
|
|
+ register "spi_uvscc" = "0x2005"
|
|
+ register "superspeed_capable_ports" = "0x0000000f"
|
|
+ register "xhci_overcurrent_mapping" = "0x00000c03"
|
|
+ register "xhci_switchable_ports" = "0x0000000f"
|
|
+ register "usb_port_config" = "{
|
|
+ { 1, 0, 0 },
|
|
+ { 1, 0, 0 },
|
|
+ { 1, 0, 1 },
|
|
+ { 1, 0, 1 },
|
|
+ { 1, 0, 2 },
|
|
+ { 1, 0, 2 },
|
|
+ { 1, 0, 3 },
|
|
+ { 1, 0, 3 },
|
|
+ { 1, 0, 4 },
|
|
+ { 1, 0, 4 },
|
|
+ { 1, 0, 6 },
|
|
+ { 1, 0, 5 },
|
|
+ { 1, 0, 5 },
|
|
+ { 1, 0, 6 }
|
|
+ }"
|
|
+
|
|
+ device ref xhci on end # USB 3.0 Controller
|
|
+ device ref mei1 off end # Management Engine Interface 1
|
|
+ device ref mei2 off end
|
|
+ device ref me_ide_r off end
|
|
+ device ref me_kt off end
|
|
+ device ref gbe on end # Intel Gigabit Ethernet
|
|
+ device ref ehci1 on end # USB2 EHCI #1
|
|
+ device ref ehci2 on end # USB2 EHCI #2
|
|
+ device ref hda on end # High Definition Audio
|
|
+ device ref sata1 on end # SATA Controller 1
|
|
+ device ref sata2 off end # SATA Controller 2
|
|
+ device ref smbus on end # SMBus
|
|
+
|
|
+ device ref pcie_rp1 on end
|
|
+ device ref pcie_rp2 on end
|
|
+ device ref pcie_rp3 on end
|
|
+ device ref pcie_rp4 on end
|
|
+ device ref pcie_rp5 on end
|
|
+ device ref pcie_rp6 on end
|
|
+ device ref pcie_rp7 on end
|
|
+ device ref pcie_rp8 on end
|
|
+
|
|
+ device ref pci_bridge on end
|
|
+ device ref lpc on # LPC bridge
|
|
+ chip superio/common # copied from Z220
|
|
+ device pnp 2e.ff on # passes SIO base addr to SSDT gen
|
|
+ chip superio/nuvoton/npcd378
|
|
+ device pnp 2e.0 off end # Floppy
|
|
+ device pnp 2e.1 on # Parallel port
|
|
+ # global
|
|
+
|
|
+ # serialice: Vendor writes:
|
|
+ irq 0x14 = 0x9c
|
|
+ irq 0x1c = 0xa8
|
|
+ irq 0x1d = 0x08
|
|
+ irq 0x22 = 0x3f
|
|
+ irq 0x1a = 0xb0
|
|
+ # dumped from superiotool:
|
|
+ irq 0x1b = 0x1e
|
|
+ irq 0x27 = 0x08
|
|
+ irq 0x2a = 0x20
|
|
+ irq 0x2d = 0x01
|
|
+ # parallel port
|
|
+ io 0x60 = 0x378
|
|
+ irq 0x70 = 0x07
|
|
+ drq 0x74 = 0x01
|
|
+ end
|
|
+ device pnp 2e.2 off # COM1
|
|
+ io 0x60 = 0x2f8
|
|
+ irq 0x70 = 3
|
|
+ end
|
|
+ device pnp 2e.3 on # COM2, IR
|
|
+ io 0x60 = 0x3f8
|
|
+ irq 0x70 = 4
|
|
+ end
|
|
+ device pnp 2e.4 on # LED control
|
|
+ io 0x60 = 0x600
|
|
+ # IOBASE[0h] = bit0 LED red / green
|
|
+ # IOBASE[0h] = bit1-4 LED PWM duty cycle
|
|
+ # IOBASE[1h] = bit6 SWCC
|
|
+
|
|
+ io 0x62 = 0x610
|
|
+ # IOBASE [0h] = GPES
|
|
+ # IOBASE [1h] = GPEE
|
|
+ # IOBASE [4h:7h] = 32bit upcounter at 1Mhz
|
|
+ # IOBASE [8h:bh] = GPS
|
|
+ # IOBASE [ch:fh] = GPE
|
|
+ end
|
|
+ device pnp 2e.5 on # Mouse
|
|
+ irq 0x70 = 0xc
|
|
+ end
|
|
+ device pnp 2e.6 on # Keyboard
|
|
+ io 0x60 = 0x0060
|
|
+ io 0x62 = 0x0064
|
|
+ irq 0x70 = 0x01
|
|
+ # serialice: Vendor writes:
|
|
+ drq 0xf0 = 0x40
|
|
+ end
|
|
+ device pnp 2e.7 on # WDT ?
|
|
+ io 0x60 = 0x620
|
|
+ end
|
|
+ device pnp 2e.8 on # HWM
|
|
+ io 0x60 = 0x800
|
|
+ # IOBASE[0h:feh] HWM page
|
|
+ # IOBASE[ffh] bit0-bit3 page selector
|
|
+
|
|
+ drq 0xf0 = 0x20
|
|
+ drq 0xf1 = 0x01
|
|
+ drq 0xf2 = 0x40
|
|
+ drq 0xf3 = 0x01
|
|
+
|
|
+ drq 0xf4 = 0x66
|
|
+ drq 0xf5 = 0x67
|
|
+ drq 0xf6 = 0x66
|
|
+ drq 0xf7 = 0x01
|
|
+ end
|
|
+ device pnp 2e.f on # GPIO OD ?
|
|
+ drq 0xf1 = 0x97
|
|
+ drq 0xf2 = 0x01
|
|
+ drq 0xf5 = 0x08
|
|
+ drq 0xfe = 0x80
|
|
+ end
|
|
+ device pnp 2e.15 on # BUS ?
|
|
+ io 0x60 = 0x0680
|
|
+ io 0x62 = 0x0690
|
|
+ end
|
|
+ device pnp 2e.1c on # Suspend Control ?
|
|
+ io 0x60 = 0x640
|
|
+ # writing to IOBASE[5h]
|
|
+ # 0x0: Power off
|
|
+ # 0x9: Power off and bricked until CMOS battery removed
|
|
+ end
|
|
+ device pnp 2e.1e on # GPIO ?
|
|
+ io 0x60 = 0x660
|
|
+ drq 0xf4 = 0x01
|
|
+ # skip the following, as it
|
|
+ # looks like remapped registers
|
|
+ #drq 0xf5 = 0x06
|
|
+ #drq 0xf6 = 0x60
|
|
+ #drq 0xfe = 0x03
|
|
+ end
|
|
+ end
|
|
+ end
|
|
+ end
|
|
+ chip drivers/pc80/tpm
|
|
+ device pnp 4e.0 on end # TPM module
|
|
+ end
|
|
+ end
|
|
+ end
|
|
+ end
|
|
+end
|
|
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
|
|
new file mode 100644
|
|
index 0000000000..e8e2b3a3e5
|
|
--- /dev/null
|
|
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/dsdt.asl
|
|
@@ -0,0 +1,26 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+#include <acpi/acpi.h>
|
|
+
|
|
+DefinitionBlock(
|
|
+ "dsdt.aml",
|
|
+ "DSDT",
|
|
+ ACPI_DSDT_REV_2,
|
|
+ OEM_ID,
|
|
+ ACPI_TABLE_CREATOR,
|
|
+ 0x20141018 /* OEM revision */
|
|
+)
|
|
+{
|
|
+ #include <acpi/dsdt_top.asl>
|
|
+ #include "acpi/platform.asl"
|
|
+ #include <cpu/intel/common/acpi/cpu.asl>
|
|
+ #include <southbridge/intel/common/acpi/platform.asl>
|
|
+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
|
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
|
|
+
|
|
+ Device (\_SB.PCI0)
|
|
+ {
|
|
+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
|
|
+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
|
|
+ }
|
|
+}
|
|
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
|
|
new file mode 100644
|
|
index 0000000000..8d10c6317c
|
|
--- /dev/null
|
|
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/early_init.c
|
|
@@ -0,0 +1,14 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+#include <bootblock_common.h>
|
|
+#include <superio/nuvoton/npcd378/npcd378.h>
|
|
+#include <superio/nuvoton/common/nuvoton.h>
|
|
+#include <southbridge/intel/bd82x6x/pch.h>
|
|
+
|
|
+#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2)
|
|
+
|
|
+void bootblock_mainboard_early_init(void)
|
|
+{
|
|
+ if (CONFIG(CONSOLE_SERIAL))
|
|
+ nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
|
|
+}
|
|
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
|
|
new file mode 100644
|
|
index 0000000000..686f7d44db
|
|
--- /dev/null
|
|
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/gma-mainboard.ads
|
|
@@ -0,0 +1,17 @@
|
|
+-- SPDX-License-Identifier: GPL-2.0-or-later
|
|
+
|
|
+with HW.GFX.GMA;
|
|
+with HW.GFX.GMA.Display_Probing;
|
|
+
|
|
+use HW.GFX.GMA;
|
|
+use HW.GFX.GMA.Display_Probing;
|
|
+
|
|
+private package GMA.Mainboard is
|
|
+
|
|
+ ports : constant Port_List :=
|
|
+ (DP2,
|
|
+ HDMI2,
|
|
+ Analog,
|
|
+ others => Disabled);
|
|
+
|
|
+end GMA.Mainboard;
|
|
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
|
|
new file mode 100644
|
|
index 0000000000..2ae852ae51
|
|
--- /dev/null
|
|
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/gpio.c
|
|
@@ -0,0 +1,191 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+#include <southbridge/intel/common/gpio.h>
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
|
|
+ .gpio0 = GPIO_MODE_GPIO,
|
|
+ .gpio1 = GPIO_MODE_GPIO,
|
|
+ .gpio2 = GPIO_MODE_NATIVE,
|
|
+ .gpio3 = GPIO_MODE_NATIVE,
|
|
+ .gpio4 = GPIO_MODE_NATIVE,
|
|
+ .gpio5 = GPIO_MODE_NATIVE,
|
|
+ .gpio6 = GPIO_MODE_GPIO,
|
|
+ .gpio7 = GPIO_MODE_GPIO,
|
|
+ .gpio8 = GPIO_MODE_GPIO,
|
|
+ .gpio9 = GPIO_MODE_NATIVE,
|
|
+ .gpio10 = GPIO_MODE_NATIVE,
|
|
+ .gpio11 = GPIO_MODE_GPIO,
|
|
+ .gpio12 = GPIO_MODE_NATIVE,
|
|
+ .gpio13 = GPIO_MODE_GPIO,
|
|
+ .gpio14 = GPIO_MODE_NATIVE,
|
|
+ .gpio15 = GPIO_MODE_GPIO,
|
|
+ .gpio16 = GPIO_MODE_GPIO,
|
|
+ .gpio17 = GPIO_MODE_GPIO,
|
|
+ .gpio18 = GPIO_MODE_NATIVE,
|
|
+ .gpio19 = GPIO_MODE_NATIVE,
|
|
+ .gpio20 = GPIO_MODE_NATIVE,
|
|
+ .gpio21 = GPIO_MODE_GPIO,
|
|
+ .gpio22 = GPIO_MODE_GPIO,
|
|
+ .gpio23 = GPIO_MODE_NATIVE,
|
|
+ .gpio24 = GPIO_MODE_GPIO,
|
|
+ .gpio25 = GPIO_MODE_NATIVE,
|
|
+ .gpio26 = GPIO_MODE_NATIVE,
|
|
+ .gpio27 = GPIO_MODE_GPIO,
|
|
+ .gpio28 = GPIO_MODE_GPIO,
|
|
+ .gpio29 = GPIO_MODE_GPIO,
|
|
+ .gpio30 = GPIO_MODE_NATIVE,
|
|
+ .gpio31 = GPIO_MODE_GPIO,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
|
|
+ .gpio0 = GPIO_DIR_INPUT,
|
|
+ .gpio1 = GPIO_DIR_INPUT,
|
|
+ .gpio6 = GPIO_DIR_INPUT,
|
|
+ .gpio7 = GPIO_DIR_INPUT,
|
|
+ .gpio8 = GPIO_DIR_INPUT,
|
|
+ .gpio11 = GPIO_DIR_INPUT,
|
|
+ .gpio13 = GPIO_DIR_INPUT,
|
|
+ .gpio15 = GPIO_DIR_OUTPUT,
|
|
+ .gpio16 = GPIO_DIR_INPUT,
|
|
+ .gpio17 = GPIO_DIR_OUTPUT,
|
|
+ .gpio21 = GPIO_DIR_INPUT,
|
|
+ .gpio22 = GPIO_DIR_INPUT,
|
|
+ .gpio24 = GPIO_DIR_INPUT,
|
|
+ .gpio27 = GPIO_DIR_INPUT,
|
|
+ .gpio28 = GPIO_DIR_OUTPUT,
|
|
+ .gpio29 = GPIO_DIR_OUTPUT,
|
|
+ .gpio31 = GPIO_DIR_INPUT,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
|
|
+ .gpio15 = GPIO_LEVEL_LOW,
|
|
+ .gpio17 = GPIO_LEVEL_LOW,
|
|
+ .gpio28 = GPIO_LEVEL_LOW,
|
|
+ .gpio29 = GPIO_LEVEL_HIGH,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
|
|
+ .gpio0 = GPIO_INVERT,
|
|
+ .gpio1 = GPIO_INVERT,
|
|
+ .gpio6 = GPIO_INVERT,
|
|
+ .gpio11 = GPIO_INVERT,
|
|
+ .gpio13 = GPIO_INVERT,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
|
|
+ .gpio32 = GPIO_MODE_GPIO,
|
|
+ .gpio33 = GPIO_MODE_GPIO,
|
|
+ .gpio34 = GPIO_MODE_GPIO,
|
|
+ .gpio35 = GPIO_MODE_GPIO,
|
|
+ .gpio36 = GPIO_MODE_GPIO,
|
|
+ .gpio37 = GPIO_MODE_GPIO,
|
|
+ .gpio38 = GPIO_MODE_GPIO,
|
|
+ .gpio39 = GPIO_MODE_GPIO,
|
|
+ .gpio40 = GPIO_MODE_NATIVE,
|
|
+ .gpio41 = GPIO_MODE_NATIVE,
|
|
+ .gpio42 = GPIO_MODE_NATIVE,
|
|
+ .gpio43 = GPIO_MODE_GPIO,
|
|
+ .gpio44 = GPIO_MODE_NATIVE,
|
|
+ .gpio45 = GPIO_MODE_NATIVE,
|
|
+ .gpio46 = GPIO_MODE_GPIO,
|
|
+ .gpio47 = GPIO_MODE_NATIVE,
|
|
+ .gpio48 = GPIO_MODE_GPIO,
|
|
+ .gpio49 = GPIO_MODE_GPIO,
|
|
+ .gpio50 = GPIO_MODE_NATIVE,
|
|
+ .gpio51 = GPIO_MODE_NATIVE,
|
|
+ .gpio52 = GPIO_MODE_NATIVE,
|
|
+ .gpio53 = GPIO_MODE_NATIVE,
|
|
+ .gpio54 = GPIO_MODE_GPIO,
|
|
+ .gpio55 = GPIO_MODE_NATIVE,
|
|
+ .gpio56 = GPIO_MODE_NATIVE,
|
|
+ .gpio57 = GPIO_MODE_GPIO,
|
|
+ .gpio58 = GPIO_MODE_NATIVE,
|
|
+ .gpio59 = GPIO_MODE_NATIVE,
|
|
+ .gpio60 = GPIO_MODE_NATIVE,
|
|
+ .gpio61 = GPIO_MODE_GPIO,
|
|
+ .gpio62 = GPIO_MODE_NATIVE,
|
|
+ .gpio63 = GPIO_MODE_NATIVE,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
|
|
+ .gpio32 = GPIO_DIR_INPUT,
|
|
+ .gpio33 = GPIO_DIR_INPUT,
|
|
+ .gpio34 = GPIO_DIR_INPUT,
|
|
+ .gpio35 = GPIO_DIR_INPUT,
|
|
+ .gpio36 = GPIO_DIR_INPUT,
|
|
+ .gpio37 = GPIO_DIR_INPUT,
|
|
+ .gpio38 = GPIO_DIR_INPUT,
|
|
+ .gpio39 = GPIO_DIR_INPUT,
|
|
+ .gpio43 = GPIO_DIR_INPUT,
|
|
+ .gpio46 = GPIO_DIR_INPUT,
|
|
+ .gpio48 = GPIO_DIR_INPUT,
|
|
+ .gpio49 = GPIO_DIR_INPUT,
|
|
+ .gpio54 = GPIO_DIR_INPUT,
|
|
+ .gpio57 = GPIO_DIR_INPUT,
|
|
+ .gpio61 = GPIO_DIR_INPUT,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
|
|
+ .gpio64 = GPIO_MODE_NATIVE,
|
|
+ .gpio65 = GPIO_MODE_NATIVE,
|
|
+ .gpio66 = GPIO_MODE_NATIVE,
|
|
+ .gpio67 = GPIO_MODE_NATIVE,
|
|
+ .gpio68 = GPIO_MODE_GPIO,
|
|
+ .gpio69 = GPIO_MODE_GPIO,
|
|
+ .gpio70 = GPIO_MODE_GPIO,
|
|
+ .gpio71 = GPIO_MODE_GPIO,
|
|
+ .gpio72 = GPIO_MODE_GPIO,
|
|
+ .gpio73 = GPIO_MODE_NATIVE,
|
|
+ .gpio74 = GPIO_MODE_NATIVE,
|
|
+ .gpio75 = GPIO_MODE_NATIVE,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
|
|
+ .gpio68 = GPIO_DIR_INPUT,
|
|
+ .gpio69 = GPIO_DIR_INPUT,
|
|
+ .gpio70 = GPIO_DIR_INPUT,
|
|
+ .gpio71 = GPIO_DIR_OUTPUT,
|
|
+ .gpio72 = GPIO_DIR_INPUT,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
|
|
+ .gpio71 = GPIO_LEVEL_LOW,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
|
|
+};
|
|
+
|
|
+const struct pch_gpio_map mainboard_gpio_map = {
|
|
+ .set1 = {
|
|
+ .mode = &pch_gpio_set1_mode,
|
|
+ .direction = &pch_gpio_set1_direction,
|
|
+ .level = &pch_gpio_set1_level,
|
|
+ .blink = &pch_gpio_set1_blink,
|
|
+ .invert = &pch_gpio_set1_invert,
|
|
+ .reset = &pch_gpio_set1_reset,
|
|
+ },
|
|
+ .set2 = {
|
|
+ .mode = &pch_gpio_set2_mode,
|
|
+ .direction = &pch_gpio_set2_direction,
|
|
+ .level = &pch_gpio_set2_level,
|
|
+ .reset = &pch_gpio_set2_reset,
|
|
+ },
|
|
+ .set3 = {
|
|
+ .mode = &pch_gpio_set3_mode,
|
|
+ .direction = &pch_gpio_set3_direction,
|
|
+ .level = &pch_gpio_set3_level,
|
|
+ .reset = &pch_gpio_set3_reset,
|
|
+ },
|
|
+};
|
|
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
|
|
new file mode 100644
|
|
index 0000000000..a1eafcda68
|
|
--- /dev/null
|
|
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/hda_verb.c
|
|
@@ -0,0 +1,33 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+#include <device/azalia_device.h>
|
|
+
|
|
+const u32 cim_verb_data[] = {
|
|
+ 0x10ec0221, /* Codec Vendor / Device ID: Realtek */
|
|
+ 0x103c3396, /* Subsystem ID */
|
|
+ 11, /* Number of 4 dword sets */
|
|
+ AZALIA_SUBVENDOR(0, 0x103c3396),
|
|
+ AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
|
|
+ AZALIA_PIN_CFG(0, 0x14, 0x01014020),
|
|
+ AZALIA_PIN_CFG(0, 0x17, 0x90170110),
|
|
+ AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
|
|
+ AZALIA_PIN_CFG(0, 0x19, 0x411111f0),
|
|
+ AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f),
|
|
+ AZALIA_PIN_CFG(0, 0x1b, 0x01813c30),
|
|
+ AZALIA_PIN_CFG(0, 0x1d, 0x415901f0),
|
|
+ AZALIA_PIN_CFG(0, 0x1e, 0x411111f0),
|
|
+ AZALIA_PIN_CFG(0, 0x21, 0x0221102f),
|
|
+
|
|
+ 0x80862806, /* Codec Vendor / Device ID: Intel */
|
|
+ 0x80860101, /* Subsystem ID */
|
|
+ 4, /* Number of 4 dword sets */
|
|
+ AZALIA_SUBVENDOR(3, 0x80860101),
|
|
+ AZALIA_PIN_CFG(3, 0x05, 0x58560010),
|
|
+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
|
|
+ AZALIA_PIN_CFG(3, 0x07, 0x58560030),
|
|
+
|
|
+};
|
|
+
|
|
+const u32 pc_beep_verbs[0] = {};
|
|
+
|
|
+AZALIA_ARRAY_SIZES;
|
|
diff --git a/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
|
|
new file mode 100644
|
|
index 0000000000..8dbd95ef96
|
|
--- /dev/null
|
|
+++ b/src/mainboard/hp/compaq_elite_8300_cmt/mainboard.c
|
|
@@ -0,0 +1,16 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+#include <device/device.h>
|
|
+#include <drivers/intel/gma/int15.h>
|
|
+#include <southbridge/intel/bd82x6x/pch.h>
|
|
+
|
|
+static void mainboard_enable(struct device *dev)
|
|
+{
|
|
+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_NONE,
|
|
+ GMA_INT15_PANEL_FIT_DEFAULT,
|
|
+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
|
+}
|
|
+
|
|
+struct chip_operations mainboard_ops = {
|
|
+ .enable_dev = mainboard_enable,
|
|
+};
|
|
--
|
|
2.39.2
|
|
|