140 lines
4.3 KiB
Go
140 lines
4.3 KiB
Go
package main
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import "fmt"
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type haswellmc struct {
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variant string
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}
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func divceil(a uint32, b uint32) uint32 {
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return (a + b - 1) / b
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}
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func getPanelCfg(inteltool InteltoolData, isULT bool) string {
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var refclk uint32
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var pwm_hz uint32
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if isULT {
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refclk = 24000000
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} else {
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refclk = 135000000
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}
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if (inteltool.IGD[0xc8254] >> 16) != 0 {
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pwm_hz = refclk / 128 / (inteltool.IGD[0xc8254] >> 16)
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} else {
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pwm_hz = 0
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}
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gpu_panel_power_up_delay := (inteltool.IGD[0xc7208] >> 16) & 0x1fff
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gpu_panel_power_backlight_on_delay := inteltool.IGD[0xc7208] & 0x1fff
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gpu_panel_power_down_delay := (inteltool.IGD[0xc720c] >> 16) & 0x1fff
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gpu_panel_power_backlight_off_delay := inteltool.IGD[0xc720c] & 0x1fff
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gpu_panel_power_cycle_delay := inteltool.IGD[0xc7210] & 0x1f
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return fmt.Sprintf(`{
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.up_delay_ms = %3d,
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.down_delay_ms = %3d,
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.cycle_delay_ms = %3d,
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.backlight_on_delay_ms = %3d,
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.backlight_off_delay_ms = %3d,
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.backlight_pwm_hz = %3d,
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}`,
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divceil(gpu_panel_power_up_delay, 10),
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divceil(gpu_panel_power_down_delay, 10),
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(gpu_panel_power_cycle_delay-1)*100,
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divceil(gpu_panel_power_backlight_on_delay, 10),
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divceil(gpu_panel_power_backlight_off_delay, 10),
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pwm_hz)
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}
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func (i haswellmc) Scan(ctx Context, addr PCIDevData) {
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inteltool := ctx.InfoSource.GetInteltool()
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isULT := (i.variant == "ULT")
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DevTree = DevTreeNode{
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Chip: "northbridge/intel/haswell",
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MissingParent: "northbridge",
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Comment: "FIXME: check ec_present, usb_xhci_on_resume, gfx",
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Registers: map[string]string{
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"gpu_dp_b_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 2) & 7),
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"gpu_dp_c_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 10) & 7),
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"gpu_dp_d_hotplug": FormatInt32((inteltool.IGD[0xc4030] >> 18) & 7),
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"panel_cfg": getPanelCfg(inteltool, isULT),
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"gpu_ddi_e_connected": FormatBool(((inteltool.IGD[0x64000] >> 4) & 1) == 0),
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"ec_present": "false",
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"usb_xhci_on_resume": "false",
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/* FIXME:XX hardcoded. */
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"gfx": "GMA_STATIC_DISPLAYS(0)",
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},
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Children: []DevTreeNode{
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{
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Chip: "cpu/intel/haswell",
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Children: []DevTreeNode{
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{
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Chip: "cpu_cluster",
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Dev: 0,
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Ops: "haswell_cpu_bus_ops",
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},
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},
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},
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{
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Chip: "domain",
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Dev: 0,
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Ops: "haswell_pci_domain_ops",
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PCIController: true,
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ChildPCIBus: 0,
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PCISlots: []PCISlot{
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PCISlot{PCIAddr: PCIAddr{Dev: 0x0, Func: 0}, writeEmpty: true, additionalComment: i.variant},
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PCISlot{PCIAddr: PCIAddr{Dev: 0x1, Func: 0}, writeEmpty: !isULT, additionalComment: "PCIe Bridge for discrete graphics"},
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PCISlot{PCIAddr: PCIAddr{Dev: 0x2, Func: 0}, writeEmpty: true, additionalComment: "Internal graphics"},
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PCISlot{PCIAddr: PCIAddr{Dev: 0x3, Func: 0}, writeEmpty: true, additionalComment: "Mini-HD audio"},
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},
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},
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},
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}
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if isULT {
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DevTree.Registers["dq_pins_interleaved"] = FormatBool(((inteltool.MCHBAR[0x2008] >> 10) & 1) == 0)
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}
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PutPCIDev(addr, "Host bridge")
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KconfigBool["NORTHBRIDGE_INTEL_HASWELL"] = true
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KconfigBool["HAVE_ACPI_TABLES"] = true
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KconfigBool["HAVE_ACPI_RESUME"] = true
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DSDTIncludes = append(DSDTIncludes, DSDTInclude{
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File: "cpu/intel/common/acpi/cpu.asl",
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})
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DSDTPCI0Includes = append(DSDTPCI0Includes, DSDTInclude{
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File: "northbridge/intel/haswell/acpi/hostbridge.asl",
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}, DSDTInclude{
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File: "drivers/intel/gma/acpi/default_brightness_levels.asl",
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Comment: "FIXME: remove this if the board doesn't have backlight",
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})
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}
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func init() {
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RegisterPCI(0x8086, 0x0c00, haswellmc{variant: "Desktop"})
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RegisterPCI(0x8086, 0x0c04, haswellmc{variant: "Mobile"})
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RegisterPCI(0x8086, 0x0a04, haswellmc{variant: "ULT"})
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RegisterPCI(0x8086, 0x0c08, haswellmc{variant: "Server"})
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RegisterPCI(0x8086, 0x0d00, haswellmc{variant: "Crystal Well Desktop"})
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RegisterPCI(0x8086, 0x0d04, haswellmc{variant: "Crystal Well Mobile"})
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RegisterPCI(0x8086, 0x0d08, haswellmc{variant: "Crystal Well Server"})
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for _, id := range []uint16{
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0x0402, 0x0412, 0x0422, /* Desktop */
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0x0406, 0x0416, 0x0426, /* Mobile */
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0x040a, 0x041a, 0x042a, /* Server */
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0x0a06, 0x0a16, 0x0a26, /* ULT */
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0x0d16, 0x0d22, 0x0d26, 0x0d36, /* Mobile 4+3, GT3e */
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} {
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RegisterPCI(0x8086, id, GenericVGA{GenericPCI{Comment: "VGA controller"}})
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}
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/* CPU HD Audio */
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RegisterPCI(0x8086, 0x0a0c, GenericPCI{})
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RegisterPCI(0x8086, 0x0c0c, GenericPCI{})
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}
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