144 lines
4.8 KiB
Diff
144 lines
4.8 KiB
Diff
From c07391821c32cafea950574b85468f5b3284b6df Mon Sep 17 00:00:00 2001
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From: Angel Pons <th3fanbus@gmail.com>
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Date: Fri, 6 May 2022 21:12:14 +0200
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Subject: [PATCH 02/26] nb/intel/haswell: Introduce option to not use MRC.bin
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Introduce the `USE_NATIVE_RAMINIT` Kconfig option, which should allow
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booting coreboot on Haswell mainboards without the need of the closed
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source MRC.bin. For now, this option does not work at all; the needed
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magic will be implemented in subsequent commits. Add a config file to
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make sure the newly-introduced option gets build-tested.
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Change-Id: I46c77586f9b5771624082e07c60c205e578edd8e
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Signed-off-by: Angel Pons <th3fanbus@gmail.com>
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---
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configs/config.asrock_b85m_pro4.native_raminit | 5 +++++
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src/northbridge/intel/haswell/Kconfig | 13 +++++++++++++
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src/northbridge/intel/haswell/Makefile.inc | 7 ++++++-
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.../intel/haswell/native_raminit/Makefile.inc | 3 +++
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.../intel/haswell/native_raminit/raminit_native.c | 15 +++++++++++++++
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5 files changed, 42 insertions(+), 1 deletion(-)
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create mode 100644 configs/config.asrock_b85m_pro4.native_raminit
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create mode 100644 src/northbridge/intel/haswell/native_raminit/Makefile.inc
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create mode 100644 src/northbridge/intel/haswell/native_raminit/raminit_native.c
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diff --git a/configs/config.asrock_b85m_pro4.native_raminit b/configs/config.asrock_b85m_pro4.native_raminit
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new file mode 100644
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index 0000000000..2de538926f
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--- /dev/null
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+++ b/configs/config.asrock_b85m_pro4.native_raminit
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@@ -0,0 +1,5 @@
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+# Configuration used to build-test native raminit
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+CONFIG_VENDOR_ASROCK=y
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+CONFIG_BOARD_ASROCK_B85M_PRO4=y
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+CONFIG_USE_NATIVE_RAMINIT=y
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+CONFIG_DEBUG_RAM_SETUP=y
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diff --git a/src/northbridge/intel/haswell/Kconfig b/src/northbridge/intel/haswell/Kconfig
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index 50acb09a91..b659bf6d98 100644
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--- a/src/northbridge/intel/haswell/Kconfig
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+++ b/src/northbridge/intel/haswell/Kconfig
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@@ -9,6 +9,14 @@ config NORTHBRIDGE_INTEL_HASWELL
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if NORTHBRIDGE_INTEL_HASWELL
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+config USE_NATIVE_RAMINIT
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+ bool "[NOT WORKING] Use native raminit"
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+ default n
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+ select HAVE_DEBUG_RAM_SETUP
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+ help
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+ Select if you want to use coreboot implementation of raminit rather than
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+ MRC.bin. Currently incomplete and does not boot.
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+
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config HASWELL_VBOOT_IN_BOOTBLOCK
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depends on VBOOT
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bool "Start verstage in bootblock"
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@@ -45,6 +53,7 @@ config DCACHE_RAM_BASE
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config DCACHE_RAM_SIZE
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hex
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+ default 0x40000 if USE_NATIVE_RAMINIT
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default 0x10000
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help
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The size of the cache-as-ram region required during bootblock
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@@ -53,12 +62,14 @@ config DCACHE_RAM_SIZE
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config DCACHE_RAM_MRC_VAR_SIZE
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hex
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+ default 0x0 if USE_NATIVE_RAMINIT
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default 0x30000
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help
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The amount of cache-as-ram region required by the reference code.
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config DCACHE_BSP_STACK_SIZE
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hex
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+ default 0x20000 if USE_NATIVE_RAMINIT
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default 0x2000
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help
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The amount of anticipated stack usage in CAR by bootblock and
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@@ -66,6 +77,7 @@ config DCACHE_BSP_STACK_SIZE
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config HAVE_MRC
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bool "Add a System Agent binary"
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+ depends on !USE_NATIVE_RAMINIT
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help
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Select this option to add a System Agent binary to
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the resulting coreboot image.
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@@ -82,6 +94,7 @@ config MRC_FILE
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config HASWELL_HIDE_PEG_FROM_MRC
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bool "Hide PEG devices from MRC to work around hardcoded MRC behavior"
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+ depends on !USE_NATIVE_RAMINIT
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default y
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help
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If set, hides all PEG devices from MRC. This allows the iGPU
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diff --git a/src/northbridge/intel/haswell/Makefile.inc b/src/northbridge/intel/haswell/Makefile.inc
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index 2d1532be05..329f1f7ffe 100644
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--- a/src/northbridge/intel/haswell/Makefile.inc
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+++ b/src/northbridge/intel/haswell/Makefile.inc
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@@ -19,6 +19,11 @@ romstage-y += report_platform.c
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postcar-y += memmap.c
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-subdirs-y += haswell_mrc
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+ifeq ($(CONFIG_USE_NATIVE_RAMINIT),y)
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+subdirs-y += native_raminit
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+
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+else
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+subdirs-y += haswell_mrc
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+endif
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endif
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diff --git a/src/northbridge/intel/haswell/native_raminit/Makefile.inc b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
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new file mode 100644
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index 0000000000..8cfb4fb33e
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--- /dev/null
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+++ b/src/northbridge/intel/haswell/native_raminit/Makefile.inc
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@@ -0,0 +1,3 @@
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+## SPDX-License-Identifier: GPL-2.0-or-later
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+
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+romstage-y += raminit_native.c
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diff --git a/src/northbridge/intel/haswell/native_raminit/raminit_native.c b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
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new file mode 100644
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index 0000000000..1aafdf8659
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--- /dev/null
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+++ b/src/northbridge/intel/haswell/native_raminit/raminit_native.c
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@@ -0,0 +1,15 @@
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+/* SPDX-License-Identifier: GPL-2.0-or-later */
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+
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+#include <console/console.h>
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+#include <northbridge/intel/haswell/raminit.h>
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+
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+void perform_raminit(const int s3resume)
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+{
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+ /*
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+ * See, this function's name is a lie. There are more things to
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+ * do that memory initialisation, but they are relatively easy.
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+ */
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+
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+ /** TODO: Implement the required magic **/
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+ die("NATIVE RAMINIT: More Magic (tm) required.\n");
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+}
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--
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2.39.2
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