827 lines
24 KiB
Diff
827 lines
24 KiB
Diff
From a49df0307455d6d8b7a9efb9f4639b72be1b64d4 Mon Sep 17 00:00:00 2001
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From: Nicholas Chin <nic.c3.14@gmail.com>
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Date: Sat, 19 Aug 2023 16:19:10 -0600
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Subject: [PATCH 20/30] mb/dell: Add Latitude E6430 (Ivy Bridge)
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Mainboard is QAL80/LA-7781P (UMA). The dGPU model was not tested. This
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is based on the autoport output with some manual tweaks. The flash is
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8MiB + 4MiB, and is fairly easily accessed by removing the keyboard. It
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can also be internally flashed by sending a command to the EC, which
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causes the EC to pull the FDO pin low and the firmware to skip setting
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up any chipset based write protections [1]. The EC is the SMSC MEC5055,
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which seems to be compatible with the existing MEC5035 code.
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Working:
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- Libgfxinit
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- USB EHCI debug (left side usb port is HCD index 2, middle port on the
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right side is HCD index 1)
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- Keyboard
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- Touchpad/trackpoint
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- ExpressCard
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- Audio
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- Ethernet
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- SD card reader
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- mPCIe WiFi
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- SeaBIOS 1.16.2
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- edk2 (MrChromebox' fork, uefipayload_202306)
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- Internal flashing using dell-flash-unlock
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Not working:
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- S3 suspend: Possibly EC related
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- Physical wireless switch - this triggers an SMI handler in the vendor
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firmware which sends commands to the EC to enable/disable wireless
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devices
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- Battery reporting - needs ACPI code for the EC
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- Brightness hotkeys - probably EC related
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Unknown/untested:
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- Dock
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- eSATA
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- TPM
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- dGPU on non-UMA model
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- Bluetooth module (not included on my system)
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[1] https://gitlab.com/nic3-14159/dell-flash-unlock
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Change-Id: I93c6622fc5da1d0d61a5b2c197ac7227d9525908
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Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
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---
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src/mainboard/dell/e6430/Kconfig | 44 +++++
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src/mainboard/dell/e6430/Kconfig.name | 2 +
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src/mainboard/dell/e6430/Makefile.inc | 6 +
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src/mainboard/dell/e6430/acpi/ec.asl | 9 +
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src/mainboard/dell/e6430/acpi/platform.asl | 12 ++
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src/mainboard/dell/e6430/acpi/superio.asl | 3 +
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src/mainboard/dell/e6430/acpi_tables.c | 16 ++
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src/mainboard/dell/e6430/board_info.txt | 6 +
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src/mainboard/dell/e6430/cmos.default | 9 +
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src/mainboard/dell/e6430/cmos.layout | 88 ++++++++++
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src/mainboard/dell/e6430/data.vbt | Bin 0 -> 6144 bytes
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src/mainboard/dell/e6430/devicetree.cb | 70 ++++++++
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src/mainboard/dell/e6430/dsdt.asl | 30 ++++
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src/mainboard/dell/e6430/early_init.c | 32 ++++
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src/mainboard/dell/e6430/gma-mainboard.ads | 20 +++
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src/mainboard/dell/e6430/gpio.c | 192 +++++++++++++++++++++
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src/mainboard/dell/e6430/hda_verb.c | 33 ++++
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src/mainboard/dell/e6430/mainboard.c | 21 +++
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18 files changed, 593 insertions(+)
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create mode 100644 src/mainboard/dell/e6430/Kconfig
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create mode 100644 src/mainboard/dell/e6430/Kconfig.name
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create mode 100644 src/mainboard/dell/e6430/Makefile.inc
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create mode 100644 src/mainboard/dell/e6430/acpi/ec.asl
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create mode 100644 src/mainboard/dell/e6430/acpi/platform.asl
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create mode 100644 src/mainboard/dell/e6430/acpi/superio.asl
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create mode 100644 src/mainboard/dell/e6430/acpi_tables.c
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create mode 100644 src/mainboard/dell/e6430/board_info.txt
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create mode 100644 src/mainboard/dell/e6430/cmos.default
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create mode 100644 src/mainboard/dell/e6430/cmos.layout
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create mode 100644 src/mainboard/dell/e6430/data.vbt
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create mode 100644 src/mainboard/dell/e6430/devicetree.cb
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create mode 100644 src/mainboard/dell/e6430/dsdt.asl
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create mode 100644 src/mainboard/dell/e6430/early_init.c
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create mode 100644 src/mainboard/dell/e6430/gma-mainboard.ads
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create mode 100644 src/mainboard/dell/e6430/gpio.c
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create mode 100644 src/mainboard/dell/e6430/hda_verb.c
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create mode 100644 src/mainboard/dell/e6430/mainboard.c
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diff --git a/src/mainboard/dell/e6430/Kconfig b/src/mainboard/dell/e6430/Kconfig
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new file mode 100644
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index 0000000000..e4c799803e
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/Kconfig
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@@ -0,0 +1,44 @@
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+if BOARD_DELL_LATITUDE_E6430
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+
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+config BOARD_SPECIFIC_OPTIONS
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+ def_bool y
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+ select BOARD_ROMSIZE_KB_12288
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+ select EC_ACPI
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+ select EC_DELL_MEC5035
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+ select GFX_GMA_PANEL_1_ON_LVDS
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+ select HAVE_ACPI_RESUME
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+ select HAVE_ACPI_TABLES
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+ select HAVE_CMOS_DEFAULT
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+ select HAVE_OPTION_TABLE
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+ select INTEL_GMA_HAVE_VBT
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+ select INTEL_INT15
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+ select MAINBOARD_HAS_LIBGFXINIT
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+ select MAINBOARD_USES_IFD_GBE_REGION
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+ select NORTHBRIDGE_INTEL_SANDYBRIDGE
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+ select SERIRQ_CONTINUOUS_MODE
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+ select SOUTHBRIDGE_INTEL_C216
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+ select SYSTEM_TYPE_LAPTOP
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+ select USE_NATIVE_RAMINIT
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+
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+config DRAM_RESET_GATE_GPIO
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+ default 60
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+
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+config MAINBOARD_DIR
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+ default "dell/e6430"
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+
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+config MAINBOARD_PART_NUMBER
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+ default "Latitude E6430"
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+
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+config PS2K_EISAID
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+ default "PNP0303"
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+
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+config PS2M_EISAID
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+ default "PNP0F13"
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+
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+config USBDEBUG_HCD_INDEX
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+ default 2
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+
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+config VGA_BIOS_ID
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+ default "8086,0166"
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+
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+endif
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diff --git a/src/mainboard/dell/e6430/Kconfig.name b/src/mainboard/dell/e6430/Kconfig.name
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new file mode 100644
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index 0000000000..f866b03585
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/Kconfig.name
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@@ -0,0 +1,2 @@
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+config BOARD_DELL_LATITUDE_E6430
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+ bool "Latitude E6430"
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diff --git a/src/mainboard/dell/e6430/Makefile.inc b/src/mainboard/dell/e6430/Makefile.inc
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new file mode 100644
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index 0000000000..ba64e93eb8
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/Makefile.inc
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@@ -0,0 +1,6 @@
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+# SPDX-License-Identifier: GPL-2.0-only
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+bootblock-y += early_init.c
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+bootblock-y += gpio.c
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+romstage-y += early_init.c
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+romstage-y += gpio.c
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+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
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diff --git a/src/mainboard/dell/e6430/acpi/ec.asl b/src/mainboard/dell/e6430/acpi/ec.asl
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new file mode 100644
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index 0000000000..0d429410a9
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/acpi/ec.asl
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@@ -0,0 +1,9 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+
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+Device(EC)
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+{
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+ Name (_HID, EISAID("PNP0C09"))
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+ Name (_UID, 0)
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+ Name (_GPE, 16)
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+/* FIXME: EC support */
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+}
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diff --git a/src/mainboard/dell/e6430/acpi/platform.asl b/src/mainboard/dell/e6430/acpi/platform.asl
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new file mode 100644
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index 0000000000..2d24bbd9b9
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/acpi/platform.asl
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@@ -0,0 +1,12 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+
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+Method(_WAK, 1)
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+{
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+ /* FIXME: EC support */
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+ Return(Package() {0, 0})
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+}
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+
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+Method(_PTS,1)
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+{
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+ /* FIXME: EC support */
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+}
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diff --git a/src/mainboard/dell/e6430/acpi/superio.asl b/src/mainboard/dell/e6430/acpi/superio.asl
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new file mode 100644
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index 0000000000..55b1db5b11
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/acpi/superio.asl
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@@ -0,0 +1,3 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+
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+#include <drivers/pc80/pc/ps2_controller.asl>
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diff --git a/src/mainboard/dell/e6430/acpi_tables.c b/src/mainboard/dell/e6430/acpi_tables.c
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new file mode 100644
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index 0000000000..e2759659bf
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/acpi_tables.c
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@@ -0,0 +1,16 @@
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+/* SPDX-License-Identifier: GPL-2.0-only */
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+
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+#include <acpi/acpi_gnvs.h>
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+#include <soc/nvs.h>
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+
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+/* FIXME: check this function. */
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+void mainboard_fill_gnvs(struct global_nvs *gnvs)
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+{
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+ /* The lid is open by default. */
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+ gnvs->lids = 1;
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+
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+ /* Temperature at which OS will shutdown */
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+ gnvs->tcrt = 100;
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+ /* Temperature at which OS will throttle CPU */
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+ gnvs->tpsv = 90;
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+}
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diff --git a/src/mainboard/dell/e6430/board_info.txt b/src/mainboard/dell/e6430/board_info.txt
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new file mode 100644
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index 0000000000..4601a4aaba
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/board_info.txt
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@@ -0,0 +1,6 @@
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+Category: laptop
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+ROM package: SOIC-8
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+ROM protocol: SPI
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+ROM socketed: n
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+Flashrom support: y
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+Release year: 2012
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diff --git a/src/mainboard/dell/e6430/cmos.default b/src/mainboard/dell/e6430/cmos.default
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new file mode 100644
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index 0000000000..2a5b30f2b7
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/cmos.default
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@@ -0,0 +1,9 @@
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+boot_option=Fallback
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+debug_level=Debug
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+power_on_after_fail=Disable
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+nmi=Enable
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+bluetooth=Enable
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+wwan=Enable
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+wlan=Enable
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+sata_mode=AHCI
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+me_state=Normal
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diff --git a/src/mainboard/dell/e6430/cmos.layout b/src/mainboard/dell/e6430/cmos.layout
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new file mode 100644
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index 0000000000..1aa7e77bce
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--- /dev/null
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+++ b/src/mainboard/dell/e6430/cmos.layout
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@@ -0,0 +1,88 @@
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+## SPDX-License-Identifier: GPL-2.0-only
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+
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+# -----------------------------------------------------------------
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+entries
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+
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+# -----------------------------------------------------------------
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+0 120 r 0 reserved_memory
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+
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+# -----------------------------------------------------------------
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+# RTC_BOOT_BYTE (coreboot hardcoded)
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+384 1 e 4 boot_option
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+388 4 h 0 reboot_counter
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+
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+# -----------------------------------------------------------------
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+# coreboot config options: console
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+395 4 e 6 debug_level
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+
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+#400 8 r 0 reserved for century byte
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+
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+# coreboot config options: southbridge
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+408 1 e 1 nmi
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+409 2 e 7 power_on_after_fail
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+411 1 e 9 sata_mode
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+
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+# coreboot config options: EC
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+412 1 e 1 bluetooth
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+413 1 e 1 wwan
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+414 1 e 1 wlan
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+
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+# coreboot config options: ME
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+424 1 e 14 me_state
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+425 2 h 0 me_state_prev
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+
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+# coreboot config options: northbridge
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+432 3 e 11 gfx_uma_size
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+435 2 e 12 hybrid_graphics_mode
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+440 8 h 0 volume
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+
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+# VBOOT
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+448 128 r 0 vbnv
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+
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+# SandyBridge MRC Scrambler Seed values
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+896 32 r 0 mrc_scrambler_seed
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+928 32 r 0 mrc_scrambler_seed_s3
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+960 16 r 0 mrc_scrambler_seed_chk
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+
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+# coreboot config options: check sums
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+984 16 h 0 check_sum
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+
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+# -----------------------------------------------------------------
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+
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+enumerations
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+
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+#ID value text
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+1 0 Disable
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+1 1 Enable
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+2 0 Enable
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+2 1 Disable
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+4 0 Fallback
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+4 1 Normal
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+6 0 Emergency
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+6 1 Alert
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+6 2 Critical
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+6 3 Error
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+6 4 Warning
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+6 5 Notice
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+6 6 Info
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+6 7 Debug
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+6 8 Spew
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+7 0 Disable
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+7 1 Enable
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+7 2 Keep
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+9 0 AHCI
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+9 1 Compatible
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+11 0 32M
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+11 1 64M
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+11 2 96M
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+11 3 128M
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+11 4 160M
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+11 5 192M
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+11 6 224M
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+14 0 Normal
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+14 1 Disabled
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+
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+# -----------------------------------------------------------------
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+checksums
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+
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+checksum 392 447 984
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diff --git a/src/mainboard/dell/e6430/data.vbt b/src/mainboard/dell/e6430/data.vbt
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new file mode 100644
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index 0000000000000000000000000000000000000000..08952c26ab82933ebb5cc5b9c7e2265963a87b2d
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GIT binary patch
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literal 6144
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|
|
z7h1ZN6srJX#Uke;d$JhpccQxNhw2Qz?Zw91`@8IHm-n!7{19~*_}LvecV2YZ7%!rJ
|
|
zJQk}HtK2>CvB*WQ@u9a$Eq*zF2M=FM=@c`>dwDQ;<8EgZ-}dvt6=k(8Kqfa=nDJJ{
|
|
z`Qth}G~%sFr{ZEKZb_%aySrD?sV%fJw`vFfda&ho1a>X)H^I}D_0A<|*{8kwEBU8>
|
|
qS<b6g={WLAp3+&R^8(yo-t$_!=7BX2ta)I~18W{w^T5By1OEis_@J`@
|
|
|
|
literal 0
|
|
HcmV?d00001
|
|
|
|
diff --git a/src/mainboard/dell/e6430/devicetree.cb b/src/mainboard/dell/e6430/devicetree.cb
|
|
new file mode 100644
|
|
index 0000000000..054b01c5ac
|
|
--- /dev/null
|
|
+++ b/src/mainboard/dell/e6430/devicetree.cb
|
|
@@ -0,0 +1,70 @@
|
|
+chip northbridge/intel/sandybridge # FIXME: GPU registers may not always apply.
|
|
+ register "gfx" = "GMA_STATIC_DISPLAYS(1)"
|
|
+ register "gpu_cpu_backlight" = "0x00001312"
|
|
+ register "gpu_dp_b_hotplug" = "4"
|
|
+ register "gpu_dp_c_hotplug" = "4"
|
|
+ register "gpu_dp_d_hotplug" = "4"
|
|
+ register "gpu_panel_port_select" = "0"
|
|
+ register "gpu_panel_power_backlight_off_delay" = "2300"
|
|
+ register "gpu_panel_power_backlight_on_delay" = "2300"
|
|
+ register "gpu_panel_power_cycle_delay" = "6"
|
|
+ register "gpu_panel_power_down_delay" = "400"
|
|
+ register "gpu_panel_power_up_delay" = "400"
|
|
+ register "gpu_pch_backlight" = "0x13121312"
|
|
+
|
|
+ register "spd_addresses" = "{0x50, 0, 0x52, 0}"
|
|
+
|
|
+ device domain 0x0 on
|
|
+ subsystemid 0x1028 0x0534 inherit
|
|
+
|
|
+ device ref host_bridge on end
|
|
+ device ref peg10 off end
|
|
+ device ref igd on end
|
|
+
|
|
+ chip southbridge/intel/bd82x6x # Intel Series 6 Cougar Point PCH
|
|
+ register "docking_supported" = "1"
|
|
+ register "gen1_dec" = "0x007c0681"
|
|
+ register "gen2_dec" = "0x005c0921"
|
|
+ register "gen3_dec" = "0x003c07e1"
|
|
+ register "gen4_dec" = "0x00000911" # Ports 0x910/0x911 for EC
|
|
+ register "gpi0_routing" = "2"
|
|
+ register "pcie_hotplug_map" = "{ 0, 0, 1, 1, 0, 0, 0, 0 }"
|
|
+ register "pcie_port_coalesce" = "1"
|
|
+ register "sata_interface_speed_support" = "0x3"
|
|
+ register "sata_port_map" = "0x33"
|
|
+ register "spi_lvscc" = "0x2005"
|
|
+ register "spi_uvscc" = "0x2005"
|
|
+ register "superspeed_capable_ports" = "0x0000000f"
|
|
+ register "xhci_overcurrent_mapping" = "0x00000c03"
|
|
+ register "xhci_switchable_ports" = "0x0000000f"
|
|
+
|
|
+ device ref xhci on end
|
|
+ device ref mei1 on end
|
|
+ device ref mei2 off end
|
|
+ device ref me_ide_r off end
|
|
+ device ref me_kt on end
|
|
+ device ref gbe on end
|
|
+ device ref ehci2 on end
|
|
+ device ref hda on end
|
|
+ device ref pcie_rp1 on end # WWAN Slot
|
|
+ device ref pcie_rp2 on end # SLAN Slot
|
|
+ device ref pcie_rp3 on end # ExpressCard
|
|
+ device ref pcie_rp4 on end # E-Module (optical bay)
|
|
+ device ref pcie_rp5 on end # Extra Half Mini PCIe slot
|
|
+ device ref pcie_rp6 on end # SD/MMC Card Reader
|
|
+ device ref pcie_rp7 off end
|
|
+ device ref pcie_rp8 off end
|
|
+ device ref ehci1 on end
|
|
+ device ref pci_bridge off end
|
|
+ device ref lpc on
|
|
+ chip ec/dell/mec5035
|
|
+ device pnp ff.0 on end
|
|
+ end
|
|
+ end
|
|
+ device ref sata1 on end
|
|
+ device ref smbus on end
|
|
+ device ref sata2 off end
|
|
+ device ref thermal off end
|
|
+ end
|
|
+ end
|
|
+end
|
|
diff --git a/src/mainboard/dell/e6430/dsdt.asl b/src/mainboard/dell/e6430/dsdt.asl
|
|
new file mode 100644
|
|
index 0000000000..7d13c55b08
|
|
--- /dev/null
|
|
+++ b/src/mainboard/dell/e6430/dsdt.asl
|
|
@@ -0,0 +1,30 @@
|
|
+#define BRIGHTNESS_UP \_SB.PCI0.GFX0.INCB
|
|
+#define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.DECB
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+
|
|
+#include <acpi/acpi.h>
|
|
+
|
|
+DefinitionBlock(
|
|
+ "dsdt.aml",
|
|
+ "DSDT",
|
|
+ ACPI_DSDT_REV_2,
|
|
+ OEM_ID,
|
|
+ ACPI_TABLE_CREATOR,
|
|
+ 0x20141018 /* OEM revision */
|
|
+)
|
|
+{
|
|
+ #include <acpi/dsdt_top.asl>
|
|
+ #include "acpi/platform.asl"
|
|
+ #include <cpu/intel/common/acpi/cpu.asl>
|
|
+ #include <southbridge/intel/common/acpi/platform.asl>
|
|
+ #include <southbridge/intel/bd82x6x/acpi/globalnvs.asl>
|
|
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
|
|
+
|
|
+ Device (\_SB.PCI0)
|
|
+ {
|
|
+ #include <northbridge/intel/sandybridge/acpi/sandybridge.asl>
|
|
+ #include <drivers/intel/gma/acpi/default_brightness_levels.asl>
|
|
+ #include <southbridge/intel/bd82x6x/acpi/pch.asl>
|
|
+ }
|
|
+}
|
|
diff --git a/src/mainboard/dell/e6430/early_init.c b/src/mainboard/dell/e6430/early_init.c
|
|
new file mode 100644
|
|
index 0000000000..d882c3d78b
|
|
--- /dev/null
|
|
+++ b/src/mainboard/dell/e6430/early_init.c
|
|
@@ -0,0 +1,32 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+
|
|
+#include <bootblock_common.h>
|
|
+#include <device/pci_ops.h>
|
|
+#include <ec/dell/mec5035/mec5035.h>
|
|
+#include <southbridge/intel/bd82x6x/pch.h>
|
|
+
|
|
+const struct southbridge_usb_port mainboard_usb_ports[] = {
|
|
+ { 1, 1, 0 },
|
|
+ { 1, 1, 0 },
|
|
+ { 1, 1, 1 },
|
|
+ { 1, 1, 1 },
|
|
+ { 1, 0, 2 },
|
|
+ { 1, 1, 2 },
|
|
+ { 1, 1, 3 },
|
|
+ { 1, 1, 3 },
|
|
+ { 1, 1, 4 },
|
|
+ { 1, 1, 4 },
|
|
+ { 1, 1, 5 },
|
|
+ { 1, 1, 5 },
|
|
+ { 1, 2, 6 },
|
|
+ { 1, 2, 6 },
|
|
+};
|
|
+
|
|
+void bootblock_mainboard_early_init(void)
|
|
+{
|
|
+ pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN | MC_LPC_EN
|
|
+ | KBC_LPC_EN | FDD_LPC_EN | LPT_LPC_EN
|
|
+ | COMB_LPC_EN | COMA_LPC_EN);
|
|
+ mec5035_early_init();
|
|
+}
|
|
diff --git a/src/mainboard/dell/e6430/gma-mainboard.ads b/src/mainboard/dell/e6430/gma-mainboard.ads
|
|
new file mode 100644
|
|
index 0000000000..1310830c8e
|
|
--- /dev/null
|
|
+++ b/src/mainboard/dell/e6430/gma-mainboard.ads
|
|
@@ -0,0 +1,20 @@
|
|
+-- SPDX-License-Identifier: GPL-2.0-or-later
|
|
+
|
|
+with HW.GFX.GMA;
|
|
+with HW.GFX.GMA.Display_Probing;
|
|
+
|
|
+use HW.GFX.GMA;
|
|
+use HW.GFX.GMA.Display_Probing;
|
|
+
|
|
+private package GMA.Mainboard is
|
|
+
|
|
+ ports : constant Port_List :=
|
|
+ (
|
|
+ HDMI1, -- mainboard HDMI
|
|
+ DP2, -- dock DP
|
|
+ DP3, -- dock DP
|
|
+ Analog, --mainboard VGA
|
|
+ LVDS,
|
|
+ others => Disabled);
|
|
+
|
|
+end GMA.Mainboard;
|
|
diff --git a/src/mainboard/dell/e6430/gpio.c b/src/mainboard/dell/e6430/gpio.c
|
|
new file mode 100644
|
|
index 0000000000..777570765a
|
|
--- /dev/null
|
|
+++ b/src/mainboard/dell/e6430/gpio.c
|
|
@@ -0,0 +1,192 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+#include <southbridge/intel/common/gpio.h>
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
|
|
+ .gpio0 = GPIO_MODE_GPIO,
|
|
+ .gpio1 = GPIO_MODE_GPIO,
|
|
+ .gpio2 = GPIO_MODE_GPIO,
|
|
+ .gpio3 = GPIO_MODE_GPIO,
|
|
+ .gpio4 = GPIO_MODE_GPIO,
|
|
+ .gpio5 = GPIO_MODE_NATIVE,
|
|
+ .gpio6 = GPIO_MODE_GPIO,
|
|
+ .gpio7 = GPIO_MODE_GPIO,
|
|
+ .gpio8 = GPIO_MODE_GPIO,
|
|
+ .gpio9 = GPIO_MODE_NATIVE,
|
|
+ .gpio10 = GPIO_MODE_NATIVE,
|
|
+ .gpio11 = GPIO_MODE_NATIVE,
|
|
+ .gpio12 = GPIO_MODE_NATIVE,
|
|
+ .gpio13 = GPIO_MODE_GPIO,
|
|
+ .gpio14 = GPIO_MODE_GPIO,
|
|
+ .gpio15 = GPIO_MODE_GPIO,
|
|
+ .gpio16 = GPIO_MODE_GPIO,
|
|
+ .gpio17 = GPIO_MODE_GPIO,
|
|
+ .gpio18 = GPIO_MODE_NATIVE,
|
|
+ .gpio19 = GPIO_MODE_GPIO,
|
|
+ .gpio20 = GPIO_MODE_NATIVE,
|
|
+ .gpio21 = GPIO_MODE_GPIO,
|
|
+ .gpio22 = GPIO_MODE_GPIO,
|
|
+ .gpio23 = GPIO_MODE_NATIVE,
|
|
+ .gpio24 = GPIO_MODE_GPIO,
|
|
+ .gpio25 = GPIO_MODE_NATIVE,
|
|
+ .gpio26 = GPIO_MODE_NATIVE,
|
|
+ .gpio27 = GPIO_MODE_GPIO,
|
|
+ .gpio28 = GPIO_MODE_GPIO,
|
|
+ .gpio29 = GPIO_MODE_GPIO,
|
|
+ .gpio30 = GPIO_MODE_NATIVE,
|
|
+ .gpio31 = GPIO_MODE_NATIVE,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
|
|
+ .gpio0 = GPIO_DIR_INPUT,
|
|
+ .gpio1 = GPIO_DIR_INPUT,
|
|
+ .gpio2 = GPIO_DIR_INPUT,
|
|
+ .gpio3 = GPIO_DIR_INPUT,
|
|
+ .gpio4 = GPIO_DIR_INPUT,
|
|
+ .gpio6 = GPIO_DIR_INPUT,
|
|
+ .gpio7 = GPIO_DIR_INPUT,
|
|
+ .gpio8 = GPIO_DIR_INPUT,
|
|
+ .gpio13 = GPIO_DIR_INPUT,
|
|
+ .gpio14 = GPIO_DIR_INPUT,
|
|
+ .gpio15 = GPIO_DIR_INPUT,
|
|
+ .gpio16 = GPIO_DIR_INPUT,
|
|
+ .gpio17 = GPIO_DIR_INPUT,
|
|
+ .gpio19 = GPIO_DIR_INPUT,
|
|
+ .gpio21 = GPIO_DIR_INPUT,
|
|
+ .gpio22 = GPIO_DIR_INPUT,
|
|
+ .gpio24 = GPIO_DIR_INPUT,
|
|
+ .gpio27 = GPIO_DIR_INPUT,
|
|
+ .gpio28 = GPIO_DIR_OUTPUT,
|
|
+ .gpio29 = GPIO_DIR_INPUT,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
|
|
+ .gpio28 = GPIO_LEVEL_LOW,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_reset = {
|
|
+ .gpio30 = GPIO_RESET_RSMRST,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
|
|
+ .gpio0 = GPIO_INVERT,
|
|
+ .gpio8 = GPIO_INVERT,
|
|
+ .gpio13 = GPIO_INVERT,
|
|
+ .gpio14 = GPIO_INVERT,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
|
|
+ .gpio32 = GPIO_MODE_NATIVE,
|
|
+ .gpio33 = GPIO_MODE_GPIO,
|
|
+ .gpio34 = GPIO_MODE_GPIO,
|
|
+ .gpio35 = GPIO_MODE_GPIO,
|
|
+ .gpio36 = GPIO_MODE_GPIO,
|
|
+ .gpio37 = GPIO_MODE_GPIO,
|
|
+ .gpio38 = GPIO_MODE_GPIO,
|
|
+ .gpio39 = GPIO_MODE_GPIO,
|
|
+ .gpio40 = GPIO_MODE_NATIVE,
|
|
+ .gpio41 = GPIO_MODE_NATIVE,
|
|
+ .gpio42 = GPIO_MODE_NATIVE,
|
|
+ .gpio43 = GPIO_MODE_NATIVE,
|
|
+ .gpio44 = GPIO_MODE_NATIVE,
|
|
+ .gpio45 = GPIO_MODE_GPIO,
|
|
+ .gpio46 = GPIO_MODE_NATIVE,
|
|
+ .gpio47 = GPIO_MODE_NATIVE,
|
|
+ .gpio48 = GPIO_MODE_GPIO,
|
|
+ .gpio49 = GPIO_MODE_GPIO,
|
|
+ .gpio50 = GPIO_MODE_NATIVE,
|
|
+ .gpio51 = GPIO_MODE_GPIO,
|
|
+ .gpio52 = GPIO_MODE_GPIO,
|
|
+ .gpio53 = GPIO_MODE_NATIVE,
|
|
+ .gpio54 = GPIO_MODE_GPIO,
|
|
+ .gpio55 = GPIO_MODE_NATIVE,
|
|
+ .gpio56 = GPIO_MODE_NATIVE,
|
|
+ .gpio57 = GPIO_MODE_GPIO,
|
|
+ .gpio58 = GPIO_MODE_NATIVE,
|
|
+ .gpio59 = GPIO_MODE_NATIVE,
|
|
+ .gpio60 = GPIO_MODE_GPIO,
|
|
+ .gpio61 = GPIO_MODE_NATIVE,
|
|
+ .gpio62 = GPIO_MODE_NATIVE,
|
|
+ .gpio63 = GPIO_MODE_NATIVE,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
|
|
+ .gpio33 = GPIO_DIR_INPUT,
|
|
+ .gpio34 = GPIO_DIR_OUTPUT,
|
|
+ .gpio35 = GPIO_DIR_INPUT,
|
|
+ .gpio36 = GPIO_DIR_INPUT,
|
|
+ .gpio37 = GPIO_DIR_INPUT,
|
|
+ .gpio38 = GPIO_DIR_INPUT,
|
|
+ .gpio39 = GPIO_DIR_INPUT,
|
|
+ .gpio45 = GPIO_DIR_OUTPUT,
|
|
+ .gpio48 = GPIO_DIR_INPUT,
|
|
+ .gpio49 = GPIO_DIR_INPUT,
|
|
+ .gpio51 = GPIO_DIR_INPUT,
|
|
+ .gpio52 = GPIO_DIR_INPUT,
|
|
+ .gpio54 = GPIO_DIR_INPUT,
|
|
+ .gpio57 = GPIO_DIR_INPUT,
|
|
+ .gpio60 = GPIO_DIR_OUTPUT,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
|
|
+ .gpio34 = GPIO_LEVEL_HIGH,
|
|
+ .gpio45 = GPIO_LEVEL_LOW,
|
|
+ .gpio60 = GPIO_LEVEL_HIGH,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set2 pch_gpio_set2_reset = {
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
|
|
+ .gpio64 = GPIO_MODE_NATIVE,
|
|
+ .gpio65 = GPIO_MODE_NATIVE,
|
|
+ .gpio66 = GPIO_MODE_NATIVE,
|
|
+ .gpio67 = GPIO_MODE_NATIVE,
|
|
+ .gpio68 = GPIO_MODE_GPIO,
|
|
+ .gpio69 = GPIO_MODE_GPIO,
|
|
+ .gpio70 = GPIO_MODE_GPIO,
|
|
+ .gpio71 = GPIO_MODE_GPIO,
|
|
+ .gpio72 = GPIO_MODE_NATIVE,
|
|
+ .gpio73 = GPIO_MODE_NATIVE,
|
|
+ .gpio74 = GPIO_MODE_NATIVE,
|
|
+ .gpio75 = GPIO_MODE_NATIVE,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
|
|
+ .gpio68 = GPIO_DIR_INPUT,
|
|
+ .gpio69 = GPIO_DIR_INPUT,
|
|
+ .gpio70 = GPIO_DIR_INPUT,
|
|
+ .gpio71 = GPIO_DIR_INPUT,
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
|
|
+};
|
|
+
|
|
+static const struct pch_gpio_set3 pch_gpio_set3_reset = {
|
|
+};
|
|
+
|
|
+const struct pch_gpio_map mainboard_gpio_map = {
|
|
+ .set1 = {
|
|
+ .mode = &pch_gpio_set1_mode,
|
|
+ .direction = &pch_gpio_set1_direction,
|
|
+ .level = &pch_gpio_set1_level,
|
|
+ .blink = &pch_gpio_set1_blink,
|
|
+ .invert = &pch_gpio_set1_invert,
|
|
+ .reset = &pch_gpio_set1_reset,
|
|
+ },
|
|
+ .set2 = {
|
|
+ .mode = &pch_gpio_set2_mode,
|
|
+ .direction = &pch_gpio_set2_direction,
|
|
+ .level = &pch_gpio_set2_level,
|
|
+ .reset = &pch_gpio_set2_reset,
|
|
+ },
|
|
+ .set3 = {
|
|
+ .mode = &pch_gpio_set3_mode,
|
|
+ .direction = &pch_gpio_set3_direction,
|
|
+ .level = &pch_gpio_set3_level,
|
|
+ .reset = &pch_gpio_set3_reset,
|
|
+ },
|
|
+};
|
|
diff --git a/src/mainboard/dell/e6430/hda_verb.c b/src/mainboard/dell/e6430/hda_verb.c
|
|
new file mode 100644
|
|
index 0000000000..56ada95c58
|
|
--- /dev/null
|
|
+++ b/src/mainboard/dell/e6430/hda_verb.c
|
|
@@ -0,0 +1,33 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+#include <device/azalia_device.h>
|
|
+
|
|
+const u32 cim_verb_data[] = {
|
|
+ 0x111d76df, /* Codec Vendor / Device ID: IDT */
|
|
+ 0x10280534, /* Subsystem ID */
|
|
+ 11, /* Number of 4 dword sets */
|
|
+ AZALIA_SUBVENDOR(0, 0x10280534),
|
|
+ AZALIA_PIN_CFG(0, 0x0a, 0x03a11020),
|
|
+ AZALIA_PIN_CFG(0, 0x0b, 0x0321101f),
|
|
+ AZALIA_PIN_CFG(0, 0x0c, 0x400000f0),
|
|
+ AZALIA_PIN_CFG(0, 0x0d, 0x90170110),
|
|
+ AZALIA_PIN_CFG(0, 0x0e, 0x23011050),
|
|
+ AZALIA_PIN_CFG(0, 0x0f, 0x23a1102e),
|
|
+ AZALIA_PIN_CFG(0, 0x10, 0x400000f3),
|
|
+ AZALIA_PIN_CFG(0, 0x11, 0xd5a30130),
|
|
+ AZALIA_PIN_CFG(0, 0x1f, 0x400000f0),
|
|
+ AZALIA_PIN_CFG(0, 0x20, 0x400000f0),
|
|
+
|
|
+ 0x80862806, /* Codec Vendor / Device ID: Intel */
|
|
+ 0x80860101, /* Subsystem ID */
|
|
+ 4, /* Number of 4 dword sets */
|
|
+ AZALIA_SUBVENDOR(3, 0x80860101),
|
|
+ AZALIA_PIN_CFG(3, 0x05, 0x18560010),
|
|
+ AZALIA_PIN_CFG(3, 0x06, 0x18560020),
|
|
+ AZALIA_PIN_CFG(3, 0x07, 0x18560030),
|
|
+
|
|
+};
|
|
+
|
|
+const u32 pc_beep_verbs[0] = {};
|
|
+
|
|
+AZALIA_ARRAY_SIZES;
|
|
diff --git a/src/mainboard/dell/e6430/mainboard.c b/src/mainboard/dell/e6430/mainboard.c
|
|
new file mode 100644
|
|
index 0000000000..31e49802fc
|
|
--- /dev/null
|
|
+++ b/src/mainboard/dell/e6430/mainboard.c
|
|
@@ -0,0 +1,21 @@
|
|
+/* SPDX-License-Identifier: GPL-2.0-only */
|
|
+
|
|
+#include <device/device.h>
|
|
+#include <drivers/intel/gma/int15.h>
|
|
+#include <southbridge/intel/bd82x6x/pch.h>
|
|
+#include <ec/acpi/ec.h>
|
|
+#include <console/console.h>
|
|
+#include <pc80/keyboard.h>
|
|
+
|
|
+static void mainboard_enable(struct device *dev)
|
|
+{
|
|
+
|
|
+ /* FIXME: fix these values. */
|
|
+ install_intel_vga_int15_handler(GMA_INT15_ACTIVE_LFP_INT_LVDS,
|
|
+ GMA_INT15_PANEL_FIT_DEFAULT,
|
|
+ GMA_INT15_BOOT_DISPLAY_DEFAULT, 0);
|
|
+}
|
|
+
|
|
+struct chip_operations mainboard_ops = {
|
|
+ .enable_dev = mainboard_enable,
|
|
+};
|
|
--
|
|
2.39.2
|
|
|